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班級：資訊二 學號：541882 姓名：賴明志 ·...
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數位邏輯 講義 課程綱要 羅東高工 資訊科 班級：資訊二 學號：541882 姓名：賴明志 統一入學測驗電子類「專二_數位邏輯」章節綱要與講義章節對照表： 統 測 單 元 統 測 教 材 綱 要 講 義 章 節 1、概論 1、數量的表示法。 2、數位系統和類比系統。 3、邏輯準位與脈波準位。 4、數位積體電路簡介。 第七章 邏輯族特性 2、數字系統 1、十進位表示法。 2、二進位表示法。 3、八進位表示法。 4、十六進位表示法。 5、數字表示法互換。 6、二進位減法。 7、其他數字碼。 第一章 數碼轉換 第六章 算數電路 3、基本邏輯閘與真值表 1、反相閘。 2、真值表。 3、或閘、及閘。 4、反或閘、反及閘。 5、互斥或閘、反互斥或閘。 第二章 邏輯閘 4、布林代數與笛摩根定理 1、布林代數特質。 2、布林代數基本運算。 3、布林代數基本定理與假設。 4、笛摩根第一定理。 5、笛摩根第二定理。 6、笛摩根定理的互換。 5、布林代數化簡 1、布林代數演算法化簡。 2、布林代數卡諾圖化簡。 3、完成化簡之組合邏輯電路。 第三章 布林代數 6、組合邏輯應用 1、加法器。 2、減法器。 3、解碼器。 4、編碼器。 5、多工器。 6、解多工器。 7、唯讀記憶體、可抹去式記憶體之應用。 8、可程式邏輯陣列之設計。 第四章 組合邏輯 第六章 算數電路 7、正反器 1、RS型正反器。 2、D型正反器。 3、JK 型正反器。 4、T 型正反器。 8、循序邏輯設計 1、狀態圖及狀態表的建立。 2、狀態表化簡。 3、以各類型的正反器完成設計。 9、循序邏輯應用 1、計數器。 2、跑馬燈。 3、紅綠燈。 第五章 順序邏輯
Transcript of 班級：資訊二 學號：541882 姓名：賴明志 ·...
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541882
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1
1 2 3 4
2
1 2 3 4 5 6 7
3
1 2 3 4 5
4
1 2 3 4 5 6
5 1 2 3
6
1 2 3 4 5 6 78
7
1RS 2D 3JK 4T
8 1 2 3
9 1 2 3
-
1 100 25 4
2
(1) 4144
(2) 4556
(3)
(4)
3
(1) 2 1
12
(2) 1 12
(3) 2 12
4
5103-105
103 104 105
- - 3 2 1 7 3 1 1 3 2 1 2 2 1 1 3 2 3 3 2 5 3
4 4 0 1 1 3
5 5 3 2 2 46 6 6 9 5 7
7 7 3 2 2 5
8 89 3 4 4 25 25 25
-
1
1
2 N
21011nn aa.aaaaN ax
296.8 10
101.1 2
157.2 8
3
22
11
00
1n1n
nn10 rararararaN
r
ax
rx ax
101.1
10122 21212021)1.101(
5.0104
10)5.5(
157.2
10128 82878581)2.157(
25.074064
10)25.111(
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2
1Decimal number system
r = 10 ax 0 9 10 1
2Binary number system
r = 2 ax 0 1 2 1
(1) 0 1
(2) 0 1binary digit bit
(3) 8 bit Byte B
(4) MSB
LSB
3Octal number system
r = 8 ax 0 7 8 1
8)3.25(
1018 838582)3.25(
125.031582
375.0516
10)375.21(
4Hexadecimal number system
r = 16 ax 0 F 16 1
A = 10B = 11C = 12D = 13E = 14F = 15
16)C.4A2(
101216 16121641610162)C.4A2(
0625.0121416102562
75.04160512
10)75.676(
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3
5BCD Binary-Code Decimal
(1) BCD 0 9
(2) BCD 4
0 1 2 3 4 5 6 7 8 9
BCD 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001
(3)
(4) BCD
A
B 0 9 AZ
C BCD
1 0 11 0
2 1 1
1 72
(7) 10 = (0111) BCD(2) 10 = (0010) BCD
72 = (0111) BCD(0010) BCD = (0101) BCD = (5) 10
(7) 10 = (0111) BCD(2) 10 =(0010) BCD = (1101) 1s_BCD
72 = 7(2) = (0111) BCD(1101) 1s_BCD
= (0001 0100) BCD = (14) 10
(14) 10
(2) 10 1 (1101) BCD
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4
D 10
6 BCD
BCD
1010 111110 15
BCD
75
(7) 10 = (0111) BCD(5) 10 = (0101) BCD
75 = (0111) BCD(0101) BCD = (1100) BCD
(1100) 2 12 BCD
(1100) BCD(0110) = (0001 0010) BCD
(5) BCD
BCD
0 0000 0000 0011 (0) 0000 (0) 1 0001 0001 0100 (1) 0001 (1) 2 0010 0010 0101 (2) 0011 (3) 3 0011 0011 0110 (3) 0010 (2) 4 0100 0100 0111 (4) 0110 (6) 5 0101 0101 1000 (5) 0111 (7) 6 0110 0110 1001 (6) 0101 (5) 7 0111 0111 1010 (7) 0100 (4) 8 1000 1000 1011 (8) 1100 ( 12) 9 1001 1001 1100 (9) 1101 ( 13) 10 1010 0001 0000 0100 0011 1111 ( 15) 11 1011 0001 0001 0100 0100 1110 ( 14) 12 1100 0001 0010 0100 0101 1010 ( 10) 13 1101 0001 0011 0100 0110 1011 ( 11) 14 1110 0001 0100 0100 0111 1001 (9) 15 1111 0001 0101 0100 1000 1000 (8)
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5
6Excess-three code
(1) BCD
0 9
(2) BCD 0011
0 1 2 3 4 5 6 7 8 9
BCD 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001
0011 0100 0101 0110 0111 1000 1001 1010 1011 1100
(3)
A1 BCD
B 1
C1
9
(1) 10 0100 (8) 10 1011
0100 1011 1
1 8 9
0 92 73 64 5
D
BCD BCD
7Gray code
(1)
(2) MSB
(3)
/
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6
8America Standard Code Information Interchange
ASCII
(1)
(2) ASCII 7 000 0000
111 1111 27 = 128
(3) ASCII-8 7 ASCII
28 = 256
ASCII13(0000 1101) 213H Enter
48(0011 0000) 230H 0
65(0100 0001) 241H A
97(0110 0001) 265H a
1
XOR
1 2
(65) 10 A MSB
BC
(65) 10 = A(66) 10 = B(67) 10 = C
A(65) 10 = (P100 0001) 2 P = 0
B(66) 10 = (P100 0010) 2 P = 0
C(67) 10 = (P100 0011) 2 P = 1
B (0100 0010) 2 = (66) 10
C (1100 0011) 2 = (195) 10
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7
1
(1)
1101.11
2101232 212121202121)11.1101(
25.05.01048 10)75.13(
(2)
211 210 29 28 27 26 25 24 23 22 21 20 2-1 2-2 2-3 2-4
2048 1024 512 256 128 64 32 16 8 4 2 1 .5 .25 .125 .0625
1101.11
1 1 0 1 . 1 1
8 4 2 1 0.5 0.25 1
10)75.13(25.05.01048
2
(1)
A
B
0
BCD
16 8 4 2 1 .5 .25
1 3
1 4
2 XOR 3 1 4
1 4
4 1 3 2 XOR
MSB
4
4
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8
25.625
2 25 1 .625 2 12 0 2 2 6 0 1 .250
2 3 1 2 1 0 .500
2 1 .000
210 )101.11001()625.25(
25.625
8 25 1 .625 3 8 5 .000
810 )5.31()625.25(
25.625
16 25 9 .625 1 16 3.750 + 6.25 A10 .000
1610 )A.19()625.25(
(2)
25.625
16 8 4 2 1 0.5 0.25 0.125
1 1 0 0 1 . 1 0 1
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3
(1) A B
(2)
A1 3
B 3 0
1101110.01101
001 101 110 . 011 010 3 0
1 5 6 . 3 2
(3)
A1 4
B 4 0
1101110.01101
0110 1110 . 0110 1000 4 0
6 E . 6 8
(4)
5A.C
5 A . C 1 4
0101 1010 . 1100 0
1011010.11
001 011 010 . 110 3 0
1 3 2 . 6
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10
4
(1)
A MSB MSB
B MSB LSB
XOR 0 1
11101011
MSB LSB
1 1 1 0 1 0 1 1
XOR
1 0 1 1 0 0 1 0
(2)
A MSB MSB
B MSB LSB
XOR 0 1
10110010
MSB LSB
1 0 1 1 0 0 1 0
XOR
1 1 1 0 1 0 1 1
5BCD
(1) 1 4
(2) BCD 4 0
38 BCD
3 8 1 4
0011 1000 BCD
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11
6
(1)
A1 34
B 4 0
38
3 8
3
6 11 1 3 4
0110 1011
(2) 4
1 3
01110100.0110
0111 0100 . 0110 4 1
7 4 . 6 3
3 3
4 1 . 3
BCD 01001001.0011
0100 1001 . 0011 4 1
4 9 . 3
3
7 12 . 6 1 3 4
0111 1100 . 0110
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Complement
1
2 r
(1) r-1 (r-1)' sr-1
1' s 1 0 11 0
7' s 7
9' s 9
15' s 15
(2) r r' sr-1 1
2' s1' s1
8' s7' s1
10' s9' s1
16' s15' s1
(11010) 2 1' s 2' s
(11111) 2(11010) 2 = (00101) 1s
(00101) 1s1 = (00110) 2s
(256) 10 9' s 10' s
(999) 10(256) 10 = (743) 9s
(743) 9s1 = (744) 10s
(256) 8 7' s 8' s
(777) 8(256) 8 = (521) 7s
(521) 7s1 = (522) 8s
(A38) 16 15' s 16' s
(FFF) 16(A38) 16 = (5C7) 15s
(5C7) 15s1 = (5C8) 16s
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13
1 1' s
1' s
50 8 1' s
50100011 001021100 11011's
21' s
1' s 1' s
1's 1100 0011
1100 00111's0011 11002(321684)106010
3 2' s
1' s 1
99 8 2' s
99100110 001121001 11001's1001 11012's9D16
42' s
2' s 1 1' s
8 2's F0H
F0H1111 00002's1110 11111's0001 000021610
1 4 bit
0 1 2 13 14 15
0000 0001 0010 1101 1110 1111
MSB1
8 7 6 1 0 0 1 6 7
1 111 1 110 1 001 1 000
1' s 1 000 1 001 1 110 1 111
2's 1 000 1 001 1 110 1 111
0 000 0 001 0 110 0 111
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14
21's2's MSB0
3 MSB1
(1) MSB
(2)1' s1' s0110
(3)2' s2's1's1
4n bit
(1)02n1
(2)(2n-11)(2n-11)
(3)1' s(2n-11)(2n-11)
(4)2' s(2n-1)(2n-11)
5 1' s
2's
8 bit
1 111 11112 0 111 11112 28-11
28-11
127127
1 000 00001's 0 111 11112 1' s
28-11
28-11 127127
1 000 00002's 0 111 11112 2' s
28-1
28-11 128127
1 2
(1) 00 = 0 (1) 00 = 0
(2) 01 = 1 (2) 01 = 1 1
(3) 10 = 1 (3) 10 = 1
(4) 11 = 0 1 (4) 11 = 0
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15
8 bit 2111
(21) 10 = (0001 0101) 2(11) 10 = (0000 1011) 2
0001 0101 0000 1011 0010 0000 (0010 0000) 2 = (32) 10
3
(1)
A
B
C
8bit 2111
(21) 10 = (0001 0101) 2
(11) 10 = (0000 1011) 2
0001 0101 0000 1011 0000 1010
(0000 1010) 2 = (10) 10
8bit 1121
(11) 10 = (0000 1011) 2
(21) 10 = (0001 0101) 2
0001 0101 0000 1011 0000 1010
(0000 1010) 2 =(10) 10
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16
(2) 1's XY Y Y1's XY1's
AMSB
1 LSB
BMSB 1's
1' s
8bit 1' s 2111
(21) 10 = (0001 0101) 2
(11) 10 =(0000 1011) 2 = (1111 0100) 1s
0001 0101 1111 0100
1 0000 1001
1 LSB
0000 1001 1
0000 1010
(0000 1010) 2 = (10) 10
8bit 1' s 1121
(11) 10 = (0000 1011) 2
(21) 10 =(0001 0101) 2 = (1110 1010) 1s
0000 1011 1110 1010
1111 0101
1' s
1' s 1' s
(1111 0101) 1s =(0000 1010) 2
(0000 1010) 2 =(10) 10
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(3) 2's XY Y Y2's XY2's
AMSB 1
2's 1's 1's
BMSB 2's
2' s
8bit 2' s 2111
(21) 10 = (0001 0101) 2
(11) 10 =(0000 1011) 2 = (1111 0101) 2s
0001 0101 1111 0101
1 0000 1010
1
(0000 1010) 2 = (10) 10
8bit 2' s 1121
(11) 10 = (0000 1011) 2
(21) 10 =(0001 0101) 2 = (1110 1011) 2s
0000 1011 1110 1011
1111 0110
2' s
2' s 2' s
(1111 0110) 2s1= (1111 0101) 1s =(0000 1010) 2
(0000 1010) 2 =(10) 10
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18
1Carry
8bit 15125
8bit (1111 1111) 2 = (281) 10 = (255) 10
(15) 10(125) 10 = (140) 10
(15) 10 = (0000 1111) 2(125) 10 = (0111 1101) 2
0000 1111 0111 1101
0 1000 1100 8bit c bit = 0
(1000 1100) 2 = 12884 = (140) 10
8bit 135125
8bit (1111 1111) 2 = (281) 10 = (255) 10
(135) 10(125) 10 = (260) 10
(135) 10 = (1000 0111) 2(125) 10 = (0111 1101) 2
1000 0111 0111 1101
1 0000 0100 9bit c bit = 1
(0000 0100) 2 = (4) 10
2Overflow 2' s
(1) Cv Cs
Cv MSB
Cs
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A
B
8bit 2' s (15)(25)
8bit 2' s (0111 1111) 2 =(28-11) 10 =(127) 10
(15) 10(25) 10 =(40) 10
(15) 10 = (0000 1111) 2(25) 10 =(25) 10 = (0001 1001) 2
000 Cv = 0
000 Cs = 0
0000 1111 0001 1001
0010 1000 0
(0010 1000) 2 =(328) =(40) 10
8bit 2' s (15)(25)
8bit 2' s (1000 0000) 2 =(28-1) 10 =(128) 10
(15) 10(25) 10 =(40) 10
(15) 10 =(0000 1111) 2 = (1111 0000) 1s = (1111 0001) 2s
(25) 10 =(0001 1001) 2 = (1110 0110) 1s = (1110 0111) 2s
111 Cv = 1
111 Cs = 1
1111 0001 1110 0111
1101 1000 1 2' s
(1101 1000) 2s =(324211) =(40) 10
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20
(2) Cv Cs
A
B
8bit 2' s (15)(125)
8bit 2' s (0111 1111) 2 =(28-11) 10 =(127) 10
(15) 10(125) 10 =(140) 10
(15) 10 = (0000 1111) 2(125) 10 =(125) 10 = (0111 1101) 2
011 Cv = 1
001 Cs = 0
0000 1111 0111 1101
1000 1100 1 2' s
(1000 1100) 2s =(643216211) =(116) 10
8bit 2' s (15)(125)
8bit 2' s (1000 0000) 2 =(28-1) 10 =(128) 10
(15) 10(125) 10 =(140) 10
(15) 10 =(0000 1111) 2 = (1111 0000) 1s = (1111 0001) 2s
(125) 10 =(0111 1101) 2 = (1000 0010) 1s = (1000 0011) 2s
100 Cv = 0
110 Cs = 1
1111 0001 1000 0011
0111 0100 0
(0111 0100) 2 =(6432164) =(116) 10
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21
(3) Cv
CsXOR
Cv Cs
(Overflow) O bit
XOR
XOR
0 1
A o bit = 0
B o bit = 1
Cs Cv Overflow
0 0 0 Cs Cv 0
0 1 1 Cs Cv 1
1 0 1 Cs Cv 1
1 1 0 Cs Cv 0
(4)
A
B
C
(A) A5H5AH(B) BBHCCH(C) 40H50H
(A) A5H5AHFFH
(B) BBHCCH87H
(C) 40H50H90H
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22
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23
1
0 1
(1) 0 FalseLo
(2) 1 TrueHi
2
(1) Buffer
A
B
IEEE
A F
AF
C IC
IC
A F 0 0 1 1
A
F
TTL7407 CMOS4050
(2) NOT GateInverter
A
0 ( Lo )
1 ( Hi )
NOT NOT BUFFERA F = A A F = A
1A F
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24
B bar
C1' s0 11 0
D
IEEE
A F
AF 1's
E IC
IC
A F 0 1 1 0
A
F
TTL7404 CMOS4049
(3) AND Gate
A
B 0
0 1 1
C
IEEE
AB F
BAF 00 11
D IC
IC
A B F 0 0 0 0 1 0 1 0 0 1 1 1
A
B
F
TTL7408 CMOS4081
1A F
&A FB
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25
(4) OR Gate
A
B
1 1 0 0
1110 0 1
OR 111 1
C
IEEE
AB F
BAF 11 00
D IC
IC
A B F 0 0 0 0 1 1 1 0 1 1 1 1
A
B
F
TTL7432 CMOS4071
(5) NAND Gate
ANAND ANDNOT
BNAND
C
IEEE
AB F
BAF
ANDNOT 01 10
1A FB
&A FB
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26
D IC
IC
A B F 0 0 1 0 1 1 1 0 1 1 1 0
A
B
F
TTL7400 CMOS4011
ENAND ANDNOT
NOTOR
BAF AND NOT NOT ORNAND
A
BF
A
BF
A
B F BAF
(6) NOR GATE
ANOR ORNOT
BNOR
C
IEEE
AB F
BAF
ORNOT 10 01
D IC
IC
A B F 0 0 1 0 1 0 1 0 0 1 1 0
A
B
F
TTL7402 CMOS4001
1A FB
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27
ENOR ORNOT
NOTAND
BAF NOR OR NOT NOT AND
A
BF
A
BF
A
BF
BAF
(7) Exclusive OR GATEXOR
A
B 1 0
1 1 0 1
C
IEEE
B
CF
CBF
10 11
D IC
IC A B C F0 0 0 00 0 1 10 1 0 10 1 1 01 0 0 11 0 1 01 1 0 01 1 1 1
B
C
F
TTL7486 CMOS4030
EXOR
BABAF
BAF
NAND NOT-AND-OR
F FA
B
A
B
1B FC
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28
(8) Exclusive NOR GATEXNOR
A
XNOR XOR XNORXORNOT
B 1 1
1 0 1 0
CXOR
XNOR
D
IEEE
B
CF
CBF CBF
XORNOT 11 10
E IC
IC
A B C F 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 0
B
C
F
TTL74266 CMOS4077
FXNOR
BABAF
BAF
NOT-AND-OR NOR
FF
A
BA
B
1B FC
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F
A
B
X
Y
Z
XYZF
BAX XAY BXZ ZYF
NAND 0 1 1 0
A B BAX XAY BXZ ZYF 0 0 1 1 1 0 0 1 1 1 0 1 1 0 1 0 1 1 1 1 0 1 1 0
F
A
B
X
Y
Z
XYZF
BAX XAY BXZ ZYF
NOR 1 0 0 1
A B BAX XAY BXZ ZYF 0 0 1 0 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1
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30
1Tri-State Gate
(1) Enable S
A S Enable
Active Hi S = 1 F = A
Active Lo S = 0 F = A
B S Disable
floating
Active Hi S = 0 F
Active Lo S = 1 F
(2) TTL
BUS
I/O
(3) IC TTL 74125CMOS 4502
A F Active Hi S Enable
A F Active Lo S Enable
(MPU)
(Memory)
/
(I / O Unit)
(Address Bus) (Data Bus) (Control Bus)
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31
2Open Collector GateOC
(1)
R ()
Vcc ()
OCA
FB
A
BF
(2)
A
B
AND
Wired AND
R ()
Vcc ()
OC
OC
R ()
Vcc ()
OC
OC Wired AND
A
FB
C
D
A
F B
C
D
X
Y
BAX DCY
DCBAYXF
(3) TTL
(4) IC TTL 740574067416
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A F
3Schmitt Trigger Gate
(1)
(2)
4Transmission Gate
(1)
X Y Y X
A = 0
A = 1
(2)
1NOT
(1) NANDNOT
A NAND Vcc 1 A1AF
B NAND AAAF
(2) NORNOT
A NOR 0 A0AF
B NOR AAAF
NAND NAND NOR NOR
A
Vcc
F A FA
F A F
NAND NOT NAND NOT NOR NOT NOR NOT
(3) XORNOT
XOR Vcc 1 A1A1AF
X Y A
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(4) XNORNOT
XNOR 0 A0A0AF
EXOR EXNOR
A
Vcc
FA
F
EXOR NOT EXNOR NOT
2BUFFER
(1) ANDBUFFER
AND Vcc 1 A1AF
(2) ORBUFFER
OR 0 A0AF
(3) XORBUFFER
XOR 0 A0A0AF
(4) XNORBUFFER
XNOR Vcc 1 A1A1AF
EXORAND OR EXNOR
A
Vcc
FA
Vcc
FA
FA
F
AND BUFFER OR BUFFER EXOR BUFFER EXNOR BUFFER
3 IC
TTL 7400 IC 4 NANDTTL 7402 IC 4 NOR
NAND NOR
NOT
NOT OR
NOT
NOT AND
A A
B BF F
A
B
A
BFF
NAND NOR
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34
TTL 7400 2 NAND Gate AND Gate
AND NOT NOT NAND NANDAND
TTL 7400 3 NAND Gate OR Gate
NANDOR OR
NOT
NOT
NOT
NOT
NAND
NAND
TTL 7400 4 NAND Gate NOR Gate
NANDOR
NOT
NOT
NOT
NOT
NAND
NANDNOR NOT NAND
TTL 7402 2 NOR Gate OR Gate
NOT NOTOR OR NOR NOR
TTL 7402 3 NOR Gate AND Gate
NOT
NOT
NOT
NOTAND AND
NOR
NORNOR
TTL 7402 4 NOR Gate NAND Gate
NOT
NOT
NOT
NOTNOTNAND AND
NOR
NORNOR NOR
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35
1 1
0
2 1
0
3
1s
4
AND OR
OR AND
NAND NOR
NOR NAND
XOR XNOR
XNOR XOR
NAND
NOR
NAND NOR
A B F A 1s B 1s F 1s
0 0 1 1 1 0 0 1 1 1 0 0 1 0 1 0 1 0 1 1 0 0 0 1 0 1
1 0 1 0
0 1
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36
ANDOR
1AND OR
BACCABCBA BACCABCBA
2AND OR AND OR
AND OR
ABCD
F
ABCD
FF
ABCD
ABCD
F
ABCD
FF
ABCD
AND
OR
NANDNOR
1AND NANDOR NOR AND
NANDOR NOR NAND AND
NOR OR
AND NAND NOT
NAND AND NOT
OR NOR NOT
NOR OR NOT
2NAND NOR
BACCABCBA BACCABCBA
3NAND NOR NANDNOR
NANDNOR
ABCD
F
ABCD
FF
ABCD
NAND
-
37
ABCD
F
ABCD
FF
ABCD
NOR
ANDOR NOT
ABCD
FF
ABCD
ABCD
FF
ABCD
ABCD
F
NAND
ABCD
F
NOR
XORXNOR
1Exclusive-ORXOR XOR
1 0
XOR BABABA
2Exclusive-NORXNOR XNOR
1 0
Equivalence BABABA
3XOR XNOR XOR XNOR
XNOR XOR
BABABA)BA()BA()BA()BA(BABABA
BABABA)BA()BA()BA()BA(BABABA
XOR XNOR NOTXNOR XOR NOT
4 XOR
1 1 1 0
5 XNOR
1 1 1 0
-
38
6XOR XNOR
BACCABCBA BACCABCBA
7XOR XOR
XOR XOR
ABCD
F
ABCD
FF
ABCD
XOR
DCBA D)C)BA(( )DC()BA(
8 XNOR Equivalence
XNOR
XNOR XNOR
(1) XOR XORNOT
ABCD
F
ABCD
FF
ABCD
XNOR
DCBA D)C)BA(( )DC()BA(
(2) Equivalence
ABCD
F
ABCD
FF
ABCD
XNOR
DCBA D)C)BA(( )DC()BA( DCBA
9 XNOR Equivalence
XNOR
XNOR XNOR
ABC
F
ABC
F
XNOR
ABC
F
ABC
F
-
39
CBA C)BA( C)BA( CBA
XOR XNOR CBA CBA A B C CBA CBA )BA( C)BA( BA C)BA(
0 0 0 0 0 1 0 1 1 1 1 0 0 1 1 0 0 0 1 0 2 0 1 0 1 0 1 0 0 0 3 0 1 1 0 1 1 1 0 1 4 1 0 0 1 0 1 0 0 0 5 1 0 1 0 1 1 1 0 1 6 1 1 0 0 1 0 1 1 1 7 1 1 1 1 0 0 0 1 0
CBA CBA CBA
XOR XNOR CBA A B C CBA CBA )BA( C)BA(
0 0 0 0 0 1 1 0 1 0 0 1 1 0 1 1 2 0 1 0 1 0 0 1 3 0 1 1 0 1 0 0 4 1 0 0 1 0 0 1 5 1 0 1 0 1 0 0 6 1 1 0 0 1 1 0 7 1 1 1 1 0 1 1
10 XNOR
(1) Equivalence XNOR
XOR
XNOR XOR XORNOT
XNOR CBA CBACBA CBA
Equivalence CBA CBA XOR
(2) Equivalence XNOR
DCBA D)CBA( D)CBA( DCBA
DCBA DCBA DCBA XNOR
-
40
-
41
1 NOT AND OR
2
(1) 011
0A A 1A 1
AA A AA 1
(2) 001
0A 0 1A A
AA A AA 0
(3)
A A
3
BA AB BA AB
4
C)BA( )CB(A C)BA( )CB(A
5
)CB(A )CA()BA(
)CB(A CABA
)DC()BA( DBCBDACA
)CA()BA(CBA
CBBACAAA
CBBACAA
CB)BC1(A
CB1A
CBA
-
42
6
(1)
BAA A )BA(A A
A
)B1(A BAAA
1A BAA
A )B1(A A
(2)
BAA BA )BA(A BA
)BA()AA( BAAA
)BA(1 BA0
BA BA
7
(1) CBA CBA
(2) CBA CBA
8
CBBACA CBCA C C
A B BA
CBBACA
CB1BACA )1A(CB)B1(CA
CB)CC(BACA 1CB1CA
CBCBACBACA CBCA
-
43
)BA()BA(
BBBABAAA
0BABA0
BABA
)XORBA(BA
)BA()BA(
BBBABAAA
0BABA0
BABA
)XNORBA(BA
BABABABA
)BB(A)BB(A
1A1A
AA
1
1CBACBACBACBA
1A1
1
CBACBACBACBA
)BB(CA)BB(CA
1CA1CA
CACA
)AA(C
1C
C
-
44
BAA
)BA(A
BAA
B0
0
BAA
)BA(A
BAAA
BA0
BA
BAA
)BA(A
)BA()AA(
)BA(1
BA
BAA
)BA(A
BAA
B1
1
DCBA
)DC()BA(
)DC()BA(
)DC()BA(
-
45
1Sum of ProductsSOP
ANDOR
(1)
A fABC
CBA CBA
A BA
B fABC
CBACBA)CC(BA1BABA
CBACBACBACBA)CC()BB(AA
C
1 2 n
1 0
)7631(
CBACBACBACBA)CBA(f111011110100
LSBMSB
D
1 0
CBABAC)BA(f
)610(
CBACBACBA
CBABAC)BA(f
011100000
-
46
A B C
SOP C)BA(f
0 0 0 0 CBA 1
1 0 0 1 CBA 1
2 0 1 0 CBA 0
3 0 1 1 CBA 0
4 1 0 0 CBA 0
5 1 0 1 CBA 0
6 1 1 0 CBA 1
7 1 1 1 CBA 0
2Products of SumPOS
ORAND
(1)
A fABC
CBA CBA
A BA
B fABC
)CBA()CBA()CC()BA(0BABA
)CBA()CBA()CBA()CBA(
)CC()BB(AA
C
1 2 n
0 1
-
47
)7631(
)CBA()CBA()CBA()CBA(C)BA(f111011110100
D
0 1
)CBA()BA(C)BA(f
)761(
)CBA()CBA()CBA(
)CBA()BA(C)BA(f
100011111
A B C
POS C)BA(f
0 0 0 0 CBA 1
1 0 0 1 CBA 0
2 0 1 0 CBA 1
3 0 1 1 CBA 1
4 1 0 0 CBA 1
5 1 0 1 CBA 1
6 1 1 0 CBA 0
7 1 1 1 CBA 0
SOP POS
)76432()510()CBA(f
BACA SOP POS
010110101111CBACBACBACBABACA)CBA(f
)6410()7532()CBA(f
-
48
Karnaugh Map
1
2
(1)
B A
0 B
1 B
B A
0 1
0 A
00 BA
01 BA
0 0 1
1 A
10 BA
11 BA
1 2 3
(2)
BC A
00 CB
01 CB
11 CB
10 CB
BC A
00 01 11 10
0 A
000 001 011 010 0 0 1 3 2
1 A 100 101 111 110 1 4 5 7 6
(3)
CD AB
00 DC
01 DC
11 DC
10 DC
CD AB
00 01 11 10
00 BA
0000 0001 0011 0010 00 0 1 3 2
01 BA
0100 0101 0111 0110 01 4 5 7 6
11 BA
1100 1101 1111 1110 11 12 13 15 14
10 BA
1000 1001 1011 1010 10 8 9 11 10
-
49
3
(1)
(2) SOP 10
(3) POS 01
(4) 0 1
X dont caredont care
d 1 2 n
)7631(C)BA(f
BC A
00 01 11 10
0 0 1 1 0 1 0 0 1 1
)52(d)7631(C)BA(f
BC A
00 01 11 10
0 1 0 0 X 1 1 X 0 0
CBAC)BA(f
C)BB()AA()CC(BACBAC)BA(f
100110101111000100CBACBACBACBACBACBA
)75310(
BC A
00 01 11 10
0 1 1 1 0 1 0 1 1 0
-
50
4
(1) SOP1
POS0
(2)
A2 1 2 4 8 16 1
0
B
C
D 1 0 1
0 1 0
Edont care 1 0 AD
1 0
(3) 0 1
BC A
00 01 11 10
0 0 1 1 0 1 0 0 0 0
CBACBA )BB(CA 1CA CA
A1 0
B1 0
1 0
2
C1 0
-
51
DSOP
1
0
SOP
EPOS
1
0
POS
SOP
)12113210(D)CBA(f
CD AB
00 01 11 10
00 1 1 1 1 01 0 0 0 0 11 1 0 0 0 10 0 0 1 0
SOP 1
SOP 1
BADCBDCBAD)CBA(f
SOP
)11109842(d)1312765310(D)CBA(f
CD AB
00 01 11 10
00 1 1 1 X01 X 1 1 1 11 1 1 0 0
10 X X X X
SOP 1
d X
SOP 1
X 0 1
CAD)CBA(f
-
52
POS
)15131087520(D)CBA(f
CD AB
00 01 11 10
00 0 1 1 0 01 1 0 0 1 11 1 0 0 1 10 0 1 1 0
POS 0
POS 0
)DB()DB(D)CBA(f
POS
)31(d)7420(C)BA(f
BC A
00 01 11 10
0 0 X X 0 1 0 1 0 1
POS 0
POS 0
)CB()CB(AC)BA(f
SOP
)76310(C)BA(f
BC A
00 01 11 10
0 1 1 1 0 1 0 0 1 1
2 1 BACABAC)BA(f
BC A
00 01 11 10
0 1 1 1 0 1 0 0 1 1
2 1 BACBBAC)BA(f
-
53
5SOPPOS
(1) SOP 10
(2) POS0
1
0
CBCAC)BA(f POS
CBACBACBACBAC)BA(f
BC A
00 01 11 10
0 0 0 1 0 1 0 1 1 0
SOP 1 0
POS 0
)BA(CC)BA(f
6POSSOP
(1) POS 01
(2) SOP1
1
0
)CB()CA(C)BA(f SOP
)CBA()CBA()CBA()CBA(C)BA(f
BC A
00 01 11 10
0 0 1 1 0 1 0 1 1 1
POS 0 1
SOP 1
BACC)BA(f
-
54
)1395410(D)CBA(f
SOP POS
CD AB
00 01 11 10
00 1 1 0 0 01 1 1 0 0 11 0 1 0 0 10 0 1 0 0
1 0
SOP 1
SOP DCCAD)CBA(f
CD AB
00 01 11 10
00 1 1 0 0 01 1 1 0 0 11 0 1 0 0 10 0 1 0 0
1 0
POS 0
POS )DA(CD)CBA(f
POS )DA(C
DCCA SOP
7
(1) XOR
XOR
A B F
0 0 0 B
A 0 1
0 1 1 0 0 1
1
1 0 1 1 1 0
1 1 0 BABA)21(B)A(f
1
-
55
BC A
00 01 11 10
0 0 1 0 1
1 1 0 1 0
1
1
XOR
CBA)7421()CBA(f
XOR
A B C F 1
0 0 0 0 0
1 0 0 1 1
2 0 1 0 1
3 0 1 1 0
4 1 0 0 1
5 1 0 1 0
6 1 1 0 0
7 1 1 1 1
(2) XNOR
XNOR
A B F
0 0 1 B
A 0 1
0 1 0 0 1 0
1 0 0 1 0 1
1 1 1 BABA)30(B)A(f
1
1
-
56
CD AB
00 01 11 10
00 1 0 1 0
01 0 1 0 1
11 1 0 1 0
10 0 1 0 1
1
1
XNOR
)15211096530(D)CBA(f
XNOR
A B C D F 1
0 0 0 0 0 1
1 0 0 0 1 0
2 0 0 1 0 0
3 0 0 1 1 1
4 0 1 0 0 0
5 0 1 0 1 1
6 0 1 1 0 1
7 0 1 1 1 0
8 1 0 0 0 0
9 1 0 0 1 1
10 1 0 1 0 1
11 1 0 1 1 0
12 1 1 0 0 1
13 1 1 0 1 0
14 1 1 1 0 0
15 1 1 1 1 1
-
57
1
(1)
(2)
(3)
2
(1)
(2) Fn+1
Fn
(3)
1
2
3NANDNOR
NOT
ANDOR
A FB
A B Fn+1 Fn
-
58
(1)
XF NOR 10 01
Y NAND 01 10
A B X Y F 0 0 1 1 0 0 1 0 1 0 1 0 0 1 0 1 1 0 0 1
F BA AND
(2)
BAX BAY BABAYXF
BABAF
)BA()BA(F
)BA()BA(F
BBABAAF
BABAF
BAF AND
(3) NANDNOR
A
F
B
X
Y
A
F
B
X
Y
A
F
B
X
Y
BAX BAY )BA()BA(YXF
)BA()BA(F
BBABAAF
BABAF
BAF AND
A
F
B
X
Y
-
59
NAND
BAX )BA(AXAY B)BA(BXZ
)B)BA(())BA(A(ZYF
)BBBA()BAAA(F
)0BA()BA0(F
BABAF
BAX )BA(AXAY B)BA(BXZ
)B)BA(())BA(A(ZYF
))BB()BA(())BA()AA((F
)1)BA(())BA(1(F
)BA()BA(F
BBBABAAAF
0BABA0F
BABAF
A
F
B Z
X
Y
F
A
B Z
X
Y
A
F
B
A
F
B Z
X
Y
A
F
B
A
F
B Z
X
Y
-
60
1
21
3NOTAND OR
4 NAND SOP
AND OR AND OR NOT
AND NOTNANDNOT OR
NAND
NAND DCCBBAf
5 NOR POS
OR AND OR AND NOT
OR NOTNORNOT AND
NOR
NOR )DC()CB()BA(f
F F F
AB
C
D
AB
C
D
AB
C
D
NAND NAND
NOT
NAND
F F F
AB
C
D
AB
C
D
AB
C
D
NOR NOR
NOT
NOR
-
61
A 45% B 30%
C 15% D 10%
ABCD
1 0
F
1 0
A 45%
B 30%
C 15%
D 10% F
CD AB 00 01 11 10
0 0 0 0 0 0 00 0 0 0 0
1 0 0 0 1 0 01 0 0 1 0
2 0 0 1 0 0 11 1 1 1 1
3 0 0 1 1 0 10 0 1 1 1
4 0 1 0 0 0
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 1
8 1 0 0 0 0
9 1 0 0 1 1
10 1 0 1 0 1
11 1 0 1 1 1
12 1 1 0 0 1
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 1
DCBCADABAF
F
AB
C
D
-
62
NAND BCD
BCD 1 BCD 0
BCD ABCD
F
A B C D F
CD AB 00 01 11 10
0 0 0 0 0 0 00 0 0 0 0
1 0 0 0 1 0 01 0 0 0 0
2 0 0 1 0 0 11 1 1 1 1
3 0 0 1 1 0 10 0 0 1 1
4 0 1 0 0 0
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 0
8 1 0 0 0 0
9 1 0 0 1 0
10 1 0 1 0 1
11 1 0 1 1 1
12 1 1 0 0 1
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 1
CABAF
F
AB
CD
F
AB
CD
NAND
NAND A
BC XYZ
BCA X 1 X 0
ACB Y 1 Y 0
ABC Z 1 Z 0
-
63
D0 D1 Y0 D2 D3 Y1 D4 D5 Y2 D6 D7 8 3
1Encoder
(1)
(2) D D = 2Y
Y
8 8 = 23 3
00011107
8 8
(3) IC
ATTL 74147 104
BTTL 74148 83
(4)
A
B83
D7 D6 D5 D4 D3 D2 D1 D0 Y2 Y1 Y0
0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 2 0 0 0 0 0 1 0 0 0 1 0 3 0 0 0 0 1 0 0 0 0 1 1 4 0 0 0 1 0 0 0 0 1 0 0 5 0 0 1 0 0 0 0 0 1 0 1 6 0 1 0 0 0 0 0 0 1 1 0 7 1 0 0 0 0 0 0 0 1 1 1
0 1
-
64
(5)
A
B
C83D7
D7 D6 D5 D4 D3 D2 D1 D0 Y2 Y1 Y0
0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 X 0 0 1 2 0 0 0 0 0 1 X X 0 1 0 3 0 0 0 0 1 X X X 0 1 1 4 0 0 0 1 X X X X 1 0 0 5 0 0 1 X X X X X 1 0 1 6 0 1 X X X X X X 1 1 0 7 1 X X X X X X X 1 1 1
X Dont Care 0 1
D7 D0 D7
D0
D7D0 = 0010 1101 D3D2D0
D5 D5
Y2Y1Y0 = 101
D0 D7
X 0
-
65
32 CBA
C1 AB XY01
C0 B1 A XY10
C0 B0 A1 XY11
XY00
CBA
XY
C B A X Y
BA C 00 01 11 10
0 0 0 0 0 0 0 0 1 1 1
1 0 0 1 1 1 1 0 0 0 0
2 0 1 0 1 0 BCACX
3 0 1 1 1 0
4 1 0 0 0 1 BA C 00 01 11 10
5 1 0 1 0 1 0 0 1 0 0
6 1 1 0 0 1 1 1 1 1 1
7 1 1 1 0 1 ABCY
32
X
ABC
Y
-
66
(6)
AROM
BONVcc
Vcc 0
COFFVcc
0
D44
D3 D2 D1 D0 Y3 Y2 Y1 Y0
0 0 0 0 1 1 0 1 1 1 0 0 1 0 1 0 1 0 2 0 1 0 0 0 1 0 1 3 1 0 0 0 1 1 0 0
R R R R
D0
D1
D2
D3
VccY3 Y2 Y1 Y0
4 4
D2_SW OFF Y0 = 0
D0_SW ON Y0 = 1
-
67
A0 A1 A2
3 8
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
2 (Decoder)
(1)
(2) A Y = 2A
Y
3 23 = 8 8
3 00011107
8 8
(3) IC
ATTL 74138 38 Active Lo
BTTL 74139 24 Active Lo
CTTL 7447 BCD LED
DTTL 7448 BCD LED
(4)
A
B38 Active Hi
A2 A1 A0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 0 0 2 0 1 1 0 0 0 0 1 0 0 0 3 1 0 0 0 0 0 1 0 0 0 0 4 1 0 1 0 0 1 0 0 0 0 0 5 1 1 0 0 1 0 0 0 0 0 0 6 1 1 1 1 0 0 0 0 0 0 0 7
0 1
-
68
(5)
An n2n
B
C
OR
38
)753(C)BA(f
BC A
00 01 11 10
0 0 0 1 0 1 0 1 1 0
CBCAC)BA(f
38
A2MSBA1A0 AMSBBC
Y3Y5Y7 OR
A B C F
0 0 0 0 0 1 0 0 1 0 2 0 1 0 0 3 0 1 1 1 4 1 0 0 0 5 1 0 1 1 6 1 1 0 0 7 1 1 1 1
A0
A1
A2
Y0Y1Y2Y3Y4Y5Y6Y7
3 8
FB
C
A
BC
A
F
-
69
(6) BCD
A LED
Vcc LED
B LED
LED Vcc
CBCD LED
BCD
D C B A a b c d e f g
0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 0 1 1 1 1 1 0 0 1 0 0 0 1 0 0 1 0 2 0 0 1 1 0 0 0 0 1 1 0 3 0 1 0 0 1 0 0 1 1 0 0 4 0 1 0 1 0 1 0 0 1 0 0 5 0 1 1 0 1 1 0 0 0 0 0 6 0 1 1 1 0 0 0 1 1 1 1 7 1 0 0 0 0 0 0 0 0 0 0 8 1 0 0 1 0 0 0 1 1 0 0 9
DBCD LED
LED
a f b g e c d p
a
b
c
d
e
f
g
p
Vcc a
b
c
d
e
f
g
p
-
70
3Multiplexer MUX
(1)
(2) I S2SS
(3)
A
B41
013012011010 SSISSISSISSIY
S1 S0 Y
0 0 0 I0 0 1 1 I1 1 0 2 I2 1 1 3 I3
(4)
An 2n1
MSBSnLSBS0
1Vcc
Bn 2n-11 NOT
n-1 1 F
In Vcc NOT
Y
S1S0
I1
I0
I3
I2
41
I0 I1 I2 Y I3 S1 S0
I0 4 1 MUX I1 I2 I3 S1 S0
Y
-
71
Cn 2n-21
n-2 2 F
fABC=1267
A 81 ABC
Vcc
S2 S1 S0
I0I1I2I3I4I5I6I7
8 1 MUX
F
A B C
Y
B 41 AB C
S1 S0 A B
C 00 01 10 11
0 0 1 0 1 1 1 0 0 1
C F I0C I1 C I20 I31
Vcc
S1 S0
I0
I1
I2
I3
F
A B
Y
4 1 MUX
C
41 BC A
B C A 00 01 10 11
0 0 1 1 0 1 0 0 1 1
A F I00 I1 A I21 I3A
Vcc
S1 S0
I0
I1
I2
I3
F
B C
Y
4 1 MUXA
C 21 A BC
S0=A BC 0 1
00 0 0 01 1 0 10 1 1 11 0 1
BC F I0 CB I1B
S0
I0
I1
2 1
F
A
Y
B C
-
72
4Demultiplexer DEMUX
(1)
(2) Y S2SS
(3)
A
B14
013
012
011
010
SSIYSSIY
SSIY
SSIY
S1 S0 Y3 Y2 Y1 Y00 0 0 0 0 0 I 0 1 1 0 0 I 0 1 0 2 0 I 0 0 1 1 3 I 0 0 0
(4) Enable
A I En
B SnS0 AnA0
C YnY0 YnY0
Y0
S1S0
I
41
Y1
Y2
Y3
I S1 S0
Y0 Y1 Y2 Y3
1 4 DEMUX S1 S0
Y0 Y1 Y2 Y3
I
-
73
5ROM
(1) ROM
(2) A D
0 2A1
2A D bit
)Byte(8
D2)bits(D2A
A
12 8 Byte
)Byte(K4)Byte(8
82)Byte(8
D2)bits(D212A
A
SRAM 6264 D 8 (bit) 64K (bit)
SRAM 6264
)bit(13AD2828K864K A13 13
ROM 0000h3FFFh ROM
()()1
3FFFh0000h14000h
41634(24)3421244K16K ()
SRAM 2114 D 4 (bit) 1K4 (bit)
SRAM 2114 IC 48KB 2114 IC
D bit 0 D-1 1 0 1 2A 2A-1 D-1 1 0
2A D (bit)
-
74
)bit(8K4848KB
IC )(962484K18K84
IC1
(3) 324 bit ROM532
324
A4A000000 Y0 D3D01011
A4A000001 Y1 D3D01010
A4A000010 Y2 D3D00101
A4A011111 Y31 D3D01100
(4) 24 24
En A1 A0 Y3 Y2 Y1 Y0 En A1 A0 Y3 Y2 Y1 Y01 X X 0 0 0 0 0 X X 0 0 0 00 0 0 0 0 0 1 1 0 0 0 0 0 10 0 1 0 0 1 0 1 0 1 0 0 1 00 1 0 0 1 0 0 1 1 0 0 1 0 00 1 1 1 0 0 0 1 1 1 1 0 0 0
R R R R
A0
A1
A2
A3
A4
Y0
Y1
Y2
Y31
D3 D2 D1 D0
:
324 ROM
324
: 532
A0 A0 A1 A1 En En Active Hi
24
Y0 Y0 Y1 Y1 Y2 Y2 Y3 Y3
A0 A0 A1 A1 En En Active Lo
24
Y0 Y0 Y1 Y1 Y2 Y2 Y3 Y3
-
75
nm
(n1) 2m
24
38
(1) 24 En A1A0
38 A2A1A0
(2) 24 Y3Y2Y1Y0
38 Y3Y2Y1Y0
(3) 24 Y3Y2Y1Y0
38 Y7Y6Y5Y4
24 24
En A1 A0 Y3 Y2 Y1 Y0 Y3 Y2 Y1 Y0 A2 A1 A0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0
A0 A0 A1 A1 A2 En A0 A1 En
24 38
Y0 Y0 Y1 Y1 Y2 Y2 Y3 Y3
Y0 Y4 Y1 Y5 Y2 Y6 Y3 Y7
-
76
6Programmable Array LogicPAL
(1) PAL
APAL IC NOTANDOR
B PAL IC
PAL BABAf
BA BA BA BA
(2) PAL
A PC
B
C
(3) PAL
PROM
F
A B
F
A A B B
PAL IC
F
A A B B
-
77
Flip-FlopF.F.
1
(1)
01
B-E 0VLo C-E
B-E VccHi C-E
(2)
R S Qn Qn Qn+1
0 0 0 1 1 0
0 1 Qn
0 1 0 1 1 0
1 1 1
1 0 0 1 1 0
0 0 0
1 1 0 1 1 0
A T1 B-E 0V T1 T1
C-E Qn Vcc
BQn Vcc R1 T2 B-E T2
Rc
Vcc
Q = Vcc0 V
Rc
Vcc
0 1Q = Vcc
Vcc
Q = 0 VVcc
Vcc
0 1Q = 0 V
Rc Rc
Rc1 Rc2
R1 R2
T2T1
Rb1 Rb2
Vcc
S R
QnQn
-
78
T2 C-E Qn 0V
CQn 0V R2 T1 B-E T1
Qn Qn
D R ResetS Set
R1 Qn 0Qn 1
S1 Qn 1Qn 0
(3) 1 bit
SRAM
2Clockck
(1) ck = 1
(2) ck = 0
(3) ck 0 1
(4) ck 1 0
(5) ck 0 1 1 0
1 1 0
ck F.F.
1 0 0
ck F.F.
1 0 0
ck F.F.
1 0 0
ck F.F.
1 0 0
ck F.F.
-
79
3Latch
(1) NOR R-S Latch
NOR R-S Latch 1
R S Qn Qn Qn+1
0 0 0 1 1 0
0 1 Qn
0 1 0 1 1 0
1 1 1
1 0 0 1 1 0
0 0 0
1 1 0 1 1 0
A R0S0 Qn
B R0S1 Qn 1
C R1S0 Qn 0
D R1S1 NOR Qn Qn
0
Qn Qn
Qn Qn
Race ConditionRC NOR R-S
Latch R1S1
QnR
S
R
S
Qn
Qn
Qn
-
80
(2) NAND R-S Latch
NAND R-S Latch 0
R S Qn Qn Qn+1
0 0 0 1 1 0
0 1 0 1 1 0
1 1 1
1 0 0 1 1 0
0 0 0
1 1 0 1 1 0
0 1 Qn
A R0S0 NAND Qn Qn
1
Qn Qn
Qn Qn
Race ConditionRC NAND R-S
Latch R0S0
B R0S1 Qn 1
C R1S0 Qn 0
D R1S1 Qn
Latch
QnR
S
R
S
Qn
Qn
Qn
-
81
4
(1) R-S Reset-Set Flip Flop R-S F.F.
Qn
Qn
R
SS
R
Qn
ck
R'
S'
Qn
ck
R-S R-S
ck S R Qn Qn+1 Qn Qn+1 S R
0 X X X Qn 0 0 0 X 0 1 1 0
1 0 0 0 1 Qn 1 0 0 1 1 1 X 0
1 0 1 0 1 0
1 1 0 0 1 1
1 1 1 0 1
AR-S J-KD T
B ck Qn+1Qn
CR-S NOR R-S Latch
R1S1
-
82
(2) J-K J-K Flip Flop J-K F.F.
Qn
Qn
K
JJ
K
Qn
ck
R'
S'
Qn
ck
J-K J-K
ck J K Qn Qn+1 Qn Qn+1 J K
0 X X X Qn 0 0 0 X 0 1 1 X
1 0 0 0 1 Qn 1 0 X 1
1 1 X 0 1 0 1 0 1 0
1 1 0 0 1 1
1 1 1 0 1 Qn
A ck Qn+1Qn
B J0K0 Qn
C J1K0 Qn 1
J-K J R-S S
D J0K1 Qn 0
J-K K R-S R
E J1K1 Qn
Qn+1 nQ ck
0 1
-
83
FPresetPR Qn1
ClearCR Qn0 PR CR
ck PR CR Enable
PR CR ck J K Qn+1
0 1 X X X 1 1 0 X X X 0 1 1 1 X X Qn 1 1 0 0 0 Qn 1 1 0 0 1 0 1 1 0 1 0 1
1 1 0 1 1 nQ
(3) D Data Flip Flop D F.F.
D Qn
Qnck
Qn
Qn
D
ck
R'
S'
D D
ck D Qn Qn+1 Qn Qn+1 D
0 X X Qn 0 0 0 0 1 1
1 0 0 1 0 1 0 0 1 1 1
1 1 0 1 1
A D JK R-S
NOTJ S D
D
PR J Qn ck K Qn CR
-
84
B ck Qn+1Qn
C ck Qn+1D
(4) T Toggle Flip Flop T F.F.
Qn
Qn
T
ck
R'
S'
T Qn
Qnck
T T
ck T Qn Qn+1 Qn Qn+1 T
0 X X Qn 0 0 0 0 1 1
1 0 0 1 Qn 1 0 1 1 1 0
1 1 0 1 nQ
A T J-K
J K T T
R-S T RS1
B ck Qn+1Qn
C ck
T0Qn+1Qn
T1Qn+1 nQ
J-K JK1 0 1
-
85
1R-S J-K R-S D R-S T
S
R
Qn
Qn
ckK
J S
R
Qn
Qn
ck
D
Tck ck
S
R
Qn
Qn
ck
S
R
Qn
Qn
ck ckT
2J-K D J-K T
J
K
Qn
Qn
ck
TD
ck Qn
Qn
K
J
ck ck
J
K
Qn
Qn
ck
Vcc
T
3D T D T
T D
ck
Qn
Qnck
D
ck
Qn
Qnck
T D
ck
Qn
QnT
R-S
QnAR
nQAS
A Qn nQ S R Qn+1
0 0 1 1 0
0 0
0 0
0 1 Qn
1 0 1 1 0
1 0
0 1
1 0 nQ
T
S
R
Qn
Qn
ckA
-
86
Counter
1Asynchronous
T J-K J K T
T1 JK1 Qn nQ
ck ck
2Synchronous
R-SJ-KD T
ck
ck
Qa Qb Qc Qa Qb Qc
ck
Hi ck
( Hi) ()
LSB MSB LSB MSB
3 ck
(1) MOD MSB
(2)
LSBMSB
(3)n 2n
MOD 2n ck 0 2n1
MSB ncko 2/ff
3 MOD 8 07
2 4 8
-
87
4
(1) Q Q
Q Q
Qn ck Qn Qn
Qn ck Qn Qn
Qn ck Qn Qn
Qn ck Qn Qn
ck
Hi
Qa ()Qb
ck
Hi
Qa () Qb
ck
Hi
Qa () Qb
ck
Hi
Qa () Qb
Q Q' Q Q'
(2)MOD MM2nMOD 2481632
A n T J-K
B FFT tpdntpd
C Tck tpd/1f Tck tpd/1f
D2481632
ED%50%
ck
Hi
2 4 8
ck1
0
0
0
2 3 4 5 6 7 8
1
0
0
0
1
0
1
1
0
0
0
1
1
0
1
0
1
1
1
1
1
0 1 2 3 4 5 6 7 8
0
0
0
fck = 96KHz
fa = 48KHz
fb = 24KHz
fc = 12KHz
Qa (LSB) Qb Qc (MSB)MOD 8 ( 0 7 )
C ' LoQcQbQa = 000 P ' C ' Hi
0
Qa ( 2 )
Qb ( 4 )
Qc ( 8 )
-
88
1 2 3 4 5 6 7 8
1
1
1
0
1
1
1
0
1
0
0
1
1
1
0
0
1
0
1
0
0
7 6 5 4 3 2 1
0
0
0
0
1
1
1
ck
Hi
2 4 8
Qa (LSB) Qb Qc (MSB)MOD 8 ( 7 0 )
P ' LoQcQbQa = 111 P ' C ' Hi
ck
7
Qa ( 2 )
Qb ( 4 )
Qc ( 8 )
(3)MOD M2n-1M2nMOD 3579151731
A n T J-K M
M 1 NAND
CLR 0AND CLR
B GFFT tpdtpdntpd
C Tck tpd/1f Tck tpd/1f
D
ED% 100%M
1M
ck
Hi 0
Qa Qb Qc
MOD 6 ( 0 5 ) 6 0
0 1 0 1 0
ck
Qa ( 2 )
Qb ( 6 )
Qc ( 6 )
1
0
0
0
2 3 4 5 6
1
0
0
0
1
0
1
1
0
0
0
1
1
0
1
1 0
1 0
0 1 2 3 4 5 0
0
6
fck = 96KHz
fa = 48KHz
fb = 16KHz
fc = 16KHz
-
89
ck 96KHz 50nS
MOD 8
MOD 8823 3
)S(n150n503tpdntpd FFT
)Hz(M67.6n150/1tpd/1f Tck(max)
8 Qa 4 Qb 2 Qc
Qa 2Qb 4Qc 8
)Hz(K482/K962/ff ckQa
)Hz(K244/K964/ff ckQb
)Hz(K128/K968/ff ckQc
QaQbQc 8 1 4
%058/4%D%D%D QcQbQa
ck 96KHz 50nS
10nS MOD 6
MOD 623-1623 3
)S(n160n10n503tpdtpdntpd GFFT
)Hz(M25.6n160/1tpd/1f Tck(max)
6 Qa 3 QbQc
Qa 2 Qb Qc 6
)Hz(K482/K962/ff ckQa
)Hz(K166/K966/fff ckQcQb
Qa 6 1 3 Qb Qc 1 2
%506/3%DQa %33.36/2%D%D QcQb
-
90
5
n
(1)
A
MOD M n1n 2M2 n
IC A LSB
B
C
D
J-K MOD 5
MOD 5 3 J-KALSBBCMSB
C F.F. B F.F. A F.F.
C B A C B A Jc Kc Jb Kb Ja Ka
01 0 0 0 0 0 0 1 0 X 0 X 1 X12 1 0 0 1 0 1 0 0 X 1 X X 1 23 2 0 1 0 0 1 1 0 X X 0 1 X34 3 0 1 1 1 0 0 1 X X 1 X 1 40 4 1 0 0 0 0 0 X 1 0 X 0 X57 57 X
BA C 00 01 11 10
BA C 00 01 11 10
BA C 00 01 11 10
0 0 0 1 0 0 0 1 X X 0 1 X X 1
1 X X X X 1 0 X X X 1 0 X X X
BAJc AJb CJa
-
91
BA C 00 01 11 10
BA C 00 01 11 10
BA C 00 01 11 10
0 X X X X 0 X X 1 0 0 X 1 1 X
1 1 X X X 1 X X X X 1 X X X X
1Kc AKb 1Ka
A B C
ck
CR
Hi
MOD 3012
212 232 2 J-KALSBB
PS NS B A B A B A Jb Kb Sb Rb Db Tb Ja Ka Sa Ra Da Ta01 0 0 0 1 0 X 0 X 0 0 1 X 1 0 1 112 0 1 1 0 1 X 1 0 1 1 X 1 0 1 0 120 1 0 0 0 X 1 0 1 0 1 0 X 0 X 0 0
3 X X X X X X X X X X X X
J-K R-S D T A
B 0 1 0 1 0 1 0 1 0 1 0 1
0 0 1 0 X X 0 0 1 0 X 0 0 0 1 0 0 1 1 X X 1 1 X 1 0 X 1 1 X 1 0 X 1 1 X
AJb 1Kb ASb ARb ADb BATb 0 1 X 0 X 1 0 1 0 0 0 1 0 1 0 0 1 1 1 0 X 1 X X 1 0 X 1 X X 1 0 X 1 0 X
BJa 1Ka BASa ARa BADa BTa
-
92
ck 1
A (LSB) B
1ck
A (LSB) B
ck
A (LSB) BA (LSB) B
ck
(2) GFFT tpdktpdtpd k
(3) Tck tpd/1f Tck tpd/1f
(4)MOD MM2nMOD 2481632
AD%50%
B 1KJ AA AKJ BB BAKJ CC
CBAKJ DD DCBAKJ EE
ck
1
A (LSB) B C D E 4 8 2 16 32
C 1KJ AA AKJ BB BAKJ CC
CBAKJ DD DCBAKJ EE
ck
1
A (LSB) B C D E 4 8 2 16 32
(5) MOD M2n-1M2nMOD 3579151731
A
BD% 100%M
1M
S
R
S
R
T T
-
93
ck 96KHz 50nS
10nS
A B C
ck
1
BAJc AKc CAJb AKb 1Ja 1Ka
J-K 000
PS J-K NS
C B A Jc Kc Jb Kb Ja Ka C B A
0 0 0 0 0 0 0 1 1 0 0 1 01 0 0 1 0 1 1 1 1 1 0 1 0 12 0 1 0 0 0 0 0 1 1 0 1 1 23 0 1 1 1 1 1 1 1 1 1 0 0 34 1 0 0 0 0 0 0 1 1 1 0 1 45 1 0 1 0 1 0 1 1 1 0 0 0 50
MOD 605
)S(n60n101n50tpdktpdtpd GFFT
)Hz(M67.16n60/1tpd/1f Tck(max)
6 A 3 BC
A 2 B C 6
)Hz(K482/K962/ff ckA
)Hz(K166/K966/fff ckCB
A 6 1 3 B C 1 2
%506/3%DA
%33.36/2%D%D CB
-
94
MOD 3
SS = 0 S = 1
ALSBBMSB
B F.F. A F.F.
S B A S B A Jb Kb Ja Ka
01 0 0 0 0 0 0 1 0 X 1 X 12 1 0 0 1 0 1 0 1 X X 1 20 2 0 1 0 0 0 0 X 1 0 X
3 3 X
21 6 1 1 0 1 0 1 X 1 1 X 10 5 1 0 1 1 0 0 0 X X 1 02 4 1 0 0 1 1 0 1 X 0 X
3 7 X
J K
BA S
00 01 11 10 BA
S 00 01 11 10
0 0X 1X XX X1 0 1X X1 XX 0X
1 1X 0X XX X1 1 0X X1 XX 1X
ABSJb 1Kb ABSJa 1Ka
CR = 1CR = 0BA
B
A
ckCR
Hi
S
S=0S=1
-
95
MOD 4
0 2431
ALSBBCMSB
C F.F. B F.F. A F.F.
C B A C B A Jc Kc Jb Kb Ja Ka
02 0 0 0 0 0 1 0 0 X 1 X 0 X24 2 0 1 0 1 0 0 1 X X 1 0 X43 4 1 0 0 0 1 1 X 1 1 X 1 X31 3 0 1 1 0 0 1 0 X X 1 X 0 12 1 0 0 1 0 1 0 0 X 1 X X 1 57 57 X
BA C
00 01 11 10 BA C
00 01 11 10 BA C
00 01 11 10
0 0 0 0 1 0 1 1 X X 0 0 X X 0
1 X X X X 1 1 X X X 1 1 X X X
BAJc 1Jb CJa
BA C
00 01 11 10 BA C
00 01 11 10 BA C
00 01 11 10
0 X X X X 0 X X 1 1 0 X 1 0 X
1 1 X X X 1 X X X X 1 X X X X
1Kc 1Kb BKa
A
B
C
ck
CR
1
1
-
96
MOD 5
0 12321
1 MSB
3 2 1
ALSBBCMSB
C F.F. B F.F. A F.F.
C B A C B A Jc Kc Jb Kb Ja Ka
01 01 0 0 0 0 0 0 1 0 X 0 X 1 X12 12 1 0 0 1 0 1 0 0 X 1 X X 123 23 2 0 1 0 0 1 1 0 X X 0 1 X32 36 3 0 1 1 1 1 0 1 X X 0 X 121 65 6 1 1 0 1 0 1 X 0 X 1 1 X11 51 5 1 0 1 0 0 1 X 1 0 X X 047 47 47 X
J K
BA C
00 01 11 10 BA
C 00 01 11 10
BA C
00 01 11 10
0 0X 0X 1X 0X 0 0X 1X X0 X0 0 1X X1 X1 1X
1 X X1 X X0 1 X 0X X X1 1 X X0 X 1X
ABJc AKc ACJb CKb 1Ja CKa
BA C
A
B C ( )ck
CR
1
-
97
1D J-K NOT D
ck
ck
Di Do
ck
Di Do
2n bitn ck
3
(1) /SISO
(2) /SIPO
(3) /PISO
(4) /PIPO
4 LSB MSB 2n
B C
A ( LSB )
A
B C ( MSB )
ck
Di
ck
Di ck
A
B
C
1
0
0
0
2 3 4
1
0
0
0
1
0
0
0
1
0
0
0
1 0Di 0 0 0
Di C (MSB) A (LSB)
5 MSB LSB 2n
B C
A
A
B C
ck
Di
Di
ck
ck
A
B
C
1
0
0
0
2 3 4
1
0
0
0
1
0
0
0
1
0
0
0
1 0Di 0 0 0
Di C (MSB) A (LSB)
-
98
1Ring Counter
(1) MSB Qn nQ
LSB JK LSB 1
0
(2)n
A10
B MOD n MOD 2n
C n/ff ckn
D %100n/1%Dn
J-K
560KHz
A B C D
ck
ck
A
B
C
1
1
0
0
2 3 4
0
1
0
0
0
1
0
0
0
1
0
0
D 0 0 0 1 0
CR=0CR=1 CR
PS NS
D C B A
D C B A 0 0 0 1 1 0 0 1 0 0 0 1 0 2 0 1 0 0 0 1 0 0 3 1 0 0 0 1 0 0 0 4 0 0 0 1
4 J-K MOD 4
)Hz(K1404/K560n/fffff CKDCBA
%254/1n/1%D%D%D%D DCBA
-
99
2Johnson Counter
(1) nQ Qn
JK0
(2)n
A
0 1
B MOD 2n
C n2/ff ckn
D %50n2/n%Dn
J-K
560KHz
A B C D
ck
ck
A
B
C
1 2 3 4
D
5 6 7 8
0 1 1 1 1 0 0 0 0
0 11 1 10 0 0 0
0 0 00 1 1 1 1
11 1 1 0 0
0
0 00
CR=0CR=1CR
D C B A
D C B A 0 0 0 0 1 0 0 0 1 0 0 0 1 2 0 0 1 1 0 0 1 1 3 0 1 1 1 0 1 1 1 4 1 1 1 1 1 1 1 1 5 1 1 1 0 1 1 1 0 6 1 1 0 0 1 1 0 0 7 1 0 0 0 1 0 0 0 8 0 0 0 0
4 J-K MOD 8
)Hz(K708/K560n2/fffff CKDCBA
%502/1n2/n%D%D%D%D DCBA
-
100
3
(1)
nQ QnJK
(2)n
A 1 1
0 1
BMOD 2n-1
C )1n2/(ff ckn
D %100)1n2/()1n(%Dn
J-K
560KHz
A B C D
ck
ck
A
B
C
1 2 3 4
D
5 6 7
0 1 1 1 0 0 0 0
0 11 10 0 0 0
0 0 00 1 1 1
11 1 0 0
0
0 00
CR=0CR=1CR
D C B A
D C B A 0 0 0 0 1 0 0 0 1 0 0 0 1 2 0 0 1 1 0 0 1 1 3 0 1 1 1 0 1 1 1 4 1 1 1 0 1 1 1 0 5 1 1 0 0 1 1 0 0 6 1 0 0 0 1 0 0 0 7 0 0 0 0
4 J-K MOD 7
)Hz(K807/K560)1n2/(fffff CKDCBA
%86.427/3)1n2/()1n(%D%D%D%D DCBA
-
101
1
S2S1S0abc000001010
PSNS
I / O I O
2
NS NS .
PS I0 I1 I0 I1
PS I0 I1 PS
I
NS
Y
S0 S0 S1 1 0 S0 S0 . 1 S1 . 0 S0 0 S0 1 S1 S2 S0 0 1 S1 S2 . 0 S0 . 1 S0 1 S1 0 S2 S0 S1 1 0 S2 S0 . 1 S1 . 0 S1 0 S2 0
S1 1 S0 1 S2 0 S0 1
S2 1 S1 0
NS O/P PS I0 I1 I0 I1 a a b 0 1 b e c 1 0 c e b 1 1 d c d 0 1 e d a 1 1
a 1/1
0/0
1/1
1/1
1/0
b
c
e
d
1/1
0/1
0/1
0/0
0/1
S2
S0
S1
0/1
1/0
0/0
1/1 1/0
0/1
0 S0 S0 1
1 S0 S1 0
1 S1 S0 1
0 S1 S2 0
Sn
-
102
3
(1) S0S2
S2 S2 S0
S0S2 NS O/P NS O/P NS O/P
PS I0 I1 I0 I1
PS I0 I1 I0 I1
PS I0 I1 I0 I1S0 S0 S1 1 0 S0 S0 S1 1 0 S0 S0 S1 1 0 S1 S2 S0 0 1 S1 S2 S0 0 1 S1 S0 S0 0 1 S2 S0 S1 1 0 S2 S0 S1 1 0
(2)
S0 S1 S1 S1 S0
S0S2 NS O/P NS O/P NS O/P
PS I0 I1 I0 I1
PS I0 I1 I0 I1
PS I0 I1 I0 I1S0 S3 S1 1 0 S0 S3 S1 1 0 S0 S3 S0 1 0 S1 S3 S0 1 0 S1 S3 S0 1 0 S2 S3 S0 0 0 S2 S3 S0 0 0 S2 S3 S0 0 0 S3 S2 S0 0 0 S3 S2 S1 0 0 S3 S2 S1 0 0
S2 S3 S3 S3 S2
S0S2 NS O/P NS O/P NS O/P
PS I0 I1 I0 I1
PS I0 I1 I0 I1
PS I0 I1 I0 I1S0 S3 S0 1 0 S0 S3 S0 1 0 S0 S2 S0 1 0 S2 S3 S0 0 0 S2 S3 S0 0 0 S2 S2 S0 0 0 S3 S2 S0 0 0 S3 S2 S0 0 0
J-K
NS O/P NS O/P PS I0 I1 I0 I1
PS I0 I1 I0 I1a e d 0 1 a e b 0 1 b f d 0 0 b f b 0 0 c e b 0 1 e a f 0 1 d f b 0 0
f b a 0 0 e c f 0 1 f b c 0 0
2 J-K
-
103
4
NS O/P PS
I0 I1 I0 I1A F G 1 0 B E D 0 0 C B A 0 1 D B F 0 1 E G B 0 1 F F B 1 0 G E C 0 0
(1) O/P O/P PS
O/P AFBGCDE
(2) NS NS
AFBGCDE
(3) (2)
AFBGCDE
(4)
AFBGCDE
NS O/P NS O/P
PS I0 I1 I0 I1
PS I0 I1 I0 I1A A B 1 0 A A B 1 0 B E C 0 0 B E C 0 0 C B A 0 1 C B A 0 1 C B A 0 1 E B B 0 1 E B B 0 1 A A B 1 0 B E C 0 0
-
104
IC
1TTL 7490 10 25
(1) 2 ck CKA QA
(2) 5 ck CKB QDMSBQCQB
(3) 10 ck CKA QA CKB QDQCQBQA
(4) R0(1)R0(2)1 QDQCQBQA 0000
R9(1)R9(2)1 QDQCQBQA 1001
R0(1)R0(2) R9(1)R9(2)
2TTL 7492 12 26
(1) 2 ck CKA QA
(2) 6 ck CKB QDQCQB
(3) 12 ck CKA QA CKB QDQCQBQA
(4) R0(1)R0(2) 7490
3TTL 7493 16 28
(1) 2 ck CKA QA
(2) 8 ck CKB QDQCQB
(3) 16 ck CKA QA CKB QDQCQBQA
(4) R0(1)R0(2) 74907492
ABC fo
CKACKBR0(1)R0(2)
QAQBQCQD
CKACKBR0(1)R0(2)
QAQBQCQD
CKACKBR0(1)R0(2)
QAQBQCQD
CKACKBR0(1)R0(2)
QAQBQCQD
R9(1)R9(2)CKACKBR0(1)R0(2)
QAQBQCQD
ck
A
C B
7493-27493-1
fo
ck
7492-2
fo fo
7492-1
ck
7490
Afofck 6 Bfofck 72 Cfofck 64
-
105
Adder
1Half AdderHA
(1)
Carry In
Sum
Carry Out
(2) AB
SCo
(3)
A B S Co B A 0 1
B A 0 1
0 0 0 0 0 0 1 0 0 0 0 1 1 0 1 1 0 1 0 1 1 0 1 0 1 1 0 1
XORSBABAS
ANDCoBACo
(4)
A
SB
Co
AS
B
Co B
A S
HA
Co
2Full AdderFA
(1)
-
106
4 A3A2A1A0B3B2B1B0
A0B0 A3A2A1B3B2B1
Ci C3 C2 C1
A3 A2 A1 A0
B3 B2 B1 B0
Co C4 S3 S2 S1 S0
(2) ABCi
SCo
(3)
A B Ci S Co BCi A 00 01 11 10
0 0 0 0 0 0 0 1 0 1 0 0 1 1 0 1 1 0 1 0 0 1 0 1 0 CiBAS 0 1 1 0 1 1 0 0 1 0
BCi A 00 01 11 10
1 0 1 0 1 0 0 0 1 0 1 1 0 0 1 1 0 1 1 1 1 1 1 1 1
CiBBACiACo
S XOR Co
(4)
A BCi
S
Co
S
FA
CoCi
A
B
-
107
OR
ABCi
SCo
A B Ci S Co BCi A 00 01 11 10
0 0 0 0 0 0 0 1 0 1 0 0 1 1 0 1 1 0 1 0
0 1 0 1 0 CiBAS 0 1 1 0 1 1 0 0 1 0
BCi A 00 01 11 10
1 0 1 0 1 0 0 0 1 0 1 1 0 0 1 1 0 1 1 1
1 1 1 1 1 CiBACiBABACo
CiBACiBABACo
)BABA(CiBACo
)BA(CiBACo
B
A S
HA
Co B
A S
HA
Co
S
Co
B
A
Ci
BA
BA
)BA(Ci
CiBA
BA Ci
AB S
CoCi
BA
BA
)BA(Ci
CiBA
BA Ci
HA HA
-
108
Subtractor
1Half SubtractorHS
(1)
Borrow In
Difference
Borrow Out
(2) AB
Dbo
(3)
A B D bo B A 0 1
B A 0 1
0 0 0 0 0 0 1 0 0 1 0 1 1 1 1 1 0 1 0 0 1 0 1 0
1 1 0 0
XORDBABAD
)A(ANDbo
BAbo
(4)
A
DB
bo
AD
B
bo B
A D
HS
bo
Co
A bo A
2Full SubtractorFS
(1)
-
109
4 A3A2A1A0B3B2B1B0
A0B0 A3A2A1B3B2B1
A3 A2 A1 A0
B3 B2 B1 B0
bi b3 b2 b1
bo b4 D3 D2 D1 D0
(2) ABbi
Dbo
(3)
A B bi D bo Bbi A 00 01 11 10
0 0 0 0 0 0 0 1 0 1 0 0 1 1 1 1 1 0 1 0 0 1 0 1 1 biBAD 0 1 1 0 1 1 0 0 1 0
Bbi A 00 01 11 10
1 0 1 0 0 0 0 1 1 1 1 1 0 0 0 1 0 0 1 0
1 1 1 1 1
biBBAbiAbo
bo A
(4)
ABbi
D
bo
D
FS
bobi
A
B
-
110
OR
ABbi
Dbo
A B bi D bo Bbi A 00 01 11 10
0 0 0 0 0 0 0 1 0 1 0 0 1 1 1 1 1 0 1 0
0 1 0 1 1 biBAD 0 1 1 0 1 1 0 0 1 0
Bbi A 00 01 11 10
1 0 1 0 0 0 0 1 1 1 1 1 0 0 0 1 0 0 1 0
1 1 1 1 1 biBAbiBABAbo
biBAbiBABAbo
)BABA(biBAbo
)BA(biBA)BA(biBAbo
AB D
bobi
HS HS BA
)BA(bi
biBA
BA bi
BA
BA
)BA(bi
biBA
BA bi
BA
B
A D
HS
bo B
A D
HS
bo
D
bo
B
A
bi
-
111
Serial Adder
1
(1) N A B CK
(2) A B
(3) D Co
(4) N1 S
2
(1) A B M
CK A B 1 N
MSB
(2) M N M CK
(3) N CK N
(4) N+1 CK 1
1 LSB S N+1
Co D
Ci
(5) N+2 CK 2
(6) N+M CK M
(7) N+M1 CK CM
CK
MSB LSB A
B
A
B
D CK
Q
FA
D F.F.
CK
Ci
Co
S
N 202N-1
20N 2N-1
20N1 2N
CK
CK
N
-
112
3
(1) N bit 1
N+M+1 CK
(2) CK
8 bit 12 bit
10MHz 1
)S(1.0M10/1f/1T CKCK
1 8 LSB
1 9 CK
)S(9.0)S(1.09T9 CK
12 20 CK
21 CK
)S(1.2)S(1.021T21 CK
Parallel Adder
1N N Co
Ci
LSB Ci
2
(1) 1 1
Ci 0 A1+B1
Cn
FAn Co Ci
Bn An
Sn
C00
FA3 Co Ci
B3 A3
S3
C2
FA2Co Ci
B2 A2
S2
C1
FA1Co Ci
B1 A1
S1
N
A4 A3 A2 A1 B4 B3 B2 B1
S4 S3 S2 S1
A4 A3 A2 A1 B4 B3 B2 B1
S4 S3 S2 S1
0 C4 7483 C0
TTL 7483_4
C4
-
113
(2) 2 2
A2+B2+C1 A1+B1 C1
(3)
N bit Tpd (T)NTpd (FA)
3
(1) CK
(2) TTL 7483 4 bit Look Ahead
Carry C4
4 bits bit
2.5nS 4 bits
)S(n10n5.24T4T )FA(pd)T(pd
)Hz(M100n10/1T/1f )T(pdmax
2 TTL 7483 8 bit
8 bit A8A1+B8B1= C8 S8S1
11's
(1) A B 1's
B4B1 NOT 1's
A4 A3 A2 A1 B4 B3 B2 B1
S4 S3 S2 S1
A8 A7 A6 A5 B8 B7 B6 B5
S8 S7 S6 S5
A4 A3 A2 A1 B4 B3 B2 B1
S4 S3 S2 S1
A4 A3 A2 A1 B4 B3 B2 B1
S4 S3 S2 S1
0
C8
C4 U2_7483 C0 C4 U1_7483 C0
-
114
(2) 1
LSB MSB
C4 LSB C0
B4
A4
B3
A3
B2
A2
B1
A1
C0
C4
S4
S3
S2
S1
SN7483
B4
A4
B3
A3
B2
A2
B1
A1
C0
C4
S4
S3
S2
S1
SN7483
Vcc
B4
A4 A3 A2 A1
B3 B2 B1
S4 S3 S2 S1C4 1 LSB
NOT 1's
B4
A4 A3 A2 A1
B3 B2 B1
NOT 1's
LSB 1 2's
C4 1
S4 S3 S2 S1
4 2's 4 1's
22's
(1) A B 2's
B4B1 NOT 1's
LSB C0 Vcc 1
2's
(2) 1
C4 1's
1's
11's
(1) 1 M N XOR
A M=0 B4B1
XOR B0BB0B1B0B0
B M=1 B4B1 NOT 1's
-
115
XOR BB0B1B0B1B1
1's
(2) M C4 AND
A M=0 AND LSB
04C00C
B M=1 AND LSB
14C10C
B4
A4
B3
A3
B2
A2
B1
A1
C0
C4
S4
S3
S2
S1
U1_SN7483
B4
A4
B3
A3
B2
A2
B1
A1
C0
C4
S4
S3
S2
S1
SN7483
B4
A4 A3 A2 A1
B3 B2 B1
S4 S3 S2 S1
B4
A4 A3 A2 A1
B3 B2 B1
S4 S3 S2 S1
M=0XOR BUFFERM=1XOR NOT 1's
M
M=0C0= 0M=1C0=C4
M=0XOR BUFFERC0=0M=1XOR NOT 1'sC0=1LSB 1 2's
M
4 1's 4 2's
22's
(1) 1 M N XOR
A M=0 1's
B M=1 BnB1 NOT 1's
LSB C0 Vcc 1
2's
XOR BB0B1B0B1B1
1's LSB
C0 M M=1 1's
1 2's
(2) MSB C4
-
116
BCD
1BCD BCD 910 15
16 18 BCD 6
AB BCD 6 C4 W X Y Z F S4 S3 S2 S1
0 0 0 0 0 0 0 0 0 0 0 BCD 9 0 1 0 0 1 0 1 0 0 1
10 0 1 0 1 0 1 0 0 0 0 BCD 15 0 1 1 1 1 1 0 1 0 1 16 1 0 0 0 0 1 0 1 1 0 17 1 0 0 0 1 1 0 1 1 1 18 1 0 0 1 0 1 1 0 0 0
2AB1015 BCD
YWXWF YZ WX 00 01 11 10
00 0 0 0 0 01 0 0 0 0 11 1 1 1 1 10 0 0 1 1
W X
W Y
F
3 AB1618 1 BCD 4
C41 F C4
B4A4B3A3B2A2B1A1C0
C4S4S3S2S1
U1_7483
B4A4B3A3B2A2B1A1C0
C4S4S3S2S1
U2_7483
Z Y X W
F
BCD 0110
F=0 WXYZ+0000 F=1 WXYZ+0110
(A4A1)(B4B1) WXYZ
C4=1
BCD
BCD
A4A1 B4B1
0
BCD
BCD BCD6
-
117
Integrated Circuit IC
1
SSI 10 102 MSI 10102 102103 LSI 102103 103104 8bit CPU
VLSI 103105 104106 16bit CPU ULSI 105 106 32bit CPU
2IC
TTL CMOS Vss0V 74XX5V 5% A 315V
54XX5V10% B 318V
74XX070 A 4085
54XX55125 B 55125 VIH 2.0V 0.7(VddVss)Vss 0.8V2V 0.3Vdd0.7Vdd
VIL 0.8V 0.3(VddVss)Vss VOH 2.4V Vdd0.01 (Vdd) 0.4V2.4V 0VVdd
VOL 0.4V Vss0.01V (0V) IIH 40A 0.01A
IIL 1.6mA 0.01A IOH 400A 0.8mA
IOL 16mA 0.8mA VT 1.4V 0.5Vdd
0.4V 0.3Vdd tpd 10ns 70ns
10mW 100W Fan-out 10 50
-
118
(1)
(2) IC TTL HiCMOS
(3) TTL 16mA Lo
(4)
(5) VNM
VNMminVNMHVOHVIHVNMLVILVOL
(6)
50% 50%
(7) Fan-out
Fan-outminFan-outHIOH IIHFan-outLIOL IIL
CMOS IC Vdd5V VOH4.4V
VOL0.4V
VIH0.7Vdd0.753.5 (V)
VIL0.3Vdd0.351.5 (V)
VNMHVOHVIH4.43.50.9 (V)
VNMLVILVOL1.50.41.1 (V)
VNMminVNMHVNML0.9 (V)
Gate1IIL2.4mAIIH25AIOL30mAIOH300A
Gate2IIL3mAIIH20AIOL36mAIOH400A
Gate1 Gate2 Gate1
Fan-outHIOH(Gate1) IIH(Gate2)300 2015 ()
Fan-outLIOL(Gate1) IIL(Gate2)30m 3m10 ()
Fan-outminFan-outHFan-outL10 ()
-
119
1DL
(1) P HiN Lo P
LoN Hi
(2) AND
A ABC
F 0 0
B ABC Vcc
F Vcc 1 1
(3) OR
A ABC Vcc
F Vcc 1 1
B ABC
F 0 0
AND Vcc15V A12V
B9VC5V F
C (155)B (159)A (1512)
C FC5 (V)
OR A12VB9VC
5V F
A (120)B (90)C (50)
A FA12 (V)
RAND
A
C
F
Vcc
B
OR AB
F
R
C
-
120
2TL
(1) B-E B-C
(2) AND OR
BUFFER AND NAND
T1
R
A
F
Vcc
T1
T2
R
A
F
Vcc
B
T1
T2
R
A
F
Vcc
B
NOT OR NOR
T1
R
A
F
Vcc
T1 T2
R
A B
F
Vcc
T1 T2
R
A
F
Vcc
B
(3) DCTL
A
BIc
(4) RTL
A DCTL
B DCTL
(6) RCTL//
A DCTL RTL
B RTL DCTL
-
121
3DTL
D1
R1
D2 T
Rc
D3D1
R1
D2T2
Rc
D4T1
R2D4
D1
R1
D2 T
Rc
Rb A
B
DTL
F
Vcc
A
B
DTL
F
Vcc
A
B
DTL
F
Vcc
DL
RTL
(1) DTL NAND DL RTL
ADL D1D2R1 AND
BRTL RbRcT NOT
(2) DTL D3D4 Rb
(3) DTL T1 D3
4TTL
Rb
T4
Rc
R2
D3
T3
T2
R1
T1
Rb
T1
D1 D2 R2
T2
R1
T4
Rb
T4
Rc
R2
D3
T3
T2
R1
T1
D4
A
B
TTL NAND
F
Vcc Vcc
TTL NAND
A
B
F
A
E
TTL NAND
F
Vcc
B
(1) TTL DTL CMOS
AT1 DTL D1D2 D3
IC
BD1 D2 0.7V
T1
CT2 180
T3 T4
-
122
(2) TTL Totem Pole
D3 T3 T4
D3 T4 T3
(3) TTL OC
OC
OC
R
Vcc
OC
OC Wired AND
R
Vcc
AB F
F
X
Y
CD
AB
CD
( )
( )
( )
( )
AT4
BTTL
Wired AND
BAX DCY DCBAYXF
CTTL
(4) TTL
AB
ABF F
E ( Enable ) E ( Enable )
(Active Hi) (Active Lo)
AEnable
0 1
Active Hi NAND Active Lo NANDE A B F E A B F 0 X X 1 X X
1 X X NAND 0 X X NAND
B
-
123
(5) TTL
74xx 74Hxx 74Lxx 74Sxx 74LSxx
10mW 20mW 1mW 20mW 2mW 10n S 6nS 33nS 3nS 10nS
5ECL
T5
Re4
Re
T4
T2
Rc1
T1 T3
Rc2
Re5
ECL ECL
ECL
ECL
ECLWired OR
A B ECL
XOR Y NOR
Vee
Vbb
AXY
BF
A
BF = A' + B'
ECL
AB
A'
B'
(1) ECL T1T2 T3 T4
T5 XY
(2) ECL CML
Wired OR BAF
(3) 2nS
(4)
6MOS
Vdd
F = VddVdd0 0VddP
Vdd
F = 0 VP
Vdd
F = Vdd
Vdd
F = 0 VNN
PMOS G=0 PMOS G=1 NMOS G=1 NMOS G=0
-
124
(1) MOS MOSFET PMOS
NMOS
APMOS G0 D-S G1 D-S
BNMOS G1 D-S G0 D-S
(2) MOS IC MOS
LSI VLSI
(3)
7CMOS
(1) CMOS PMOS NMOSNOT
A 0 PMOS NMOS Vdd 1
B 1 PMOS NMOS 0
(2) CMOS F NMOS AND OR
NOT NAND NOR
P MOS
N MOS
A F
Vdd
P1 P2
N2
N1
A
B
F
Vdd
N1N2
P1
P2
A
B
F
Vdd
(3) CMOS IC
ARCA CD40xx / Motorola MC140xx
A UB
B B
BRCA CD 45xx / Motorola MC145xx
B IC
CD4511 / MC14511 IC
-
125
C54Cxx / 74Cxx
TTL 54xx / 74xx
CMOS IC
D CMOSHCMOS74HCXX
TTL 74LSxx CMOS
Vcc 26V
(4)
(5)
TTL
RTL DTL TTL ECL MOS CMOS
5 8 10 25 25 50
(mW) 12 8 10 40 1 W
6 4 3 5 1 1
(nS) 12 30 10 2 100 70
(Mhz) 12 8 15 60 2 5
CMOSTTLECL
1ECLTTLCMOS
2CMOSTTLECL
3ECLTTLCMOS
4CMOSTTLECL
5CMOSECLTTL
-
126
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