COordinate Rational DIgital Computeraccess.ee.ntu.edu.tw/course/advanced_VLSI_91/course...ACCESS IC...

ACCESS IC LAB Graduate Institute of Electronics Engineering, NTU

pp. 1台灣大學吳安宇教授

COordinate Rational DIgital Computer



OutlineOutlineIntroductionConventional CORDIC AlgorithmEnhancement of CORDIC

MVR-CORDIC AlgorithmEEAS-Based CORDIC Algorithm

Vector Rotational CORDIC Family



IntroductionIntroductionVector rotation is the kernel of various digital signal processing (DSP) applications, including

Digital filters:Orthogonal digital filters, and adaptive lattice filters.

Linear transformation:DFT, Chirp-Z transform, DHT, and FFT.

Matrix based digital signal processing algorithms:QR factorization, with applications to Kalman filtering

Linear system solverssuch as Toeplitz and covariance system solvers,……,etc.



Rotational OperationRotational Operation

(xin,yin)

(xout,yout

θ

)

Each vector rotation takes 4 multiplications

and 2 additions



Digital Lattice FilterDigital Lattice FilterLow-sensitivity to coefficient quantization error



Normalized Lattice SectionNormalized Lattice SectionGivens Rotation



Fast Fourier TransformationFast Fourier Transformation



Fast Fourier TransformationFast Fourier TransformationTwiddle factor



Conventional CORDIC AlgorithmConventional CORDIC Algorithm

−=

++

)()(

.cossinsincos

)1()1(

iyix

iyix

αααα

−

−−=

++

)()(

.1

21)1()1(

2 iyix

i

i

iyix

i

i

µµ

⋅

−⋅=

++

)()(

1tantan1

cos)1()1(

iyix

iyix

αα

α

)2tan2tan( 11 ii

iii

−−−− == µµα

⇓

⇓

where



Conventional CORDIC AlgorithmConventional CORDIC AlgorithmEase-to-implementation (shift-and-add only)



Conventional CORDIC AlgorithmConventional CORDIC Algorithm

Example:Rotation angle: θ = π/8 = 0.3927

( ) ( ) ( ) { }1,1 ,1

0, −+=

−≡ ∑−

=

iiaiN

iCORDICm µµθξ

( ) ( ) ( ) ( )( ) ( ) ( ) ( )+++

+≈3322

1100aa

aaµµµµθ

Sequentially performing of sub-angles, a(i)

V(2)

V(0)

V(1)V(3)

V(4)



Generalized CORDICGeneralized CORDIC

V(2)V(0)

V(1) V(3)V(4)

122 =+ yx

Circular

Linear

V(1)

V(3)

V(3)

Hyperbolic

V(0)V(1)

V(2)m→0 , linear system ;

m=1 , circular system ;

m=-1 , hyperbolic system.



Summary of CORDIC AlgorithmSummary of CORDIC AlgorithmBoth micro-rotation and scaling phasesInitiation:Given x(0),y(0),z(0)

For i=0 to n-1 , Do

/*CORDIC iteration equation */

/*Angle updating equation*/(i)a- miz(i)1)z(i µ=+

/*Scaling Operation (required for m=±1 only)*/

End i loop

=

)()(

)(1

nynx

nKyx

mf

f

−

−−=

++

)()(

.1),(

),(21)1()1(

2 iyix

ims

imsmiyix

i

i

µµ

)21(1

0

),(22∏−

=

−+=n

i

imsim mK µ



Modes of OperationsModes of Operations

)(iz(n)-z(n)-z(0)1

0im

n

ia∑

−

=

== µθ

υµ = sign of z(i)

Vector rotation mode (θ is given)objective is to compute the final vector

Usually , we set z(0)= θ



Modes of Operations (cont’d)Modes of Operations (cont’d)Angle accumulation mode (θ is not given)

Objective is to rotate the given initial vector back to x-axis ,and the angle can be accrued.

µ = - sign x(i)y(i) υ

V(0)

V(1)

X-axis



Basic processor for Micro-Basic processor for Micro-RotationRotation

X(i) Y(i)

X-Reg Y-Reg

+/- +/-

Barrel shifter

Barrel shifter

X(i+1) Y(i+1)

mux mux mux mux

X-Reg Y-RegZ-reg

iµ

Z(i+1)



Basic processor for Scaling Basic processor for Scaling OperationOperation

)('2)(')1('

)('2)(')1('

:2

)(2)(')1('

)(2)(')1('

:1

nyiyiy

nxixix

Type

nyiyiy

nxixix

Type

q

q

p

p

i

i

i

i

−

−

−

−

+=+

+=+

+=+

+=+

X(n) Y(n)

X(n) Y(n)

+/- +/-

Barrel shifter

Barrel shifter

X-Reg Y-Reg

ff y x



Advantages and disadvantagesAdvantages and disadvantages

-Simple Shift-and-add Operation.

(2 adders+2 shifters v.s. 4 mul.+2 adder)

-Small area.

-It needs n iterations to obtain n-bit precision.

-Slow carry-propagate addition.

-Area consuming shifts.



Enhancement of CORDICEnhancement of CORDIC

ArchitecturePipelined ArchitectureFaster Adder (CSA)

AlgorithmRadix-4 CORDICMVR-CORDICEEAS-CORDIC



Pipelined architecturePipelined architecture

Basic

CORDIC

Processor

1

Basic

CORDIC

Processor

2

Basic

CORDIC

Processor

n+s

L

A

T

C

H

L

A

T

C

H

L

A

T

C

H

f

f

yx

)0()0(

1

1

++

++

sn

sn

yx

)1(snv + )1(2 −+snv)2(1−+snv)0(1++snv

Ni−µ1−iµ

Expand folded CORDIC processor to achieve the pipelined architectureShifting can be realized by wiring



Faster Adder (CSA)Faster Adder (CSA)

+

+

+

sign

Ripple Adder and its sign calculation

+

+

+

+

+

+

sign

CSA VMAand its sign calculation



Critical Path of CSACritical Path of CSA

+++

+++

sign


+++

sign


In on-line approach , we want to get sign bit as soon as possible !

Critical path analysis:

CPA=wordlength

CSA=2FA (Best Case)

CSA=wordlength (worst case)

Redundant Number System to eliminate non-rotation or puzzle rotation



Radix-4 CORDICRadix-4 CORDICReduce Iteration Numbers

High radix CORDIC.(e.g. Radix-4, Radix-8)1 stage of Radix-4 = 2 stages of Radix-2

Faster and SmallerEmploy the Radix-4 micro-rotations to

Reduce the stage number.But Km may not be constant.

∏−

=

−+=1

0

),(22 41n

i

imsim mK µ { }2,1,0 ±±=µ



Modification of CORDIC AlgorithmModification of CORDIC AlgorithmSkip some micro-rotation angles

For certain angles, we can only only reduce the iteration number but also improve the error performance.For example, θ=π/4

ConventionalCORDIC

[ ]1, 1, 1, 1, 1,µ = −

MVR-CORDIC [ ]1, 0, 0, 0, 0,µ =

ξm= 7.2*10-3

ξm= 0



Modification of CORDIC AlgorithmModification of CORDIC AlgorithmRepeat some micro-rotation angles

Each micro-rotation angle can be performed repeatedlyFor example, θ =π/2: execute the micro-rotation of a(0) twice

Confine the number of micro-rotations to RmIn conventional CORDIC, number of iteration=WIn the MVR-CORDIC, Rm << WHardware/timing alignment



Modification of CORDIC AlgorithmModification of CORDIC AlgorithmWith above three modification

wheres(i) ∈ {0, 1, 2, …, W} is the rotational sequence that determines the micro-rotation angle in the ith iterationα(i) ∈ {-1, 0 ,1} is the directional sequence that controls the direction of the ith micro-rotation



Constellation of Reachable AnglesConstellation of Reachable Angles

(a) Conventional CORDIC with N=W=4(b) MVR-CORDIC with W=4 and Rm=3



Summary of MVRSummary of MVR--CORDIC CORDIC AlgorithmAlgorithm

Both micro-rotation and scaling phases



VLSI ArchitectureVLSI ArchitectureIterative structure



Extended Elementary Angle SetExtended Elementary Angle SetApply relaxation on EAS of

EAS is comprised of arctangent of single singed-power-of-two (SPT) termEffective way to extend the EAS is to employ more SPT terms



Constellation of EEASConstellation of EEAS

Constellation of elementary angles of (a) EAS S1, (b) EEAS S2, with wordlength W=8.



Example of EAS and EEASExample of EAS and EEAS

Example of elementary angles of (a) EAS S1, (b) EEAS S2, with wordlength W=3.



Summary of EEAS SchemeSummary of EEAS SchemeBoth micro-rotation and scaling phases



VLSI ArchitectureVLSI ArchitectureIterative structure



Comparison of Rotation SchemesComparison of Rotation Schemes

Comparison of existing approaches/algorithms performingvector rotation in 2D plane, where the wordlength, W, is 16.

HardwareRequirement

Full Adder(FA) Count

SQNRPerformance

Direct Implementation

Conventional CORDICAlgorithm

Angle Recoding (AR)Technique (Rm=6, Rs=6)

EEAS-based CORDICAlgorithm (Rm=2, Rs=2)

4 Multipliers,2 Adders

About43 Adders

24 Adders

16 Adders

1,056

688

384

256

98.7dB

97.4dB

93.3dB

95.1dB



Family of VR CORDIC AlgorithmFamily of VR CORDIC Algorithm



Set Diagram of VR CORDIC FamilySet Diagram of VR CORDIC FamilyRelationship among members in VR CORDIC family can be represented as

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