컴퓨터구조-10장
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10. Computer Arithmetic
충남대학교 정보통신공학과박 종 원
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Chapter 10 Computer Arithmetic
Four types of data for add, subtract, multiply, divide
1. Fixed-point binary data in signed-magnitude representation2. Fixed-point binary data in signed-2’s complement representation3. Floating-point binary data4. Binary-Coded Decimal(BCD) data
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컴퓨터구조 1
Add
Subtract
(+3) + (+2)(+6) + (–3)(–3) + (+2)(–3) + (–6)(+3) – (+2)(+3) – (–6)(–3) – (+2)(–3) – (–6)
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컴퓨터구조 1
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컴퓨터구조 1
A - B A + B’ + 1 = A - B + 2n
( B + B’ + 1 = 2n)
If A B 2n(E = 1)If A < B E = 0
Flowchart for add and subtract operations(signed magnitude representation)
A < B 인 경우에EA A – B하였기때문에A 를 2 의 보수로해주고부호를 반대로 함
(+3) + (–2)(+3) + (+6)(+3) – (–2)(–3) – (–6)
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컴퓨터구조 1
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컴퓨터구조 1
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10-3 Multiplication Algorithms
23 10111 Multiplicand 19 x 10011 Multiplier------ -----------
10111 10111 00000 00000 10111 -------------------437 110110101
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컴퓨터구조 1
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컴퓨터구조 1
1 0 1 1 1
1 0 0 1 10 0 0 0 0
10111 x 10011 ----------- 10111 10111 00000 00000 10111 ------------------- 110110101
AQ B x Q for multiplication
1 0 1 1 10 1 0 1 1 1 1 0 0 1
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컴퓨터구조 1
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컴퓨터구조 1
Booth Multiplication Algorithm
Multiplication withbinary integers in signed-2’s complement representation
Ex) (-9) x (-13) = + 117
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컴퓨터구조 1
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컴퓨터구조 1(-9) x (-13) = + 117BR = 10111(-9)BR’ + 1 = 01001QR = 10011(-13)
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컴퓨터구조 1
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(-9) x (-13) = + 117BR = 10111(-9)BR’ + 1 = 01001QR = 10011(-13)QnQn+1 1001 10 10 - : -1 11 01 + : +4 00 10 - : -16
-13
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Proof of the Booth Algorithm
111111111 = -1 10 = -1
111011111 = - 25 –1 10 = - 20 01 = + 25 10 = - 26 - 25 –1
111001111 = - 25 – 24- 1 = - 49 10 = - 20 01 = + 24 = 16 10 = - 26 = - 64 - 49
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Proof of the Booth Algorithm
If the number is –1, it adds –1, which is the same as the Booth algorithm.If there is a 0 in the position 2k then it adds –2k .Also, the Booth algorithm adds 2k – 2k+1, which is –2k. k 543210111…..1111111101111…..111111 = - 000…..0000000010000…..000001
k+m-1If there is m 0’s from the position 2k then it adds – 2l
l=k k+m-1 k 543210111…111100….0011111…111111 = - 000…000011….1100000…000001
Also, the Booth algorithm adds 2k – 2k+m, which is k+m-1 k 543210 k+m-1 k+m-1 000…000011….1100000…000000- 2l because –( 2l + 2k ) = -2k+m + 000…000000….0100000…000000 l=k . l=k 000…000100….0000000…000000
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컴퓨터구조 1
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컴퓨터구조 1
b3 b2 b1 b0 a2 a1 a0--------------------------------------------- a0b3 a0b2 a0b1 a0b0 a1b3 a1b2 a1b1 a1b0a2b3 a2b2 a2b1 a2b0
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컴퓨터구조 1
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컴퓨터구조 1
multiplicationdivision
Q AQ / B for divisionAQ B x Q for multiplication
SubtractionAddition
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컴퓨터구조 1
AQ 에서 AB 이면 Overflow 임 , EA A + B: 원 상태 A Q
B
A<B 에서 shl EAQ 한 후 E=1 이면 EA > B 임 1 n-1
E A
(EA –2n-1) + (2n-1 – B) = EA – B
Flowchart for divide operation(signed magnitude representation)Q AQ / B
1 0 1 0 0 1 1 0
0 0 1 1
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Addition and Subtraction of floating-point operands
1. Check for zeros2. Align the mantissas3. Add or subtract the mantissas4. Normalize the result
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컴퓨터구조 1
0 0 0 1 0 1 1
1 0 0 0 1 1 0 0 1
1 0 1 0 1 1 0 1 1
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컴퓨터구조 1
Figure 10-15 Addition and subtraction of floating-point numbers
Align mantissas : 큰 쪽의 지수에 맞춤
Mantissa addition and subtraction : Fig. 10-2 의 signed magnitude 방식임
Check for zeros: A 에 결과가 있음
Normalization: A1 = 1 이 되도록 shift
A x 2a A x 2a B x 2b
AC BR
A < B 인데A – B했으므로 A B
1 n-1
E AC
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Multiplication of
floating-point numbers
1. Check for zeros2. Add the exponents3. multiply the mantissas4. Normalize the product
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컴퓨터구조 1Figure 10-16
Flowchart for multiplication of
floating-point numbers
지수 : - max1 ~ + max2
0 ~ + max2 + bias
Ex) 5 bit : - 16 ~ + 15 0 ~ + 31
a = a’ + bias(16 in this example)
b = b’ + bias
a + b = a’ + b’ + 2 x bias
0.1 x 0.1 = 0.01
A x 2a B x 2b x Q x 2q
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Division of
floating-point numbers
1. Check for zeros2. Initialize registers and evaluate the sign3. Align the dividend4. Subtract the exponents5. Divide the mantissas
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Figure 10-17Flowchart for division of floating-point numbers
Overflow checkIf E = 1 then A B
shr A a a+1 하여 Fig. 10-13 의 divide magnitude of mantissa 에서 overflow 를 방지한 후 적용하도록 함 .
a - b = a’ + bias – (b’ + bias) a a + bias
Q x 2q A x 2a / B x 2b
1 0 1 0 0 1 1 0
1 0 0 1
A Q
B
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컴퓨터구조 1
Table 10-4Derivation of BCD Adder
최소값 : 0최대값 : 9+9+1=19
0 1 0 9+ 0 + 9-------- ----------- 0 19
C = k + Z8Z4 + Z8Z2
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컴퓨터구조 1
C = k + Z8Z4 + Z8Z2
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컴퓨터구조 1
BCD 9’s complementer
M B8 B4 B2 B1 x8 x4 x2 x1
0 0 0 0 0 0 0 0 00 0 0 0 1 0 0 0 10 0 0 1 0 0 0 1 0. . 0 1 0 0 0 1 0 0 00 1 0 0 1 1 0 0 11 0 0 0 0 1 0 0 11 0 0 0 1 1 0 0 01 0 0 1 0 0 1 1 1..1 1 0 0 0 0 0 0 11 1 0 0 1 0 0 0 0
X1 = B1 M’ + B1 ’ M X2 = B2
X4 = B4 M’ + (B4 ’ B2 + B4 B2 ’ ) M
X8 = B8 M’ + B8 ’ B4 ’ B2 ’ M
그대로
보수로
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컴퓨터구조 1
X1 = B2 M’ + B1 ’ M X2 = B2
X4 = B4 M’ + (B4 ’ B2 + B4 B2 ’ ) M
X8 = B8 M’ + B8 ’ B4 ’ B2 ’ M
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컴퓨터구조 1
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컴퓨터구조 1 8 6 7 2 9 4
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Figure 10-21Registers for decimal arithmetic multiplication and division
Ae : to accommodate an overflow while adding the multiplicand to the partial product during multiplication
Be : to form the 9’s complement of the devisor when subtracted from the partial remainder during the division operation
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컴퓨터구조 1
AQ B x Q by adding A A + B and decrementing QL
Q AQ / B by subtracting A A - B and incrementing QL
4 0 5 7
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컴퓨터구조 1
AQ B x Q by adding A A + B and decrementing QL
4 0 5 7 6
3 2 1 8
0 0 0 0
3 2 1 8
+
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컴퓨터구조 1
Q AQ / B by subtracting A A - B and incrementing QL
4 0 5 0 1
3 2 1 8
2 8 3 4
0 3 8 4
-
0 3 8 4 4 0 5 1 0