Trigger Merging Module for the J-PARC E16 Experiment

12 Jun 2018 Kyoto Univ.A, RIKENB, RCNPC, KEKD, Tohoku Univ.E

M. IchikawaA, B, M. NarukiA, S. YokkaichiB, T. N. TakahashiC, K. AokiD, S. AshikagaA, E. HamadaD, R. HondaE, Y. IgarashiD, M. IkenoD, K. OzawaD, H. SendaiD, K. N. SuzukiA, M. TanakaD and T. UchidaD

�1

Outline �2◯J-PARC E16 Experiment 　・Detectors 　・Trigger System

◯Trigger Merging Module(TRG-MRG) 　・Hardware 　・Firmware

◯Performance Test 　・Time Resolution 　・Latency 　・Transfer Efficiency

◯Summary

J-PARC

J-PARC

30 GeV Proton Synchrotron Circumference: ~1.6 km

※The E16 experiment will start 2019

Japan

J-PARC E16 Experiment

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Detectors �4

and further, the first data of momentum dependence of the spectral change, with the 6 timeshigher statistics than that of E325 collected, as shown in this section. In addition, we alsomeasure the yield and kinematical distribution of vector mesons, and background conditionsin the limited detectors in this stage. Based on the information, we could blush up thedetailed plan of the next stage.

With additional budget of about 5 Oku yen, we will able to prepare the full acceptance,which consists of 26 modules. (Cost for new module is 0.26 Oku yen/module including readoutelectronics.) The configuration is illustrated in Fig. 8. We would like to run 320 shifts (RUN2) with the configuration, and take physics data. We will be able to do systematic study ofthe in-medium spectral change of vector mesons.

Here, we would like to request approval for RUN 0 and RUN 1.The expected yield of vector mesons expected for the different configuration and different

lengths of the data taking is listed in Table I. For the estimation, we assume the usage of a400 µm -thick Carbon target and two 80 µm -thick Copper targets simultaneously, locatedin-line on the beamline. Thus the total interaction length is 0.2 % and the interaction rate is10 MHz at the target with the beam of 1×1010 protons per 2-sec pulse. Other numbers usedfor the yield estimation is summarized in Table II.

FIG. 7: Detector configuration with 8 modules.FIG. 8: Detector configuration with 26 modules.(RUN 2)

RUN beam time configuration target φ ωRUN 0 9 shifts 6 + 6 + 2 + 2 Cu 460 2400RUN 0’ 9 shifts 8 + 8 + 8 + 8 Cu 840 4400RUN 1 160 shifts 6 + 6 + 2 + 2 Cu 8200 42000RUN 1’ 160 shifts 8 + 8 + 8 + 8 Cu 15000 (1700)RUN 1’ 160 shifts 8 + 8 + 8 + 8 C 12000 (1500)RUN 2 320 shifts 26 + 26 + 26 + 26 Cu 69000 (12000)

KEK-PS E325 Cu 2400 (460) 3200

TABLE I: Numbers of φ’s and ω’s expected for different configurations and lengths of the beam time,compared to the numbers obtained by the KEK-PS E325 experiments. Numbers in parentheses arefor mesons with βγ < 1.25. Four numbers interleaved with “+” in the configuration column describesthe numbers of the modules for the four spectrometer components : SSD, GTR, HBD, and LG,respectively.

10

Proton Beam

Hadron Blind Detector(HBD)

Lead Glass Calorimeter(LG)

GEM Tracker (GTR)×3

Target ChamberSilicon Strip Detector (SSD)

Flight Path Detection -> Momentum Measurement

Electron Identification

Using 4 types detectors

◯Readout ・112,996 ch ・Taking waveform data ・Waveform sampling time: 　1 ns ・Waveform buffering time: 　2 μs

◯Trigger ・Using GTR3, HBD, LG ・2,620 ch ・

Trigger System �5

GTR3

HBD

ASD

ASD

LG DRS4 ADC/TDC

Trigger Merging Module

GTR3 ASDTrigger Merging Module

GTR3 ASDTrigger Merging Module

GTR3 ASDTrigger Merging Module

Trigger Merging Module

HBD ASDTrigger Merging Module

HBD ASDTrigger Merging Module

HBD ASDTrigger Merging Module

Trigger Merging Module

LGDRS4

ADC/TDC

Trigger Merging Module

LG DRS4 ADC/TDC

Trigger Merging Module

LG DRS4 ADC/TDC

Trigger Merging Module

Trigger Decision Module

Belle-2 UT-3

Trigger Distribution Module

Belle-2 FTSW

to Readout Modules

TRG-MRG ~15 modules

Detector, Discriminator ・2,620 ch ・

Trigger Merging Module (TRG-MRG)

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TRG-MRG: Hardware �7

SFP+: optical links ×8

FPGA: Xilinx Spartan3 50AN-4

RJ45: for Remote JTAG

RJ45: FTSW

Connector to Mezzanine ×2

NIM I/O ×212 V Power Supply

DC/DC

Main Board Mezzanine Card128 ch LVDS Receiver

LVDS->1.8V LVCMOS Converter

125 MHz Crystal Oscillator ×2

FPGA: Xilinx Kintex7 160T-2

250 MHz

TRG-MRG: Firmware �8

500 MHz DDR Deserializer

Edge Detecter

Delay Control(up to 1,024 ns)

Hit Buffer

FIFO

Aurora8b10b ×4 lanes

Discriminator 256 ch

Hit Buffer

Hit Buffer

FIFO FIFO FIFO

SFP+ SFP+ SFP+ SFP+

Using Vivado IP Core(ISERDESE2) 1 GHz × 1 bit -> 250 MHz × 4 bit

Buffering maximal 8 hits for 64 ns in each 64 ch

32 bit × 5 cycle / 64 ns -> 2.5 Gbps

6.25 Gbps optical transceiver

Link-layer protocol for high-speed serial communication

1 ns Sampling, 256 ch Multi Hit TDC + 6.25 Gbps 4 GTX Transceivers

TDC

Transceiver

For clock domain crossing

LVDS to LVCMOS Converter Mezzanine

Hit Buffer

156.25 MHz

※Implemented by Vivado2017.2

Performance Test

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Time Resolution �10

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

tin[ns]

ΔT[ns]

5.10

h0Entries 1256244Mean 1189Std Dev 0.1338

1188 1188.5 1189 1189.5 1190 1190.5 1191 1191.5 11920

200

400

600

800

1000

1200

310× h0Entries 1256244Mean 1189Std Dev 0.1338

TIMELAG

1189 11901188 1191時間差[ns]

カウント数

5.11 3bin :

y =√x(1− x)/2 2

62

Function Generator Delay TRG-MRG

1 kHz Pulse width: ~50 ns

Discriminator

5.1.4

5.2 5.3

DRS4 500MHz

(DSOX4054A[30]) DRS4

h0Entries 1463002Mean 16.05Std Dev 0.2212

15 15.5 16 16.5 17 17.5 18 18.5 19Time Lag[ns]

0

200

400

600

800

1000

1200

1400310×

Cou

nt h0Entries 1463002Mean 16.05Std Dev 0.2212

5.2 2ch

54

Distribution of time difference between 2 channel

Distribution of time resolution

※tin: the remainder of (time difference) / LSB

Red line: Quantization error

Time resolution < 0.35 ns in all tin region Good agreement with expected error

Time Difference[ns]

Latency �11

Edge Detect

Delay Control

Hit Buffer

FIFO

Aurora8b10b ×4 lanes

Hit Buffer

Hit Buffer

Hit Buffer

FIFO FIFO FIFO

SFP+ SFP+ SFP+ SFP+

TDC

Optical CableSFP+ SFP+ SFP+ SFP+

500MHz DDR Deserializer

Transceiver

Aurora8b10b ×4 lanes

◯Latency of TDC section 　From deserializing LVDS signals 　to transmitting data to transceivers 　with no delay

◯Latency of transceiver section 　From inputting data to FIFO 　to outputting data from Aurora 　through optical cable

Encode Serialize

Deserialize Decode

Latency: TDC Section �12

※Using circuit simulator in Vivado2017.2

レイテンシ 15

回路シミュレーターを用いて確認

Receive discriminator output

Transmit hit data

64 ns 179 ns

64 ns0 ns

Detect leading edges -> Buffering for 64 ns

Latency in TDC section is

Entries 3.5e+07Mean 288Std Dev 3.692

285 290 295 300 305 310 315 320

410

510

610

710

Entries 3.5e+07Mean 288Std Dev 3.692

latency {event

h0Entries 132808Mean 2.094RMS 1.491

0 2 4 6 8 10 120

5000

10000

15000

20000

25000

30000

35000h0

Entries 132808Mean 2.094RMS 1.491

nhit

h1Entries 132808Mean 3.615RMS 1.949

h1Entries 132808Mean 3.615RMS 1.949

Transfer Efficiency of the Merging Criteria �14Merging Criteria: Allow maximal 8 hits for 64 ns in 64 ch

Beam Rate[GHz]6 8 10 12 14

TRG

-MR

G R

elay

ing

Effic

ienc

y0.94

0.95

0.96

0.97

0.98

0.99

1

5 GHz 10 GHz

99.95 %

98.75 %

Discarded hit

Multiplicity for 64 ns in 64 ch

Beam intensity dependence of the transfer efficiency

Beam rate


99.95% transfer efficiency in expected situation Enough to use in the experiment

Blue: Beam Rate = 5 GHz Red: Beam Rate = 10 GHz

◯Simulate expected situation 　in the experiment with Geant4 　・Beam Rate: 1×1010 /pulse (5 GHz) 　・Single rate:

Summary �15・Develop trigger merging module(TRG-MRG) for the J-PARC E16 Experiment

・Detect leading edges from discriminator output by FPGA 　and transmit serialized data to trigger decision module by SFP+

・1 main board + 2 mezzanine cards 　- Mezzanine: Receive 128 ch/card LVDS signal + Convert LVDS to LVCMOS format 　- Main: 1 ns sampling, 256 ch Multi Hit TDC + 6.25 Gbps optical transceiver ×4

・Required performance is achieved 　- Time Resolution:

pφ

e+

e-NucleusBranching Ratio ~3×10-4

Di-lepton Measurement

Exp. Method

J-PARC E16 Experiment �17

/ ndf 2χ 87.25 / 51

Prob 0.001181

0.85 0.9 0.95 1 1.05 1.1 1.15 1.20

200

400

600

800

1000

/ ndf 2χ 87.25 / 51

Prob 0.001181

/ ndf 2χ 37.12 / 38

Prob 0.51

0.85 0.9 0.95 1 1.05 1.1 1.15 1.20

200

400

600

800

1000

/ ndf 2χ 37.12 / 38

Prob 0.51

/ ndf 2χ 88.39 / 51

Prob 0.0009053

0.85 0.9 0.95 1 1.05 1.1 1.15 1.20100200300400500

600700800900

/ ndf 2χ 88.39 / 51

Prob 0.0009053

/ ndf 2χ 37.83 / 38

Prob 0.4773

0.85 0.9 0.95 1 1.05 1.1 1.15 1.20100200300400500

600700800900

/ ndf 2χ 37.83 / 38

Prob 0.4773

/ ndf 2χ 87.41 / 51

Prob 0.001139

0.85 0.9 0.95 1 1.05 1.1 1.15 1.20

100

200

300

400

500

600 / ndf 2χ 87.41 / 51

Prob 0.001139

/ ndf 2χ 30.55 / 38

Prob 0.7997

0.85 0.9 0.95 1 1.05 1.1 1.15 1.20

100

200

300

400

500

/ ndf 2χ 30.55 / 38

Prob 0.7997

/ ndf 2χ 88.95 / 51

Prob 0.000795

0.85 0.9 0.95 1 1.05 1.1 1.15 1.20

20

40

60

80

100

120

140

160 / ndf 2χ 88.95 / 51

Prob 0.000795

/ ndf 2χ 39.18 / 38

Prob 0.4167

0.85 0.9 0.95 1 1.05 1.1 1.15 1.20

20

40

60

80

100

120

140

160 / ndf 2χ 39.18 / 38

Prob 0.4167

Simulation results : Run1, Cu target

•さらに、βγで4つのregionに分けてFitをした結果 •全てのregionで有意なexcessが見えていて、βγ-dependenceが確認できる

10

�� < 1.25 1.25 < �� < 1.75 1.75 < �� < 2.5 2.5 < ��

Fit for the

whole region

Fit except for

the excess region

Mass [GeV/c2]Mass [GeV/c2]Mass [GeV/c2]Mass [GeV/c2]

Counts /[6.67 MeV/c2 ]

Counts /[6.67 MeV/c2 ]

[GeV/c2]

Expected Spectrum

W. Nakai, JPS2017

Mass modification due to nuclear effect

In vacuum

J-PARC

30 GeV Proton Synchrotron Circumference: ~1.6 km

Motivation: Restoration of chiral symmetry breaking under nuclear density Method: Invariant mass spectroscopy of φ( ) in nuclear medium Facility: Japan Proton Accelerator Research Complex(J-PARC) High momentum(High-p) beam-line (Completed by FY2019) Beam: 30 GeV proton, ~1×10^10 /pulse(~2 s)

s̄s

High-p beam-line

Trigger Concept �18

Beam

e-

e+ GTR3HBD

LG

DetectDetect

>50°

◯Target 　e+ e- pair from φ

◯Main Back Ground 　・Miss ID of charged π 　・e+e- from π0 　　- π0 -> 2γ, γ Conversion 　　- π0 -> γe+e- (Dalitz Decay)

◯Method 　①Detect e+/e- track 　　by 3 detector’s coincidence 　　(Single rate: To avoid charged π 　②Require the opening angle > 50° 　　-> To reject e+e- from π0

◯Expected Trigger Condition 　・Trigger rate: ~1 kHz 　・φ -> ee Surviving Ratio: ~75 %

Top View of Detectors

πDetect

Not Detect

Integral Non Linearity(INL) �19

0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200

Input Time Lag[ns]

200

400

600

800

1000

1200

1400

1600

1800

2000

2200

Out

put T

ime

Lag[

ns]

/ ndf 2χ 29.17 / 35Prob 0.745p0 0.003807± 0.7259 p1 06− 5.194e± 1

/ ndf 2χ 29.17 / 35Prob 0.745p0 0.003807± 0.7259 p1 06− 5.194e± 1

5.3

5.2

0.02 ns ( : 5.2)

1± (5× 10−6)

5.2

GTR3 ASD

500 ns 500 ns

2 µs

55

5.2.1

1LSB 1ns

INL 1LSB

5.2.2

2

INL

5.2.3

5.4 5.3

10 210 310Input Time Lag [ns]

0.06−

0.04−

0.02−

0

0.02

0.04

0.06

Res

idua

l [LS

B]

Integral Non Linearity

5.4

5.3

0

[−0.035LSB, 0.035LSB] 1LSBINL 1ns

56

Residual[LSB]

Input Time Lag[ns]10^1 10^2 10^3

Relation between Input/Output Time Lag Distribution of Residual

Red Line: At+B Fit

Function Generator Delay TRG-MRG

1 kHz Pulse width: ~50 ns

Discriminator

INL = [-0.04, +0.04] LSB with time lag ~0-2000 ns No bad influence

Differential Non Linearity(DNL) �20

DNL = [-0.022, +0.022] LSB No bad influence

Deserialize 1 GHz -> 250 MHz -> Clock interval has 4 ns periodicity -> Check each clock width 　 from distribution of input clock signal

80.008 ns Clock TRG-MRG

Time%8[ns] Time%4[ns]

Distribution of clock edge timing

4 ns Periodicity

Minimum Pulse Width �21

Detect narrow signal (1.0-1.3ns) with 100% efficiency Enough to use in the experiment

Double Pulse Separation

1.0-1.3 ns

Input Signal

Discriminate adjacent 2 signals (2.5-2.8ns) with 100% efficiency Enough to use in the experiment

2.5-2.8 ns

Input Signal

※Those results are limited by test setup

Detect

Discriminate

Threshold

Threshold