SNIFFER Board for PCI-Express channel SNIFFER Board for PCI-Express channel Final Presentation...
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![Page 1: SNIFFER Board for PCI-Express channel SNIFFER Board for PCI-Express channel Final Presentation 12.12.06 Presenting: Roy Messinger Presenting: Roy Messinger.](https://reader035.fdocument.pub/reader035/viewer/2022062421/56649d795503460f94a5d15a/html5/thumbnails/1.jpg)
SNIFFER Board for PCI-Express channelSNIFFER Board for PCI-Express channel
Final PresentationFinal Presentation
12.12.0612.12.06
Presenting: Roy MessingerPresenting: Roy Messinger
Instructor: Boaz MizrachiInstructor: Boaz Mizrachi
High speed digital systems laboratoryהמעבדה למערכות ספרתיות מהירות
הטכניון - מכון טכנולוגי לישראל
הפקולטה להנדסת חשמל
Technion - Israel institute of technologydepartment of Electrical Engineering
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Goals Design and development of a printed circuit board capable Design and development of a printed circuit board capable
of sniffing to the PCI-E channel without interference to the of sniffing to the PCI-E channel without interference to the
data passing (passive listener).data passing (passive listener).
The sampled data will be sent to a different card (Virtex II The sampled data will be sent to a different card (Virtex II
pro) and will be analyzed for errors. pro) and will be analyzed for errors.
Getting knowledge in the various communication types Getting knowledge in the various communication types
implemented on board (RS232, SPI, I²C & PCI-E)implemented on board (RS232, SPI, I²C & PCI-E)
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Sniffer Specification 34x34 Cross Point Switch which sniffs the PCI-E channel 34x34 Cross Point Switch which sniffs the PCI-E channel
and divert the information to the outside Xilinx Virtex II and divert the information to the outside Xilinx Virtex II
pro.pro.
PIC uController configures the Cross Point Switch (PIC uController configures the Cross Point Switch (SPI SPI
architecture)architecture)..
External computer configures the uController through External computer configures the uController through
RS232 architecture (UART).RS232 architecture (UART).
EEPROM connected to the uController for additional EEPROM connected to the uController for additional
future usage (future usage (I²C architecture)I²C architecture). .
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Communication Layout
PCI-EPCI-E
SPISPI
I²CI²C
RS232RS232
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Schematic overview
PCI-E Mother Board
PCI-E Graphic card
PCI-E SnifferTest
Equipment
System screen
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Block Diagram
M21121 34x34
PIC uController
18F458
RESET
Power supply
3.3Vdc
2.5Vdc 3.3Vdc (ATX-optional)
Dip Switch
Prog. Connector 4MHz
Debug Leds
Virtex II pro
UART RS232 TCVR
RS232RS232
D-type connector
EEPROM 24LC16B
I²C
SPI
32+322+2 SMA
RS232
PC
I EX
PR
ES
S x16 lin
k
3.3Vdc
Status Leds
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uController:
PIC 18F458 uController code was generally based upon assembly+C code of
existing Crossbar of the lab.
Changes included defining ‘sense’ pins of PCI-E and attribute them to uCont.
For debug use, etc.
uController
E²PROM
Dipswitch
34x34
Xpnt
Debug leds
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Sniffing the channelOther Options examined (using 4x4 switch):
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Sniffer Specification INTERFACES:INTERFACES:
I²C – uController to EEPROM.I²C – uController to EEPROM.
SPI – uController to Cross Point Switch.SPI – uController to Cross Point Switch.
RS232 – uController to UART.RS232 – uController to UART.
– – D-type to external computer.D-type to external computer.
PCI-E PCI-E – MB to graphic card, Crossbar to link– MB to graphic card, Crossbar to link
CLOCK:CLOCK:
4MHz clock oscillator for PIC uController.4MHz clock oscillator for PIC uController.
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Sniffer Specification-Cont.
POWER SUPPLY:POWER SUPPLY:
3.3v – DC-DC converter from 5v to 3.3v, up to 3A3.3v – DC-DC converter from 5v to 3.3v, up to 3A
2.5v – DC-DC converter from 5v to 2.5v, up to 3A2.5v – DC-DC converter from 5v to 2.5v, up to 3A
M21121 34x34 Cross Point Switch :M21121 34x34 Cross Point Switch :
Vdd – 2.5v. Configuration and programming interface voltageVdd – 2.5v. Configuration and programming interface voltage
OptionalOptional – Vdd-3.3v. – Vdd-3.3v.
18F458 PIC uController :18F458 PIC uController :
Vdc- 3.3v interface voltageVdc- 3.3v interface voltage
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Sniffer Specification-Cont. Layout Stackup:Layout Stackup:
2 mid layers are Vcc and GND for more capacitance – more filtering
Line-Space-Line width was determined using Hyperlinx ©
in order to achieve 100 Diff. Imp., 50 Single Ended Imp.
4.5 8 4.5 mil
Extreme Delicate Editing!
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Sniffer Specification-Cont. INTERFACES:INTERFACES:
Interface from external computer to Sniffer through RS232 is Interface from external computer to Sniffer through RS232 is
accomplished using a VB.Net GUI based software, which send accomplished using a VB.Net GUI based software, which send
pre-defined scripts to the components on Board:pre-defined scripts to the components on Board:
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Mechanical Design
Draft:Draft:
FinalFinal
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Sniffer Final board:
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Sniffer Debug Phase:
The crosspoint was configured in such way to shorten the input and output The crosspoint was configured in such way to shorten the input and output
SMA connector. Afterwards, a Pulse Generator and a Scope was brought to SMA connector. Afterwards, a Pulse Generator and a Scope was brought to
test the Sniffer.test the Sniffer.
Scope
Pulse Gen.
PCI-E Sniffer
‘10101010…’
‘10101010…’
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Sniffer Debug Phase:
PRBS function was used in the Pulse Generator in order to see eye pattern. PRBS function was used in the Pulse Generator in order to see eye pattern.
Voltage was 0.7p-p (or +0.35V, -0.35V) according to the PCI-E spec.Voltage was 0.7p-p (or +0.35V, -0.35V) according to the PCI-E spec.
Eye diagram when Input32 (J6, J8) is switched to output32 (J3, J5), Equalization enabled
Eye diagram when Input32 (J6, J8) is switched to output32 (J3, J5), Equalization disabled
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Sniffer Debug Phase:
A PCI-E X1 LAN board was connected in order to verify the crosspoint A PCI-E X1 LAN board was connected in order to verify the crosspoint
ability to transfer signals correctly.ability to transfer signals correctly.
PCI-E Sniffer
PCI-E X1 Lan card
‘10101010…’
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Thanks
Many thanks to all the lab staff:Many thanks to all the lab staff: Eli ShushanEli Shushan Mony OrbachMony Orbach Ina RivkinIna Rivkin Bruria Bruria And of course:And of course:
Boaz MizrachiBoaz Mizrachi