ALU by mehboob nazim

8/9/2019 ALU by mehboob nazim

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Arithmetic Logic Unit

BS. Telecommunication and Networks

FINAL PROJECT REPORTFINAL PROJECT REPORTFINAL PROJECT REPORTFINAL PROJECT REPORT

FOUR BIT ARITHMETIC LOGIC UNITFOUR BIT ARITHMETIC LOGIC UNITFOUR BIT ARITHMETIC LOGIC UNITFOUR BIT ARITHMETIC LOGIC UNIT

COMPUTER ARCHITECTURE

Instructor:

\

Dr.M.yousuf.

Supervisor:

Sir Fawad Raza

Department of Computing Science and TechnologyIqra University Islamabad Campus


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DEDICATION:DEDICATION:DEDICATION:DEDICATION:

We dedicate our project to our beloved parentsand our most respected teachers for the

guidance, kindness and dedication they haveshowed towards us without which this project

would not have been possible


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ACKNOWLEDGEMENTACKNOWLEDGEMENTACKNOWLEDGEMENTACKNOWLEDGEMENT

We all are very thankful to Almighty ALLAH for giving us courage for

making this report.

And we are also very thankful to our teacher Dr. Muhammad Yousaf for

giving us this project from which we explored the corporate sector.


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GROUP MEMBERSGROUP MEMBERSGROUP MEMBERSGROUP MEMBERS

Mehboob Nazim Shehzad (BSTN) 1085

Naheeda Mir (BS.CS) 1266

Faizan Ahmad (BSTN) 1081

Ajmal Khan (BSTN) 1080


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TABLE OF CONTENTTABLE OF CONTENTTABLE OF CONTENTTABLE OF CONTENT

Title: ..................................Error! Bookmark not defined.Dedication: ....................................................................... 2

Introduction: ....................................................................... 6

Purpose: ............................................................................ 6

Arithmetic unit: ................................................................... 6

Circuit diagram ................................................................ 7

Circuit Diagram of Full Adder: ........................................ 8

Multiplexer: - ................................................................... 8Circuit Diagram of Multiplexer: .................................... 9

Block Diagram of AU: ................................................... 10

Circuit Diagram of AU: - ............................................... 11

Logic unit: ......................................................................... 12

Circuit Diagram of LU: - ................................................ 13

Operation Of ALU: - ......................................................... 14


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INTRODUCTION:INTRODUCTION:INTRODUCTION:INTRODUCTION:

The ALU is a fundamental building block of the central processing unit of a computer.

The ALU is abbreviation for arithmetic-logic unit. The ALU is a combinational logic

device (which basically means it can be constructed from AND, OR, and NOT gates, andis the implementation of a Boolean function).

PURPOSEPURPOSEPURPOSEPURPOSE:

The purpose of the ALU is to perform computation on its data inputs, such as adding the

two sets of inputs, or subtracting, or performing bit wise operations. The control bits tell

the ALU which operation to perform.

Components of ALU:

ALU has three components;

Arithmetic unit Logic unit

ARITHMETIC UNIT:ARITHMETIC UNIT:ARITHMETIC UNIT:ARITHMETIC UNIT:

The arithmetic unit (AU) is a digital circuit that calculates an arithmeticoperation (like an addition, subtraction, etc.)

In our project we have made an AU that can perform addition as well assubtraction.

For addition we need an adder; there are two kinds of adders, half adder andthe full adder. A full adder is made up of two half adders. Half adder is used

to add two bits. But if we want to add more than two bits then we use full

adder.

Truth table for a half adder is as follow:Truth table for half adder

Inputs Outputs

A B C (carry) S (sum)

0 0 0 0

0 1 0 1

1 0 0 1

1 1 1 0


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Block diagram of half adder is as shown below:

A S

B C

Circuit diagram:

Truth table for Full Adder

Inputs Outputs

S(Switch) A B C(carry)

S (sum)

0 0 0 0 0

0 0 1 0 1

0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0

1 1 0 1 0

1 1 1 1 1

Half

Adder


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Block diagram of Full Adder:

A SB C

S

Circuit Diagram of Full Adder:

MULTIPLEXMULTIPLEXMULTIPLEXMULTIPLEXER:ER:ER:ER:A multiplexer or mux (occasionally the term muldex is also found, for a

combination multiplexer-demultiplexer) is a device that selects one of many data-sourcesand outputs that source into a single channel.

Truth Table of Multiplexer

Inputs Output

SW (Switch) A B D

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 0

1 1 1 1

Full

Adder


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BLOCK DIAGRAM OF MULTIPLEXER:BLOCK DIAGRAM OF MULTIPLEXER:BLOCK DIAGRAM OF MULTIPLEXER:BLOCK DIAGRAM OF MULTIPLEXER:A

D

B

SW

CIRCUIT DIAGRAM OF MULTIPLEXER:CIRCUIT DIAGRAM OF MULTIPLEXER:CIRCUIT DIAGRAM OF MULTIPLEXER:CIRCUIT DIAGRAM OF MULTIPLEXER:

MU

X


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BLOCK DIAGRAM OF AU:BLOCK DIAGRAM OF AU:BLOCK DIAGRAM OF AU:BLOCK DIAGRAM OF AU:

C(I/P)A0

B0 F0

A1F1

B1

A2B2 F2

A3F3

B3

Carry (o/p)

SW

F.A

F.A

F.A

F.A

M

U

X

M

U

X

MU

X

M

U

X


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CIRCUITCIRCUITCIRCUITCIRCUIT DIAGRAM OF AU:DIAGRAM OF AU:DIAGRAM OF AU:DIAGRAM OF AU:


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LOGIC UNIT:LOGIC UNIT:LOGIC UNIT:LOGIC UNIT:The logic unit (LU) is a digital circuit that performs logic operations (like an

Exclusive or) between two numbers.

SW

A0G0

B0

A1

G1

B1

A2

G2

B2

A3G3

B3

MUX

MUX

MUX

MUX


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CIRCUIT DIAGRAM OF LU:


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COMPLETE ALU:COMPLETE ALU:COMPLETE ALU:COMPLETE ALU:


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NOTE:NOTE:NOTE:NOTE:

We use those gates in ALU circuit.

LOGIC GATESLOGIC GATESLOGIC GATESLOGIC GATES

Digital systems are said to be constructed by using logic gates. These gates are

the AND, OR, NOT, NAND, NOR, EXOR and EXNOR gates. The basic

operations are described below with the aid of truth tables.

AND GATEAND GATEAND GATEAND GATE,&JDWH,&V

The AND gate is an electronic circuit that gives a high output (1) only if all itsinputs are high. A dot (.) is used to show the AND operation i.e. A.B. Bear in

mind that this dot is sometimes omitted i.e. AB

OR GATEOR GATEOR GATEOR GATE,&JDWH,&V


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The OR gate is an electronic circuit that gives a high output (1) if one or

more of its inputs are high. A plus (+) is used to show the OR operation.

NOT GATENOT GATENOT GATENOT GATE,&JDWH,&V

The NOT gate is an electronic circuit that produces an inverted version of theinput at its output. It is also known as an inverter.If the input variable is A, the

inverted output is known as NOT .This is also shown as A', or A with a barover the top, as shown at the outputs. The diagrams below show two ways that

the NAND logic gate can be configured to produce a NOT gate.

EXOR GATEEXOR GATEEXOR GATEEXOR GATE,&JDWH,&V


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The 'Exclusive-OR' gate is a circuit which will give a high output if either, but

not both, of its two inputs are high. An encircled plus sign ( ) is used to show

the EOR operation.

OPERATION OF ALU:OPERATION OF ALU:OPERATION OF ALU:OPERATION OF ALU:

A digital arithmetic unit useful in data processing digital circuits comprises a

plurality of stages each having two half-adders combined into a full adder anda carry logic element. An objective is to shorten the processing time for the

addition and subtraction of binary numbers. For this purpose, the stages are

divided into at least two groups and two separate carry paths are providedwithin each group. One of the carry paths is only switched on by means of

selection logic elements. The activation occurs sequentially in group-wise

fashion after simultaneous carry runs in all carry paths. The advantageparticularly consists of the chronological coincidence of the carry runs in all

groups.

ALU by mehboob nazim

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