12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

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12/13 DSD Project Presentation 第第第 SD IO Interface World Real Time Clock / Alarm with C-LCM

Transcript of 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

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12/13 DSD Project Presentation

第四組SD IO Interface World Real Time

Clock / Alarm with C-LCM

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SD / SDIO Card

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SD Card Introduction

SD Card ,全名 Security Digital Card ,是小型記憶卡的一種,它被廣泛地於攜帶型裝置上使用,是由日本松下( Panasonic )公司、東芝( TOSHIBA )公司與美國 San Disk 公司共同開發研製的。

SD 卡可以看作是由 MMC 卡衍生出來的。 SD 卡投影面積與 MMC 卡相同,只是略微厚一點,但是 SD 卡的容量大得多,且讀寫速度也比 MMC 卡快 4 倍。同時, SD 卡的介面與 MMC 卡是相容的,支援 SD 卡的介面大多支援 MMC 卡。在 2006 年, SD 卡容量有 8 、 16 、 32 、 64 、 128 、 256 、 512 MB ,或 1 、2 、 4 、 6 、 8 GB 。

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用戶可以使用一個 USB 的讀卡器,在個人電腦上使用 SD 卡。某些新型電腦上已經內置了讀卡裝置。

最新的發展是 SD 內建了 USB 插口,省略了讀卡器。San Disk 的設計是使用一個可摺疊的護套來保護USB 插口。

SD Card Introduction

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SD Card Application

SD 卡多應用於

MP3 隨身聽 數位相機:儲存相片及短片 數位攝影機:儲存相片及短片 個人數位助理( PDA ):儲存各類資料 手機:儲存相片、鈴聲、音樂、短片等資料

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SDIO Card Introduction

SDIO ,意即 Secure Digital Input/Output ,所謂「支援 SDIO 」的機種,其 SD 擴充槽除了能使用 SD 記憶卡外,也可支援 SD 介面的輸出入設備,例如無線網路卡、藍芽卡、 GPS 接收器、數位相機卡、 FM 廣播卡、電視接收器、數據機、指紋辨識器等。

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比起使用 USB 插槽,使用 SDIO 卡耗電量低,並且適用於各種行動式的平台。

同樣是數位裝置,支援 SDIO 的機種只要插入 SDIO 擴充卡,就能增加各種不同的功能,例如NB 搭配無線網卡以及 PDA 搭配GPS 接收器,就是目前極受使用者青睞的實用方案。

SDIO Card Introduction

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Technology Explanation

所有 SD 和 SDIO 卡都必須支援較老的 SPI/MMC 模式。這個模式支援慢速的四線序列介面(時鐘、序列輸入,序列輸出,晶片選擇),相容於序列終端介面( SPI )和許多微控制器。

SD 卡共支援三種傳輸模式:- SPI 模式(獨立序列輸入和序列輸出),- 1 位元 SD 模式 (獨立指令和資料通道,獨有的傳輸格式)- 4 位元 SD 模式 (使用額外的針腳以及某些重新設置的針腳。 支持四位寬的平行傳輸)。

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大部分數位相機,數位音頻播放器和其他便攜設備僅能使用 MMC 模式。有關這一模式的詳細文檔可以從MMCA 購買,價格是 500 美元。但是部分有關 SDIO的文檔是免費的。有些還可以從存儲卡廠商處獲得。

MMC 模式不支持 SD 卡的加密特性。從免費的文檔裏也找不到這些細節。但對於大多數消費者來講,這無關痛癢,用戶制式用來儲存不受保護的數據。

Technology Explanation

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Other MMC / SD Card

SD Card 不是 Secure Digital Card Association(安全數字卡聯盟)批准的唯一一種記憶卡。其他批准的格式包括miniSD 、 microSD (在聯盟未通過標準前稱為 TransFlash )和 SDHC 。

這些更小的卡加上一個適配器也能用在全尺寸的 MMC/SD/SDIO 插槽上。要知道開發出 SD尺寸的輸入輸出設備標準已經很難了,再想開發更小尺寸的簡直就不太現實了。

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SD 插槽支持 MMC 卡,更小尺寸的 MMC 卡變種也能相容於支援 SD 卡的設備。與 miniSD 和 microSD 不同的是, RS-MMC 插槽可以相容全尺寸的 MMC 卡。因為 RS-MMC 卡只是縮短了的MMC 卡。

因應 SD 卡的標準容量上限只有 4GB ,不足以應付日益上升的容量需求,聯盟制定了新的 SDHC標準。SDHC 卡的外型跟普通的 SD 卡完全相同,而容量的下限為 4GB ,預料年內可推出高達 32GB 的 SDHC卡。

Other MMC / SD Card

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與其它存儲卡格式一樣, SD 卡也有眾多的專利和註冊商標保護,授權只能由安全數字卡聯盟進行。安全數字卡聯盟現在的授權協議並不允許開放原始碼的 SD驅動程序,這種狀況產生了很多關於開放原始碼和免費軟件的爭論。通行的做法是開發一個開放原始碼的外殼,但核心是針對特定平臺的封閉原始碼 SD驅動程序,這種做法與期望的開放標準差異太大。另一種通行的做法是採用較老的 MMC 模式,因為根據 SD 卡標準,所有的 SD 卡都必須支持MMC 模式。

這說明 SD 卡的開放度比 CF 卡或閃存低,上述兩種格式幾乎免費,僅需要使用聯盟標誌和註冊商標的授權費。但比 xD 卡或記憶棒的開放度高得多,這兩種格式根本不提供公開文件支援。

Standard

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類型 MMC RS-MMC

MMCPlus

SecureMMC

SD SDIO miniSD microSD

SD 插槽 是 機械適配器

是 是 是 是 電子 - 機械適配器

電子 - 機械適配器

針腳 7 7 13 7 9 9 11 8

外形規格 薄 薄 / 短 薄 薄 厚 厚 窄 / 短 /薄 窄 / 短 /超薄

SPI 模式 可選 可選 可選 支持 支持 支持 支持 支持 1 位元模式 是 是 是 是 是 是 是 是 4 位元模式 否 否 是 ? 可選 可選 可選 可選 8 位元模式 否 否 是 ? 否 否 否 否 支持 DRM* 否 否 否 是 是 N/A 是 是

Comparison With Other Memory Card

*DRM :數位著作權管理

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State Diagram

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Card Initialization

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SD Memory Card Functional Description

Command

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Command Types

Four kinds of commands defined to control the SD Memory Card:

Broadcast commands (bc), no response- The broadcast feature is only if all the CMD lines are connected together in the host. If they are separated, then each card will accept it separately in its turn.

Broadcast commands with response (bcr) response from all cards simultaneously - Since there is no Open Drain mode in SD Memory Card, this type of command shall be used only if all the CMD lines are separated - the command will be accepted and responded by every card separately.

Addressed (point-to-point) commands (ac) no data transfer on DAT

Addressed (point-to-point) data transfer commands(adtc) data transfer on DAT

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Command Types

All commands have a fixed code length of 48 bits

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Command Format

A command always starts with a start bit (always 0), followed by the bit indicating the direction of transmission (host = 1).

The next 6 bits indicate the index of the command, this value being interpreted as a binary coded number (between 0 and 63). Some commands need an argument (e.g. an address), which is coded by 32 bits.

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Command Format

A value denoted by ‘x’ in the table above indicates this variable is dependent on the command.

All commands are protected by a CRC Every command codeword is terminated by the end bit

(always 1). All commands and their arguments are listed in Table 4-18-Table 4-27.(Reference: SD Spec. p.49)

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SD Memory Card Functional Description

Cyclic Redundancy Code (CRC)

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CRC7

The CRC7 check is used for all commands, for all responses except type R3, and for the CSD and CID registers. The CRC7 is a 7-bit value and is computed as follows: Generator polynomial: G(x) = x7 + x3 + 1. M(x) = (first bit) * xn + (second bit) * xn-1 +...+ (last bit) * x0 CRC[6...0] = Remainder [(M(x) * x7)/G(x)]

The first bit is the most left bit of the corresponding bit string (of the command, response, CID or CSD). The degree n of the polynomial is the number of CRC protected bits decreased by one. The number of bits to be protected is 40 for commands and responses (n = 39), and 120 for the CSD and CID (n = 119).

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CRC7 ExamplesThe CRC section of the command/response is bolded.

CRC7

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SPI ModeSPI Mode Transaction Packets

- Command Tokens

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Command Format

All the SD Memory Card commands are 6 bytes long. The command transmission always starts with the left most bit of the bit string corresponding to the command codeword.

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All commands are protected by a CRC The commands and arguments are listed in Table 7-3.

(Reference: SD Spec. p.102)

Command Format

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CMD0

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SD Memory commandsand the equivalent SDIO commands

SD Memory Command

CMD0

SDIO Command

CMD52 (write to I/O reset in CCCR)

Comment The reset command (CMD0) is only used for memory or the memory portion of Combo cards.

In order to reset an I/O only card or the I/O portion of a combo card, use CMD52 to write a 1 to the RES bit in the CCCR (bit 3 of register 6).

Note that in the SD mode, CMD0 is only used to indicate entry into SPI mode and shall be supported.

An I/O only card or the I/O portion of a combo card is not reset with CMD0

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Reset for SDIO(CMD0) In order to reset all functions within an SDIO card or

the SDIO portion of a combo card, a method different than that used for SD memory is defined.

The reset command (CMD0) is only used for memory or the memory portion of Combo cards. In order to reset an I/O only card or the I/O portion of a combo card, use CMD52 to write a 1 to the RES bit in the CCCR (bit 3 of register 6).

Note that in the SD mode, CMD0 is only used to indicate entry into SPI mode and shall be supported. An I/O only card or the I/O portion of a combo card is not reset by CMD0

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SPI ModeSPI Mode Transaction Packets

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Command and Argument(SPI bus commands) (SD Memory Card)

Command Index CMD0

SPI Mode Yes

Argument [31:0] stuff bits

Response R1

Abbreviation GO_IDLE_STATE

Command Description

Resets the SD Memory Card

Example: the content of the command index field is (binary) ‘000000’ for CMD0

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CMD 0

Bit position 47 46 [45:40] [39:8] [7:1] 0

Width (bits) 1 1 6 32 7 1

Value ‘0’ ‘1’ ‘000000’ ignore X ‘1’

Description Start bit Transmission bit

Command index

Stuff bits CRC7 End bit

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Format of Response R1

This response token is sent by the card after every command with the exception of SEND_STATUS commands. It is one byte long, and the MSB is always set to zero. The other bits are error indications, an error being signaled by a 1.

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Format of Response R1

The structure of the R1 format is given in Figure 7-9. The meaning of the flags is defined as following:

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Format of Response R1

In idle state: The card is in idle state and running the initializing process.

Erase reset: An erase sequence was cleared before executing because an out of erase sequence command was received.

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Format of Response R1

Illegal command: An illegal command code was detected.

Communication CRC error: The CRC check of the last command failed.

Erase sequence error: An error in the sequence of erase commands occurred.

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Format of Response R1

Address error: A misaligned address that did not match the block length was used in the command.

Parameter error: The command’s argument (e.g. address, block length) was outside the allowed range for this card.

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SPI Mode Status Bits (In Idle state)

Identifier In Idle state

Type S R

Value0 = Card is ready1 = Card is in idle state

Description

The card enters the idle state after power up or reset command. It will exit this state and become ready upon completion of its initialization procedures.

Clear Condition A

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SPI Mode Status Bits (Erase reset)

Identifier Erase reset

Type S R

Value’ 0’= cleared’1’= set

DescriptionAn erase sequence was cleared before executing because an out of erase sequence command was Received

Clear Condition C

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SPI Mode Status Bits (Illegal command)

Identifier Illegal command

Type E R

Value’ 0’= no error’1’= error

Description Command not legal for the card state

Clear Condition C

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SPI Mode Status Bits (Com CRC error)

Identifier Com CRC error

Type E R

Value’ 0’= no error’1’= error

DescriptionThe CRC check of the commandfailed.

Clear Condition C

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SPI Mode Status Bits(Erase sequence error)

Identifier Erase sequence error

Type E R

Value’ 0’= no error’1’= error

DescriptionAn error in the sequence of erasecommands occurred.

Clear Condition C

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SPI Mode Status Bits (Address error)

Identifier Address error

Type E R X

Value’ 0’= no error’1’= error

DescriptionA misaligned address which did not match the block length was used in the command.

Clear Condition C

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SPI Mode Status Bits(Parameter error)

Identifier Parameter error

Type E R X

Value’ 0’= no error’1’= error

DescriptionAn error in the parameters of thecommand.

Clear Condition C

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SPI Mode Status Bits

1) Type: E: Error bit. S: State bit. R: Detected and set for the actual command response. X: Detected and set during command execution. The host can get the status by issuing a command with R1 response.

2) Clear Condition: A: According to the current state of the card. C: Clear by read

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CMD5

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Format of CMD5

The IO_SEND_OP_COND Command contains the following fields: S (start bit)

Start bit. Always 0 D (direction)

Direction. Always1 indicates transfer from host to card. Command Index

Identifies the CMD5 command with a value of 000101b

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Format of CMD5

The IO_SEND_OP_COND Command contains the following fields:

Stuff BitsNot used, shall be set to 0.

I/O OCROperation Conditions Register. The supported minimum and

maximum values for VDD.

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Format of CMD5

The IO_SEND_OP_COND Command contains the following fields:

CRC77 bits of CRC data

E (end bit)End bit, always 1

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Value of CMD5

Bit position 47 46 [45:40] [39:32] [31:8] [7:1] 0

Width(bits) 1 1 6 8 24 7 1

Value ‘0’ ‘1’ ‘000101b’ ‘00000000’‘111111111000000000000000’

X ‘1’

Description Start bitTransmission

bitCommand

indexStuff bits I/O OCR CRC7

End bit

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Value of CMD5

1*: OCR Values for CMD5

I/O OCR bitPosition

VDD Voltage Window(in Volts)

15 2.7 – 2.8

16 2.8 – 2.9

17 2.9 – 3.0

18 3.0 – 3.119 3.1 – 3.2

20 3.2 – 3.3

21 3.3 – 3.4

22 3.4 – 3.5

23 3.5 – 3.6

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The IO_SEND_OP_COND Response (R4)

An SDIO card receiving CMD5 shall respond with a SDIO unique response, R4.

The format of R4 for both the SD and SPI modes is:

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The Response, R4 contains the following data: S (start bit)

Start bit. Always 0 D (direction):

Direction. Always 0. Indicates transfer from card to host.

Reserved: Bits reserved for future use. These bits shall be set to 1.

The IO_SEND_OP_COND Response (R4)

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The Response, R4 contains the following data: C

Set to 1 if Card is ready to operate after initialization I/O OCR

Operation Conditions Register. The supported minimum and maximum values for VDD.

Memory PresentSet to 1 if the card also contains SD memory. Set to 0 if the card is I/O only.

The IO_SEND_OP_COND Response (R4)

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The Response, R4 contains the following data: Number of I/O Functions

Indicates the total number of I/O functions supported by this card. The range is 0-7. (Note that the common area present on all I/O cards at Function 0 is not included in this count. The I/O functions shall be implemented sequentially beginning at function 1.)

The IO_SEND_OP_COND Response (R4)

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Modified R1: The SPI R1 response byte as described in the SD Physical Specification modified for I/O as follows:

• Stuff Bits: Not used, shall be set to 0.

The IO_SEND_OP_COND Response (R4)

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Value of R4 (SPI Mode)

Bit position [39:32] 31 [30:28] 27 [26:24] [23:0]

Width (bits) 8 1 3 1 3 24

Value*a

‘0?0???0?’‘1’ ‘101’ ‘0’ ‘000’

‘011111111100000000

000000’

Description Modified R1 CNumber of

I/O functionsMemory present

Stuff bits I/O OCR

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CMD8

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Introduction to CMD8

SEND_IF_COND (CMD8) is used to verify SD Memory Card interface operating condition. The card checks the validity of operating condition by analyzing the argument of CMD8 and the host checks the validity by analyzing the response of CMD8 (See Chapter 4.3.13).

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Send Interface Condition Command (CMD8)

CMD8 (Send Interface Condition Command) is defined to initialize SD Memory Cards compliant to the Physical Specification Version 2.00.

CMD8 is valid when the card is in Idle state. This command has two functions.

Voltage check: Checks whether the card can operate on the host supply

voltage. Enabling expansion of existing command and

response: Reviving CMD8 enables to expand new functionality to some

existing commands by redefining previously reserved bits.

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Format of CMD8

Application Note: It is recommended to use ‘10101010b’ for the ‘check pattern’.

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Basic Command of SD Memory Card bus

CommandsCommand Index CMD8

Type bcr

Argument [31:12]reserved bits[11:8]supply voltage(VHS)[7:0]check pattern

Resp R7

Abbreviation SEND_IF_COND

Command Description

Sends SD Memory Card interface condition, which includes host supply voltage information and asks the card whether card supports voltage. Reserved bits shall be set to '0'.

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Card Operation for CMD8 in SPI mode

In SPI mode, the card always returns response. Table 7-5 shows the card operation for CMD8.

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Format of Response R7

This response token is sent by the card when a SEND_IF_COND command (CMD8) is received. The response length is 5 bytes. The structure of the first (MSB) byte is identical to response type R1. The other four bytes contain the card operating voltage information and echo back of check pattern in argument and are specified by the same definition as R7 response in SD mode.

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Value of R7 (CMD8)

Bit position [39:32] [31:28] [27:12] [11:8] [7:0]

Width (bits) 8 4 16 4 8

Value ’01h’ ‘0000’ ‘0000h’ ‘0001b’ ‘10101010b’

DescriptionR1(assu

me in idle state)

Command version

Reserved bitsVoltage

acceptedCheck pattern

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CMD52

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Format of CMD52

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Width (bits)

1 1 6 1 3 1 1 17 1 8 7 1

Value

‘0’ ‘1’ ‘110100b’

*a *e *b ‘0’ *c ‘0’ *d x ‘1’

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7

End bit

缺 register address (17 bits)

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Value of CMD52

*a: 0 => read data

data address = specified by the Function Number & the Register Address to the host

1 => write data, to address = I/O location (by the Function Number) &

the Register Address

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*b: 1 => then R/W=1, write then read 0 => read then write

*c: This is the address of the byte of data inside of

the selected function to read or write.

Value of CMD52

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*d: For a direct write command (R/W=1)

this is the byte that is written to the selected address. For a direct read (R/W=0)

this field is not used and shall be set to 0.

Value of CMD52

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*e: (Our definition)

Value Function 功能

‘001’ Fuction1 設定時間

‘010’ Function2 切換時區

‘011’ Function3 設定鬧鐘

‘100’ Function4 顯示鬧鐘 / 時間

‘101’ Function5 關掉鬧鐘

Value of CMD52

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Format of R5(CMD52)

Bit position [15:8] [7:0]

Width (bits) 8 8

Value *a ( ‘0?0???00’ ) *b

Description Modified R1(in ready state)

R/W Data ( data been read )

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Value of R5(CMD52)

*a : The SPI R1 response byte as described in the SD

Physical Specification modified for I/O as follows:

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Value of R5(CMD52)

R/W=1, RAW=1: The value read from the addressed register.

In this case, the read-back data may not be the same as the data written to the register, depending on the design of the hardware.

R/W=1, RAW=0: the data in this field shall be identical to the data byte in the

write command.

R/W=0: the actual value read from that I/O location is returned in

this field.

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Common I/O Area Structure

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Common I/O Area(Function 0)

主要有三個 Register structureSupport function 0 --

Card Common Control Register(CCCR)

allow quick host checking and enable/disable interrupt/function

Function Basic Register(FBR)

Each function has 256 bytes area that allow host determine the abilities and

requirements of each function

Card Information Structure (CIS)Provides more Complete information about

the card and each function

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Card Command Control Register

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CCCR Overall Register Map

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Address 0X00: SD Revision

Bit R/W Represent Value

3 ~ 0 Read only

These 4 bits contain the version of the CCCR and FBR format that this card supports.

0000 -- CCCR/FBR Version 1.000001 -- CCCR/FBR Version 1.100010 -- CCCR/FBR Version 1.200011 to 1111 -- Reserved for Future Use

7 ~ 4 Read only

These 4 bits contain the version of the SDIO Specification that this card supports.

0000 SDIO Specification Version 1.000001 SDIO Specification Version 1.100010 SDIO Specification Version 1.20 (unreleased)0011 SDIO Specification Version 2.000100-1111 Reserved for Future Use

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Address 0X01: SD Specification Revision

Bit R/W Represent Value

3 ~ 0 Read only

These 4 bits contain the version of the SD Physical Specification that this card supports.

0000 SD Physical Specification Version 1.01 (March 2000)0001 SD Physical Specification Version 1.10 (October 2004)0010 SD Physical Specification Version 2.00 (May 2006)0011-1111 Reserved for Future Use

7 ~ 4 Reserved for Future Use

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Address 0X02: I/O Enable

Bit R/W Represent Value

0 Reserved for Future Use

7 ~ 1 R/W The completion of initialization isindicated in IORx. On power up or after a reset, the card shall reset this bit to 0. The host can also use IOEx as a per function reset for error recovery. The host sequence for a per function reset is to reset IOEx to 0, wait until IORx becomes 0 and then set IOEx to 1 again.

If the bit is reset to 0, the function is disabled. If the bit is set to 1, the function is enabled to start its initialization.

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Address 0X03: I/O Ready

Bit R/W Represent Value

0 Reserved for Future Use

7 ~ 1 Read only

(Supplement) The functions shall set this bit to 1 within the timeout value defined in theTPLFE_ENABLE_TIMEOUT_VAL tuple. On power up or after a reset, this bit shall be set to 0. For any function that is not implemented on an SDIO card, this bit shall always be 0

If this bit is reset to 0, the function is not ready to operate.If this bit is set to 1, the function is ready tooperate.

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Address 0X04: Interrupt Enable

Bit R/W Represent Value

0 R/W Interrupt Enable Master. If this bit is cleared to 0, no interrupts from this card shall be sent to the host. If this bit is set to 1, then any function’s interrupt shall be sent to the host

7 ~ 1 R/W Interrupt Enable for function(1-7) If the bit is cleared to 0, any interrupt from this function shall not be sent to the host. If this bit is set to 1, then this function’s interrupt shall be sent to the host if the master Interrupt Enable (bit 0) is also set to 1.

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Address 0X05: Interrupt Pending

Bit R/W Represent Value

0 Reserved for Future Use

7 ~ 1 Read Only

Interrupt Pending for function (1-7)Note that if the IENx or IENM bits are not set, the host cannot receive this pending interrupt.

If this bit is cleared to 0, this indicates that nointerrupts are pending from this function. If this bit is set to 1, then this function hasinterrupt pending.

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Address 0X06: I/O Abort

Bit R/W Represent Value

2 ~ 0 Write only

Abort Select In order to abort an I/O read or write and free the SD bus.(Note) the function that is currently transferring data must be addressed.

These 3 bits define which function’s transfer to stop.(Example) the abort the transfer to function number 3, the value of 0x03 would be written to these bits using CMD52 only. If the abort is addressed to a suspended function, it does not affect current data transaction.

3 Write only

I/O CARD RESET Setting the RES to 1 shall cause all I/O functions in an SDIO or Combo card to perform a soft reset.

7 ~ 4 Reserved for Future Use

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Address 0X07: Bus Interface

Bit R/W Represent Value

1 ~ 0 R/W Defines the data bus width to be used for data transfer. All Full-Speed SDIO cards support both 1 and 4-bit bus.

’00’=1-bit or’10’=4-bit bus

4 ~ 2 Reserved for Future Use

5 R/W Enable Continuous SPI Interrupt.

“1”, then this R/W bit is used to allow the SDIO card to assert the interrupt line in the SPI mode at any time.This bit is cleared to “0” on reset or power-up.

6 Read only

Support Continuous SPI interrupt.

“1” to indicate that this SDIO card supports the assertion of interrupts in the SPI mode at any time.“0” , then this SDIO card can only assert the interrupt line in the SPI mode when the CS line is asserted

7 R/W CD Disable Connect[0]/Disconnect[1] the 10K-90K ohm pull-up resistor on CD/DAT[3] (pin 1) ofthe card.

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Address 0X08: Card Capability (2 of 2)

Bit R/W Represent Value

4 Read only

Supports interrupt between blocks of data in 4-bit SD mode. This flag bit reports the SDIO card’s ability to generate interrupts during a 4-bit multi-block data transfer

If this bit is 0, then the SDIO card is not able to signal an interrupt during a multi-blockdata transfer in 4-bit modeIf this bit is 1, then the SDIO card is able to signal an interrupt between blocks while data transfer is in progress.

5 R/W Enable interrupt between blocks of data in 4-bit SD mode. Enable the multi-block IRQ during 4-bit transfer for the SDIO card.

0, the card shall not signal interrupts during a 4-bit multi-block data transfer1, the card shall generate interrupts during 4 bit multi-block data transfers

6 Read only

Card is a Low-Speed card or not 1 – low-speed card0 – full-speed card

7 Read only

4-bit support for Low-Speed cards 1 – LSC = 1 & supports 4-bit data transfer0 – otherwise

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Address 0X08: Card Capability (1 of 2)

Bit R/W Represent Value

0 Read only

Card Supports Direct Commands during data transfer. This bit applies only to the SD modes, it does not apply to SPI mode.

1 Read only

ICard Supports Multi-Block. This flag bit reports the SDIO card’s ability to execute the IO_RW_EXTENDED command (CMD53) in the block mode.

If this bit is set, all I/O functions (0-7) shall accept and execute CMD53 with the optional block mode bit set.

2 Read only

Card Supports Read Wait. This bit applies only to the SD modes, it does not apply to SPI mode

3 Read only

Card supports Suspend/Resume. This bit applies only to the SD modes, it does not apply to SPI mode.

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Address 0X09 ~ 0X0B: Common CIS Pointer

Bit R/W Represent Value

7 ~ 0 Read only

This 3-byte pointer points to the start of the card’s common CIS. A card common CIS is mandatory for all SDIO cards. This pointer isstored in little-endian format (LSB first).

The common CIS contains information relation to the entire card. The card common CIS shall be located within the CIS space of function 0 (0x001000- 0x017FFF)

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Address 0X0C: Bus Suspend

Bit R/W Represent Value

0 Read only

Bus status 1, then the currently addressed function is currently executing a command which transfers data on the DAT[x] line(s).0, then the addressed functionis not using the data bus.

1 R/W Bus Release Request/Status 1, the addressed function shall temporarily halt data transfer on the DAT[x] lines andsuspend the command that is in process.

7 ~ 2 Reserved for future use

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Address 0X0D: Function Select

Bit R/W Represent Value

3 ~ 0 R/W Select Function bits 3:0 0000 : Transaction of function 0 (CIA)0001-0111: Transaction to functions 1-71000: Transaction of memory in combo card1001-1111: Not defined, reserved for future use

6 ~ 4 Reserved for future use

7 Read only

Resume Data Flag If DF is set to 1, then there is more data to transfer that will begin after the function or memory in resumed.If DF=0, the function or memory wassuspended at end of data transfer (during busy)

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Address 0X0E: Exec Flags

Bit R/W Represent Value

7 ~ 0 Read only

Execution Flag. These bits are used by the host to determine the current execution status of all functions (1-7) and memory (0).

The bit is set to 1 for each function or memory that is currently executing a command. These bits are only defined if SBS=1If SBS=0 these bits shall be read as zero.

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Address 0X0F: Ready Flags

Bit R/W Represent Value

7 ~ 0 Read only

Ready Flag bits.These bits tell the host the read or write busy status for functions (1-7) and memory (0).

If the RFx bit is set to 1, then the function/memory can accept write data.if the RFx bit is cleared to 0, it indicates that read data is NOT available.

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Address 0X10 ~ 0X11: Function 0 block size

Bit R/W Represent Value

10[7..0]11[7..0]

R/W This 16-bit register sets the block size for I/O block operations for Function 0 only.

The maximum block size is 2048 (0x0800)and the minimum is 1.

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Address 0X12: Power Control

Bit R/W Represent Value

0 Read only

Support Master Power ControlThese bits tell the host if the card supports Master Power Control

0 : The total card current is less than 200mA1 :The total card current may exceed 200mA.

1 R/W Enable Master Power Control

0(default): The total card current shall be less than 200mA.1: The total card current may exceed 200mA and SPS and EPS are available

7~2 Reserved for Future Use

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Address 0X13: High-Speed

Bit R/W Represent Value

0 Read only

Support High-Speed 0: The card does not support High-Speed mode1: The card supports High-Speed mode.

1 R/W Enable High-Speed 0 (default): The card operates in default timing mode with a clock rate up to 25MHz.1 : High-Speed Mode

7~2 Reserved for Future Use

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Address 0X14 ~ 0XEF: RFU

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Address 0XF0~ 0XFF: Reserved for Vendors

These 16 registers are reserved for the maker of the I/O card to be used for anyoperations that are defined by and specific to any vendor unique operation.

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Common I/O Area Structure

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Common I/O Area(Function 0)

主要有三個 Register structureSupport function 0 --

Card Common Control Register(CCCR)

allow quick host checking and enable/disable interrupt/function

Function Basic Register(FBR)

Each function has 256 bytes area that allow host determine the abilities and

requirements of each function

Card Information Structure (CIS)Provides more Complete information about

the card and each function

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Function Basic Register (FBR)

Function 1-7 Register Mapping

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FBR (Function 1-7)Function 1-7 有著相同的 Structure, 在此舉其中 Function1 作為例子

Function 1:0X100 to OX1FF共 256 bytes

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Function 1: Address 0X100

Bit R/W Represent Value

3 ~ 0 Read only

SDIO Function Interface code顯示此 Function 有 Support 的 I/O Interface

0000: No supported function 0001: Support Standard UART0010: Type-A Bluetooth 0011: Type-B Bluetooth0100: Support GPS 0101: Support Camera0110: Support PHS 0111: Support WLAN1000: Embedded SDIO-ATA 1111: Support other interface(Specified in 0x101)

4 & 5 RFU

6 ReadOnly

Whether this function support Code Storage Area(CSA)

1: Yes0: No

7 R/W Enable function CSA 1: Enable 0: Disable (R/W CSA will be blocked)(initial value)

Function 2-7 Address = 0X(2..7)00

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Function 1: Address 0X101

Bit R/W Represent Value

7 ~ 0 Read only

Extended SDIO Function Interface code當 address 0X100 的 [3..0] 為 1111 ,則此 8 bits 有意義

Undefined, if 0X100[3..0] != 1111 => 預設為 00000000

Function 2-7 Address = 0X(2..7)01

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Function 1: Address 0X102

Bit R/W Represent Value

0 Read only

Support Power Selection(SPS)

0: no power selection (EPS=0)1: has 2 power mode that could be selected by EPS

1 R/W Enable Power Selection(EPS)

0(Default) : Higher Current Mode(Maximum current = TPLFE_HP_MAX_PWR_3.3V)1: Lower Current Mode(Maximum current = TPLFE_LP_MAX_PWR_3.3V)

7 ~ 2 RFU

Function 2-7 Address = 0X(2..7)02

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Function 1: Address 0X103-0X108

Bit R/W Represent Value

7 ~ 0 RFU

Function 2-7 Address = 0X(2..7)03 – 0X(2..7)08

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Function 1: Address 0X109-0X10B

Bit R/W Represent Value

0X10B[7..0]+0X10A[7..0]+0X109[7..0]共 24bits

ReadOnly

Address pointer to function CIS( 只有最後 17bits 有作用 , 其中 0X10B[7..1] always zero)1. CIS為每個 Function皆有的 Structure2. Store in liitle-endian format(LSB first)3. If the card doesn’t support CIS, then pointer value = End of Chain tuple

Address to CIS

Function 2-7 Address = 0X(2..7)09 – 0X(2..7)0B

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Function 1: Address 0X10C-0X10E

Bit R/W Represent Value

0X10E[7..0]+0X10D[7..0]+0X10C[7..0]共 24bits

R/W Address pointer to function CSA1. After any R/W to CSA access window, this pointer will be increased 1 automatically2. If this function does not support CSA(0x100 bit 6 = 0), then this 24 bits shall read as 0X0000003. . Store in liitle-endian format(LSB first)

Address to CSA

Function 2-7 Address = 0X(2..7)0C – 0X(2..7)0E

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Function 1: Address 0X10F

Bit R/W Represent Value

7~0 R/W Data access window to CSAAny R/W to this address when CSA is enable,shall pass data to/from the address by CSA address pointer(0X10C~0X10E)

When 0x100[7] = 1Contain data written to CSA imminentlyWhen 0X100[7] = 0=>Always 00000000

Function 2-7 Address = 0X(2..7)0F

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Function 1: Address 0X110-0X111

Bit R/W Represent Value

0X111[7..0]+0X110[7..0]共 16 bits

R/W Function 1 I/O Block SIZE1. Before use it, user should set appropriate value2. Store in little-endian format

Maximum Value is 2048(0X0800)Minimum Value is 1 (0X0001)Initial value = 0X0000When the card doesn’t support I/O operationRead only and always 0X0000

Function 2-7 Address = 0X(2..7)10 ~ 0X(2..7)11

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Function 1: Address 0X112-0X1FF

Bit R/W Represent Value

0X112 –0X1FF

RFU

Function 2-7 Address = 0X(2..7)12 ~ 0X(2..7)FF

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Common I/O Area(Function 0)

主要有三個 Register structureSupport function 0 --

Card Common Control Register(CCCR)

allow quick host checking and enable/disable interrupt/function

Function Basic Register(FBR)

Each function has 256 bytes area that allow host determine the abilities and

requirements of each function

Card Information Structure (CIS)Provides more Complete information about

the card and each function

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Function 用法

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Function 1

Function 1 : 設定時間 Address

0x0000 reset_rtc0x0001 TH0x0002 H0x0003 TM0x0004 M0x0005 TS0x0006 S

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Function 2

Function 2 : 切換時區 Address

0x0000 change_city 0x0001 city0 0x0002 city1

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Function 3

Function 3 : 設定鬧鐘 Address

0x0000 set_alarm 0x0001 TH 0x0002 H0x0003 TM0x0004 M0x0005 TS0x0006 S

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Function 4 & 5

Function 4 : 顯示鬧鐘時間 Address

0x0000 show_sel Function 5 : 取消在響的鬧鐘

Address

0x0000 cancel_pending0x0001 alarm_pending

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Data Trasmission Method

這是我們所有有用到的傳輸方式

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Operation Between Command

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read_ command

讀 command 是每 8bit 讀一次的

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CMD0

Bit position 47 46 [45:40] [39:8] [7:1] 0

Description Start bit Transmission bit

Command index Stuff bits CRC7 End bit

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R1 (CMD0)

Bit position 7 6 5 4 3 2 1 0

Description MSB Parameter error

Address error

Erase sequence error

Com crc error

Illegal command

Erase reset(by cmd8)

In idle state

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CMD8

Bit position 47 46 [45:40] [39:20] [19:16] [15:8] [7:1] 0

Description Start bit

Transmission bit

Command index

Reserved bits

Voltage supplied(VHS) (2.7-3.6V)

Check pattern

CRC7

End bit

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R7 (CMD8)

Bit position [39:32] [31:28] [27:12] [11:8] [7:0]

Description R1(assume in idle state)

Command version

Reserved bits Voltage accepted Check pattern

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Bit position 47 46 [45:40] [39:32] [31:8] [7:1] 0

Description Start bit Transmission bit

Command index

Stuff bits I/O OCR CRC7 End bit

CMD5(1)

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Bit position [39:32] 31 [30:28] 27 [26:24] [23:0]

Description Modified R1 C Number of I/O functions

Memory present

Stuff bits I/O OCR

R4 (CMD5(1))

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Bit position 47 46 [45:40] [39:32] [31:8] [7:1] 0

Description Start bit Transmission bit

Command index

Stuff bits I/O OCR CRC7 End bit

CMD5(2)

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Bit position [39:32] 31 [30:28] 27 [26:24] [23:0]

Description Modified R1 C Number of I/O functions

Memory present

Stuff bits I/O OCR

R4 (CMD5(2))

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illegal commandBit position 47 46 [45:40] [39:32] [31:8] [7:1] 0

Description Start bit Transmission bit

Command index

Stuff bits I/O OCR CRC7 End bit

Page 131: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

illegal command

Page 132: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

address errorBit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff Register address

Stuff Write data or stuff bits

CRC7 End bit

Page 133: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

address error

Page 134: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.
Page 135: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

SDIO Card Implementation

Page 136: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.
Page 137: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

RTC

Page 138: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Real Time Clock (RTC)

Page 139: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Main Functionality

由輸入的 clock 隨時計算現在的時間 設定時間之後,讀進控制元件的時間資料,輸出每一秒的正確時間

ClockFrequency Divider

clk_50KHz clk_1Hz

rtc_in[19:0]reset

rtc_out[19:0]

Page 140: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

ClockFrequency Divider

clk_50KHz clk_1Hz

rtc_in[19:0]reset

rtc_out[19:0]

Clock

Page 141: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

• RTC register 記住 TH, H, TM, M, TS, S

的資訊• 做進位判斷

Clock

ClockFrequency Divider

clk_50KHz clk_1Hz

rtc_in[19:0]reset

rtc_out[19:0]

TH H TM M TS S[01] [1001] [101] [1000] [011] [0000] →19:58:3019 17 13 10 6 3 0

Page 142: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

ClockFrequency Divider

clk_50KHz clk_1Hz

rtc_in[19:0]reset

rtc_out[19:0]

Frequency Divider

ClockFrequency Divider

clk_50KHz clk_1Hz

rtc_in[19:0]reset

rtc_out[19:0]

Clock

Page 143: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

• 將 input clock 除頻成 1Hz

Frequency Divider

ClockFrequency Divider

clk_50KHz clk_1Hz

rtc_in[19:0]reset

rtc_out[19:0]

Page 144: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Frequency Divider

ClockFrequency Divider

clk_50KHz clk_1Hz

rtc_in[19:0]reset

rtc_out[19:0]

RESET

• 在 reset 的時候,重新計算 1Hz 的計數器

Page 145: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

23:59:59

00:00:00

00:00:01

Page 146: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

alarm

Page 147: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Alarm

Page 148: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Design idea Input : 1. rtc_data (現在時間 ) 2. alarm_data (鬧鐘設定時間 ) 3. control

Control(0) => rtc_enable Control(1) => set Control(2) => cancel

Page 149: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Output : 1. alarm_pending

(“1”表示鬧鈴在響;” 0”表示鬧鈴沒有在響 )

2. alarm_data_o

(把接收到的鬧鐘設定時間送出去 )

Design idea

Page 150: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Main Functionality

這個 architecture 最主要就是判斷線在鬧鈴是否在響。。不使用鬧鐘功能( set = 0 ) => 不會響。。 rtc沒有在工作( rtc_enable = 0 ) => 不會響。。取消鬧鈴鍵是被按下的( cancel = 1 ) => 不會響。。 set = 1 , rtc_enable = 1, cancel = 0

=> 若現在時間和鬧鐘設定的時間相同 => 開始響。 => set變成 0 , rtc_enable變成 0 , cancel變成 1 => 停止。

Page 151: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

State Diagram of Alarm

At pending1) [match = 1 or 0 , set = 1 , rtc_enable = 1 , cancel = 0] => pending2) other situation => not_pending

At not_pending1) [match = 1 , set = 1 , rtc_enable = 1 , cancel = 0] => pending2) other situation => not_pending

Page 152: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Testbench of Alarm當現在時間和鬧鐘設定時間一樣時,

control 各種情況的 simulation

cancel

Set

Rtc_enable

Page 153: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Testbench of Alarm 在 60ns 時,現在時間和鬧鐘設定時間變不同,但是沒有取消,所以鬧鈴繼續響。在 70ns 時,取消鈕被按下 (control[2]變成 1) ,所以鬧鈴停止。

cancel

Set

Rtc_enable

Page 154: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

change

change

Page 155: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

切換時區

Page 156: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Main Functionality

提供切換時區的功能,將 RTC 和 alarm output 的時間做時區處理

將經過時區處理的 time data 加上欲顯示的時區代碼後傳送給 LCD

Page 157: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Design Idea先挑選出一定數量的時區代表城市作為對換資料,判斷現在時間的城市時區,與要變換的城市時區做比較,將其作時差的加減對應而換算到新城市的時間

留意進位、退位和前後天 ( 如超過 24 小時 ) 的時間換算顯示

Page 158: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Flow of Change City

Input Input

time datatime dataNew time dataNew time data

New city time dataNew city time data

Original city time dataOriginal city time datano changeno change

resetresetReset timeReset time

no resetno reset

Change cityChange citychangechange

Page 159: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Testbench of Change City Input time data : UTC+4 Baku 7:49:38

Case 1 : change to UTC-4:30 Venezuela

Output time data1 : 23:19:38

---- 時區大換時區小 (+ 24 小時制變換 ) Case 2 : change to UTC+12:45 Chathamlsl

Output time data2 : 16:34:38

---- 時區小換時區大 (+ 時、分的進退位 )

Page 160: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Reset : city0 20 010100 UTC+4 BakuOutput: City TH H TM M TS S Output: City TH H TM M TS S

[010100][000000] [00] [0111] [100] [1001] [011] [010100][000000] [00] [0111] [100] [1001] [011] [1000][1000]

31 25 19 17 13 10 6 3 031 25 19 17 13 10 6 3 0

ResetReset 32’b032’b0

Page 161: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Case 1 : UTC+4 Baku UTC-4:30 Venezuela 7 : 49 : 38 23 : 19 : 38

OutputOutput : : city1 TH H TM M TS Scity1 TH H TM M TS S

[001001] [000000] [10] [0011] [001] [1001] [011] [1000][001001] [000000] [10] [0011] [001] [1001] [011] [1000]

31 25 19 17 13 10 6 3 031 25 19 17 13 10 6 3 0

New minuteNew minuteNew hourNew hour

Page 162: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Case 2 : UTC+4 Baku UTC-4:30

Chathamlsl 7 : 49 : 38 16 : 34 : 38

OutputOutput : : city1 TH H TM M TS Scity1 TH H TM M TS S

[100101] [000000] [01] [0110] [011] [0100] [011] [1000][100101] [000000] [01] [0110] [011] [0100] [011] [1000]

31 25 19 17 13 10 6 3 031 25 19 17 13 10 6 3 0

New minuteNew minuteNew hourNew hour

Page 163: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Testbench of SDIO Card

( 在此以 80 us當成 1 sec測試 SDIO card)

Page 164: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

City0 : 001000in_data_rtc [01] [1001] [101] [1000] [011] [0000] 19 : 58 : 30in_data_alarm [01] [1001] [101] [1000] [100] [0000] 19 : 58 : 40

Reset Set alarm

19 : 58 :31

19 : 58 :30

Page 165: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Case 1 :001000 UTC-5 New York 000011 UTC-9:30 POM 19 : 58 : 32 15 : 28 : 32

Change Unchange

15 : 28 :32

15 : 28 :33

19 : 58 :34

19 : 58 :35

Page 166: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Case 2 :001000 UTC-5 New York 000000 UTC+8 Taiwan (dedault) 19 : 58 : 36 08 : 58 : 36

08 : 58 :36

08 : 58 :37

19 : 58 :38

19 : 58 :39

Change Unchange

Page 167: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

19 : 58 :40

19 : 58 :40

show alarm alarm

in_data_alarm [01] [1001] [101] [1000] [100] [0000] 19 : 58 : 40R_data_out [01] [1001] [101] [1000] [100] [0000] 19 : 58 : 40

→ alarm pending

Page 168: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

08 : 58 :40

Change cityShow alarm time

Change city + show alarm time : 001000 UTC-5 New York 000000 UTC+8 Taiwan (dedault) 19 : 58 : 40 08 : 58 : 40

Page 169: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

19 : 58 :43

show rtc time

Cancel pending

Rtc time : 19 : 58 : 43

Page 170: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

在連接上 Host或

Host reset SDIO card 之前

Page 171: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

<sol> 加入內部軟體的 reset 模擬

Page 172: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

00:00:00 00:00:01 00:00:02 19:58:30 19:58:31

reset

在連接上 host 或 host reset 之前 RTC 仍可以照常運作

Page 173: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

LCD

Page 174: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

TESTBENCH

All Project

Page 175: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Function List起始時間

(ms)功能 內容

0 wait Wait for starting!

4.2 初始化 CMD0→CMD8 →CMD5 →CMD5

13.16 設定時間 CMD52(TH=1) → CMD52(H=9) → CMD52(TM=5) → CMD52(M=8) → CMD52(TS=3) → CMD52(S=0) → CMD52(reset_rtc=1)

26.6 設定鬧鐘 CMD52(TH=1) → CMD52(H=9) → CMD52(TM=5) → CMD52(M=8) → CMD52(TS=3) → CMD52(S=2) → CMD52(set_alarm=1)

40.04 顯示鬧鐘 CMD52(show_sel=1)

41.96 等待鬧鐘響 Waiting!

1042.44 顯示時鐘 CMD52(show_sel=0)

2042.76 關掉鬧鐘 CMD52(cancel_pending=1)

2046.6 切換時區 CMD52(city=Paris) → CMD52(change_city=1)

3042.76 關掉鬧鐘 CMD52(cancel_pending=1)

Page 176: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

TESTBENCH

RESET_RTC

Page 177: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7

End bit

CMD52(TH=1)

Page 178: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TH=1)

Page 179: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

R5(CMD52)

Bit position [15:8] [7:0]

Description Modified R1(in ready state)

R/W Data ( data been read )

Page 180: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7

End bit

CMD52(H=9)

Page 181: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(H=9)

Page 182: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TM=5)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7

End bit

Page 183: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TM=5)

Page 184: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(M=8)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7

End bit

Page 185: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(M=8)

Page 186: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TS=3)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7

End bit

Page 187: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TS=3)

Page 188: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(S=0)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7

End bit

Page 189: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52

(reset_rtc=1)

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7

End bit

Page 190: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52

(reset_rtc=1)

Page 191: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

TESTBENCH

設定鬧鐘

Page 192: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TH=1)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 193: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TH=1)

Page 194: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(H=9)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 195: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(H=9)

Page 196: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TM=5)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 197: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TM=5)

Page 198: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(M=8)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 199: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(M=8)

Page 200: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TS=3)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 201: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(TS=3)

Page 202: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(S=2)Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 203: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(S=2)

Page 204: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52

(set_alarm=1)

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 205: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Set Alarm

CMD52

(set_alarm=1)

Page 206: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

TESTBENCH

顯示鬧鐘

Page 207: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52

(show_sel=1)

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 208: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Show Alarm

CMD52

(show_sel=1)

Page 209: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

TESTBENCH

顯示時鐘

Page 210: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52

(show_sel=0)

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 211: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Show Clock

CMD52

(show_sel=0)

Page 212: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

TESTBENCH

關掉鬧鐘

Page 213: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Match!

ringing

Page 214: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52(cancel_pending=1)

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 215: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

Stop alarm

Stop ringing

CMD52(cancel_pending=1)

Page 216: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

TESTBENCH

CHANGE_CITY

Page 217: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52

(city=Paris)

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

Page 218: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52

(city=Paris)

Page 219: 12/13 DSD Project Presentation 第四組 SD IO Interface World Real Time Clock / Alarm with C-LCM.

CMD52

(change_city=1)

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

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CMD52

(change_city=1)

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TESTBENCH

關掉鬧鐘

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CMD52(cancel_pending=0)

Bit position

47 46 [45:40] 39 [38:36] 35 34 [33:17] 16 [15:8] [7:1] 0

Description

Start bit

Direction

Command index

R/W Flag

Function number

RAW flag

Stuff

Register address

Stuff

Write data or stuff bits

CRC7 End bit

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CMD52(cancel_pending=0)

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Project Finish

LCDTime Display

SDIO Card

Command Response1. Initialization2. Data Transfer (Support 4 I/O Function) - 設定時間 - 設定鬧鐘 - 取消鬧鐘 - 切換時區

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ThankYou!