1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly
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Transcript of 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

Page 1: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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8-Bit Gray Code Converter

By

Martin Serena, Dang Ly, Khoa Ly

Page 2: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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Overview• Gray Code Background• Delegated Duties• Method of Design• Target Specifications• Simulation Results• Block Diagram• Schematics, Symbols, Layouts, and Simulations• Design References• Conclusion

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Gray Code Background

• Conversion works in both directions

• Binary Gray , Gray Binary

• One bit changes from number to number

• Not arithmetic

• Not weighted (e.g. 222120)

• Limits the amount of error that can occur when several bits change between numbers

• No limit to number of converted bits

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Binary to Gray Code Conversion

• MSB does not change as a result of conversion• Start with MSB of binary number and add it to

neighboring binary bit to get the next Gray code bit

• Repeat for subsequent Gray coded bits

1 + 1 0 0+ +

1 00 1

(BC)

(GC)

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Gray to Binary Code Conversion

• MSB does not change as a result of conversion• Start with MSB of binary number and add it to the

second MSB of the Gray code to get the next binary bit

• Repeat for subsequent binary coded bits

1 0 1 0

+

1 01 0

(GC)

(BC)

++

Page 6: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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Delegated Duties

• Martin – Binary to Gray Conversion, Gray to Binary Conversion

(XOR gates)• Dang – Binary/Gray Output Selection

(MUXs) • Khoa – Binary Code Counter, Parallel-to-Parallel Shift Register

(D flip-flops)

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Method of Design• Decided on an initial load capacitance (Cin)• Partitioned the circuit into different propagation

delay times according to gate/device requirements, and divided propagation delay times amongst the individual gates and devices

• Created the symbol and layout for out each type of gate (XOR, MUX, NAND)

• Connected gate symbols to create device symbols• Connected gate layouts to create device layouts• Connected device symbols to create circuit

schematics, and connected device layouts to create circuit layouts

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Target Specifications• Conversion:

– Binary Code to Gray Code– Gray Code to Binary Code

• Propagation delay times:– XOR (each): 0.4 nS– MUX (each): 0.3 nS– D flip-flop (each): 0.63 nS (worst-case fall time)

• Technology specs (size):– Minimum Channel Width = 1.5 m– Minimum Channel Length = 0.6 m

• Power < ¼ Watt• Clock Speed = 200 MHz• Total area as small as possible

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Simulation Results

• Successfully converts binary and Gray codes• Propagation Delay

– XOR (each): 0.338 nS (worst-case)

– MUX (each): 0.35 nS (worst-case)

– D flip-flop (each): 1.14 nS (worst-case fall time)

• Technology specs (size)– Transistor Lengths: 0.6 m

– XOR: Wp = 3.9 m Wn = 3.75 m

– MUX: Wp = 6 m Wn = 3 m

– D Flip-Flop: Wp = 18 m Wn = 10 m

Page 10: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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Simulation Results

• Power (using the power meter)– 39.94 mW

• Clock Speed– 200 MHz

• Total Area– Gray code converter: 6.03E-4 cm2

– Counter: 10.2E-4 cm2

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Block Diagram

Page 12: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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XOR Schematic

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XOR Symbol

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XOR Layout

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XOR Extracted

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XOR LVS Report

Page 17: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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XOR Test Bench

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XOR Transient Analysis

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XOR Threshold

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MUX Schematic

Page 21: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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MUX Symbol

Page 22: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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MUX Layout

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MUX Extracted

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MUX LVS Report

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MUX Test Bench

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MUX Transient Analysis

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MUX Transient Analysis

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NAND3 Schematic

Page 29: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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NAND3 Symbol

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NAND3 Layout

Page 31: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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NAND3 Extracted

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NAND3 LVS Report

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NAND3 Test Bench

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NAND3 Transient Analysis

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D Flip-Flop Schematic

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D Flip-Flop Symbol

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D Flip-Flop Layout

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D Flip-Flop Extracted

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D Flip-Flop LVS Report

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D Flip-Flop Test Bench

Page 41: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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D Flip-Flop Transient Analysis

Page 42: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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Counter Schematic

Page 43: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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Counter Symbol

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Counter Layout

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Counter Extracted

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Counter LVS Report

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Counter Transient Analysis

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Gray Code Converter Schematic

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Gray Code Converter Symbol

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Gray Code Converter Layout

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Gray Code Converter Extracted

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Gray Code Converter LVS Report

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Gray Code Converter Test Circuit

Page 54: 1 8-Bit Gray Code Converter By Martin Serena, Dang Ly, Khoa Ly.

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Gray Coded Transient Analysis

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Binary Coded Transient Analysis

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Power

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Design References

• CMOS Integrated Circuits– By Kang

• Digital Fundamentals– Thomas Floyd

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Conclusion

• We designed and simulated a Gray code converter that converts binary coded numbers to Gray coded numbers and vice versa

• The nmos and pmos transistor widths were greater than 1.5 m

• The power specifications were well below ¼ Watt and a code conversion took place within 5 nS

• Our target specifications were met