EKT104 ANALOG EKT104 ANALOG ELECTRONIC CIRCUITSELECTRONIC CIRCUITS[LITAR ELEKTRONIK ANALOG][LITAR ELEKTRONIK ANALOG]
BASIC BJT AMPLIFIER BASIC BJT AMPLIFIER (PART II) (PART II)
1
DR NIK ADILAH HANIN BINTI ZAHRIDR NIK ADILAH HANIN BINTI [email protected]@unimap.edu.my
• The basic common-emitter circuit used in previous analysis causes a serious defect :
• If BJT with VBE=0.7 V is used, IB=9.5 μA & IC=0.95 mA
• But, if new BJT with VBE=0.6 V is used, IB=26 μA & BJT goes into saturation; which is not acceptable Previous circuit is not practical
• So, the emitter resistor is included: Q-point is stabilized against variations in β, as will the voltage gain, AV
• Assumptions
• CC acts as a short circuit
• Early voltage = ∞ ==> ro neglected due to open circuit
BASIC COMMON-EMITTER BASIC COMMON-EMITTER AMPLIFIERAMPLIFIER
2
COMMON-EMITTER COMMON-EMITTER AMPLIFIER AMPLIFIER
WITH WITH EMITTER RESISTOREMITTER RESISTOR
CE amplifier with emitter resistor Small-signal equivalent circuit (with current gain parameter, β)
inside transistor
3
• ac output voltage
• Input voltage loop
• Input resistance, Rib
• Input resistance to amplifier, Ri
• Voltage divider equation of Vin to Vs
Remember: Assume VA is infinite, ro is neglected
Cbo RIV
Ebbbin RIIrIV
Eb
inib Rr
I
VR 1
ibi RRRR 21
sSi
iin V
RR
RV
4
COMMON-EMITTER COMMON-EMITTER AMPLIFIER AMPLIFIER
WITH WITH EMITTER RESISTOREMITTER RESISTOR
• So, small-signal voltage gain, AV
• If Ri >> Rs and (1 + β)RE >> rπ
Remember: Assume VA is infinite, ro is neglected
Si
i
E
Cv
sib
inC
s
Cb
s
ov
RR
R
Rr
RA
VR
VR
V
RI
V
VA
1
1
E
C
E
Cv R
R
R
RA
1
5
COMMON-EMITTER COMMON-EMITTER AMPLIFIER AMPLIFIER
WITH WITH EMITTER RESISTOREMITTER RESISTOR
RS
R1
R2 RE
RC
vs
vO
CC
VCC
CE
B C
E
Vo
Vs RC
RS
r roR1|| R2 gmV
Emitter bypass capacitor, CE provides a short circuit
to ground for the ac signals
COMMON-EMITTER AMPLIFIER COMMON-EMITTER AMPLIFIER WITH WITH EMITTER BYPASS CAPACITOREMITTER BYPASS CAPACITOR
Small-signal hybrid-π equivalent circuit
Emitter bypass capacitor is used to short out a portion or all of emitter resistance by the ac signal.
Hence no RE appear in the hybrid-π equivalent circuit
6
VOLTAGE GAIN VOLTAGE GAIN WITH AND WITH AND WITHOUT BYPASS WITHOUT BYPASS
CAPACITORCAPACITOR
7
RS=0.5k
R1=56k
R2=12.2k RE=
0.4k
RC=2k
vs
vO
CC
VCC=10V
CE
7.0,,100 BEA VV
Compare the Voltage gain value with and without Bypass Capacitor of the following circuit.
VOLTAGE GAIN VOLTAGE GAIN WITH AND WITH AND WITHOUT BYPASS WITHOUT BYPASS
CAPACITORCAPACITOR
8
RS=0.5k
R1=56k
R2=12.2k RE=
0.4k
RC=2k
vs
vO
CC
VCC=10V
CE
7.0,,100 BEA VV 53.45.006.8
06.8
)4.0)(101(2.1
)2)(100(
06.816.4||2.12||56||||
6.41)4.0)(101(2.1)1(
/1.83026.0
16.2
2.116.2
)026.0)(100(
81.4,16.2
21
v
ibi
Eib
CQ
Ao
T
CQm
CQ
T
CEQCQ
A
kRRRR
kRrR
I
Vr
VmAV
Ig
kI
Vr
VVmAI
Voltage gain Measurement Without Bypass Capacitor
VOLTAGE GAIN VOLTAGE GAIN WITH AND WITH AND WITHOUT BYPASS WITHOUT BYPASS
CAPACITORCAPACITOR
9
RS=0.5k
R1=56k
R2=12.2k RE=
0.4k
RC=2k
vs
vO
CC
VCC=10V
CE
7.0,,100 BEA VV6.113
5.007.1
07.1
2.1
)2)(100(
07.12.1||2.12||56||||
2.1
/1.83026.0
16.2
2.116.2
)026.0)(100(
81.4,16.2
21
v
ibi
ib
CQ
Ao
T
CQm
CQ
T
CEQCQ
A
kRRRR
krR
I
Vr
VmAV
Ig
kI
Vr
VVmAI
Voltage gain Measurement With Bypass Capacitor
STABILITY OF VOLTAGE STABILITY OF VOLTAGE GAIN GAIN
• Stability : Measure of how well an amplifier maintains its design values over changes
• Bypassing external RE does produce maximum voltage gain, however there is stability problem because ac voltage depends internal ac emitter resistance, re
• Where re depends on IE and on temperature
10
Swamping Method
•Method to minimize effect of re
without reducing the voltage gain to minimum value
• RE is partially bypassed so that reasonable gain can be achieved and the effect of re on the gain can be greatly eliminated
• RE is formed with two separate emitter resistor, where RE2 is bypassed and RE1 is not 11
COMMON-EMITTER AMPLIFIER COMMON-EMITTER AMPLIFIER WITH WITH EMITTER BYPASS CAPACITOREMITTER BYPASS CAPACITOR
Common-emitter amplifier with emitter bypass capacitor
DC & AC LOAD LINE DC & AC LOAD LINE ANALYSISANALYSIS
• DC load line
• Visualized the relationship between Q-point & transistor characteristics
• AC load line
• Visualized the relationship between small-signal response & transistor characteristics
• Occurs when capacitors added in transistor circuit
12
Example 1: Determine the Q-point (VBE=0.7V, β=150, VA=∞) and DC & AC Load Line. Then plot the graph.
13
COMMON-EMITTER AMPLIFIER COMMON-EMITTER AMPLIFIER WITH WITH EMITTER BYPASS CAPACITOREMITTER BYPASS CAPACITOR
DC LOAD LINEDC LOAD LINE
• KVL on C-E loop
21
21
21
21
21
1 Slope
)( So,
11
1, when point,-QFor
)(1
1 when ,)(
1
)(
EEC
EECCQCEQ
EECCCCE
CEEECCECC
EEECECC
RRR
-
RRRIVVV
RRIRIVVV
IIVRRIVRI
VRRIVRIV
SOLUTION...
14
DC & AC LOAD LINESDC & AC LOAD LINESFULL SOLUTION
15
AC LOAD LINE ANALYSISAC LOAD LINE ANALYSIS
Determine the dc and ac load line. VBE=0.7V, β=150, VA=∞
Example 2
16
DC LOAD LINEDC LOAD LINE
• To determine dc Q-point, KVL around B-E loop
kRR
-
RIRIVVV
mAIImAII
ARR
VVI
RIVRIRIVRIV
EC
EEQCCQCEQ
BQEQBQCQ
EB
EBBQ
EBQEBBBQEEEBBBQ
15
11 Slope
53.6)( point,-QFor
9.0)1( & 894.0Then
96.5)1(
)1(
17
AC LOAD LINEAC LOAD LINE
VmAV
Ig
kI
Vr
VVmAI
T
CQm
CQ
T
ECQCQ
/4.34
36.4
53.6;894.0
Small signal hybrid-π equivalent circuit
18
)//()//)(( LCcLCmeco
CQ
Ao
RRiRRvgvv
I
Vr
DC & AC LOAD LINESDC & AC LOAD LINESFULL SOLUTION
19
MAXIMUM SYMMETRICAL MAXIMUM SYMMETRICAL SWING SWING
• Symmetrical sinusoidal signal applied to the input of an amplifier produces an output of symmetrical sinusoidal signal
• AC load line is used to determine maximum output symmetrical swing
• If output is out of limit, portion of the output signal will be clipped & signal distortion will occur
20
• Steps to design a BJT amplifier for maximum symmetrical swing:
1. Write DC load line equation (relates of ICQ & VCEQ)
2. Write AC load line equation (relates ic, vce ; vce = - icReq, Req = effective ac resistance in C-E circuit)
3. Generally, ic = ICQ – IC(min), where IC(min) = 0 or some other specified min collector current
4. Generally, vce = VCEQ – VCE(min), where VCE(min) is some specified min C-E voltage
5. Combination of the above equations produce optimum ICQ & VCEQ values to obtain maximum symmetrical swing in output signal
21
MAXIMUM SYMMETRICAL MAXIMUM SYMMETRICAL SWING SWING
Example 3
Determine the maximum symmetrical swing in the output voltage of the following circuit (same as Example 2).
22
MAXIMUM SYMMETRICAL MAXIMUM SYMMETRICAL SWING SWING
SOLUTION:
• From the dc & ac load line, the maximum negative swing in the Ic is from 0.894 mA to zero (ICQ). So, the maximum possible peak-to-peak ac collector current:
• The max. symmetrical peak-to-peak output voltage:
• Maximum instantaneous collector current:
mA 79.1)894.0(2(min))(2 CCQc IIi
V 56.2)2||5)(79.1()||(|||||| LCceqcce RRiRiv
mA 79.1894.0894.0||2
1 cCQC iIi
23
MAXIMUM SYMMETRICAL MAXIMUM SYMMETRICAL SWING SWING
SELF-READINGSELF-READING
Textbook: Donald A. Neamen, ‘MICROELECTRONICS Circuit Analysis & Design’,3rd Edition’, McGraw Hill International Edition, 2007
Chapter 6: Basic BJT Amplifiers
Page: 397-413, 415-424.
24
EXERCISEEXERCISE
Textbook: Donald A. Neamen, ‘MICROELECTRONICS Circuit Analysis & Design’,3rd Edition’, McGraw Hill International Edition, 2007
Exercise 6.5, 6.6, 6.7,6.9
Exercise 6.10 , 6.11
25
Top Related