Tai Lieu Bai5.UART

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Giao Tip UART vi Atmega8

BI TP KIT AVRV2

Bi 5 . UART

R

&

D

Ver: 1.0.0 Date: 20/02/2013

Design : Xun An

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NI DUNG

I- YU CU BI II- M T PHN CNG III- M T PHN MM

THC HIN

I- YU CU BI

Vit chng trnh np cho ATmega8 thc hin trn KIT AVRV2 truyn mt chui k t c nh dng *BanLinhKien.Vn# t my tnh xung vi iu khin .Nu truyn ng chui trn th vi iu khin gi ln my tnh chui k t *OK# .ng thi mn hnh LCD tri chui k t m my tnh gi xung

II- M T PHN CNG

S nguyn l phn cng ca khi UART trn KIT AVRV2

- 2 Chn RX v TX ca MAX232 trn hnh v c ni vi 2 chn PD0 v PD1 ca chp ATmega8

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- Giao tip UART gia vi iu khin vi my tnh cn thong qua b chuyn i in p RS232 c s nh hnh v trn do tn hiu chun RS232 trn my tnh l -12V cho mc tn hiu hight v 12V cho mc tn hiu low trong khi tn hiu UART t chip theo mc TTL : mc hight l 5V v low l 0V

1- Mt s khi nim c bn - Baud rate : S bt truyn trong 1s - Frame(Khung truyn) : Bao gm cc quy nh v s lng bit trong khung truyn ,bit

bt u ,bit kt thc ,bit kim tra - Start bit : L bit u tin c truyn trong khung truyn - Data : D liu cn truyn - Parity bit : Bit kim tra mt cch tng i xem d liu truyn c ng khng .C 2

loi parity l parity chn (even parity) v parity l (odd parity). Parity chn ngha l s lng s 1 trong d liu bao gm bit parity lun l s chn. Ngc li tng s lng cc s 1 trong parity l lun l s l. V d, nu d liu ca bn l 10111011 nh phn, c tt c 6 s 1 trong d liu ny, nu parity chn c dng, bit parity s mang gi tr 0 m bo tng cc s 1 l s chn (6 s 1). Nu parity l c yu cu th gi tr

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ca parity bit l 1. Parity bit khng phi l bit bt buc v v th chng ta c th loi bit ny khi khung truyn (cc v d trong bi ny ti khng dng bit parity).

- Stop bit : L mt bit hoc nhiu bit bo cho thit b nhn rng mt gi d liu c gi xong Frame truyn thng dng c dng

Start bit Data Stop bit 2- UART vi ATmega8

1- Cc thanh ghi a- UDR : Thanh ghi d liu 8bit .Cha cc d liu nhn c hoc d liu truyn

i

b- UCSRA : Thanh ghi iu khin hot ng ca UART

Th t bit Tn bit Chc nng 7 RXC Bit trng thi bo qu trnh nhn kt thc 6 TXC Bit trng thi bo qu trnh truyn kt thc 5 UDRE =1 : Bo thanh ghi UDR trng v sn sang nhn d liu 4 FE Khung truyn li 3 DOR D liu trn 2 PE Kim tra parity c li 1 U2X Chi tc truyn 0 MPCM Bit chn ch hot ng a x l

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c- UCSRB

Th t bit Tn bit Chc nng 7 RXCIE Cho php ngt khi qu trnh nhn kt thc 6 TXCIE Cho php ngt khi qu trnh truyn kt thc 5 UDRIE Cho php ngt khi thanh ghi d liu UDR trng 4 RXEN 1 Kch hot chc nng nhn d liu 3 TXEN 1 Kch hot chc nng truyn d liu 2 UCSZ2 Quy nh di ca d liu 1 RXB8 Bt th 9 trong khung d liu nhn 0 TXB8 Bit th 9 trong khung d liu truyn

d- UCSRC

Th t bit Tn bit Chc nng 6 UMSEL 1 : Ch ng b

0 : Ch khng ng b 3 USBS 1 : 2 bit Stop

0 : 1 bit Stop 0 UCPOL 1 : Chn xung kch d liu trong truyn ng b l cnh xung

0 : Chn xung kch d liu trong truyn ng b l cnh ln

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Chn kim tra Parity

di d liu

e- Thanh ghi Baud rate

Cch tnh Baud rate

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BAUD = Fosc / (16*(UBRR+1))

BAUD : Tc Baud rate

Fosc : Tn s s dng

III- M T PHN MM

Code driver

//Hm khi to

void USART_Init(uint32_t BaudRate, uint8_t Mode)

-Tham bin

BaudRate : Tc Baud rate

Mode : Ch

//Ham gi 1 chui t my tnh xung

void USART_Puts(uint8_t *str)

-Tham bin

Str : Chui k t cn truyn

WELLCOME TO MINHHAGROUP.

Thanks For Reading!

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Tai Lieu Bai5.UART

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