Seungkyu Lee - khu.ac.krcvlab.khu.ac.kr/CELecture8.pdf · 2014-03-31 · The Fetch-Execute Cycle ....
Transcript of Seungkyu Lee - khu.ac.krcvlab.khu.ac.kr/CELecture8.pdf · 2014-03-31 · The Fetch-Execute Cycle ....
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[CSE10100] Introduction to Computer
Engineering (컴퓨터공학 개론)
Chapter 6
Seungkyu Lee
Assistant Professor, Dept. of Computer Engineering
Kyung Hee University
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The von Neumann architecture !!!!
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Control Unit
Control unit
The organizing force in the computer
- Instruction register (IR)
Contains the instruction that is being executed
- Program counter (PC)
Contains the address of the next instruction to
be executed
Central Processing Unit (CPU)
ALU and the control unit called the Central Processing Unit, or CPU
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The Fetch-Execute Cycle
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Computer Operations
Computer
A programmable electronic device that can store, retrieve, and process data
Data and instructions to manipulate the data are logically the same and can be stored in the same place
What operations can a computer execute?
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Machine Language
Machine language
The language made up of binary coded instructions built into the hardware of a particular computer and used directly by the computer
Why would anyone choose to use machine language?
(Hint: they had no choice. Why?)
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Pep/8 Virtual Computer Virtual computer
A hypothetical machine designed to contain the important features of a real computer that we want to illustrate
Pep/8
A virtual computer designed by Stanley Warford that has 39 machine-language instructions
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Features in Pep/8 Pep/8 Registers/Status Bits Covered
– The program counter (PC) (contains the address of the next instruction to be executed)
– The instruction register (IR) (contains a copy of the instruction being executed)
– The accumulator (A register)
The memory unit is made up of 65,636 bytes of storage
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Architecture of Pep/8
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Instruction Format
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Instruction Format Operation code
Specifies which instruction is to be carried out
Register specifier
Specifies which register is to be used (only use A in this chapter)
Addressing-mode specifier
Says how to interpret the operand part of the instruction
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Instruction Format
Figure 6.3 Difference between immediate addressing mode and direct addressing mode
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Some Sample Instructions
Figure 6.4 Subset of Pep/8 instructions
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Sample Instructions
Operand Register
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Sample Instructions
Operand Register
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Sample Instructions
What do these instructions mean?
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Sample Instructions
What do these instructions mean?
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Sample Instructions
What do these instructions mean?
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Written Algorithm of Hello
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In decimal?
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ASCII Character Set Mapping
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Hand Simulation 1
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Hand Simulation 1
Fetch!!!
Decode!!!
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Hand Simulation 1
Execute!!!
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Hand Simulation 2 Operand Register
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Hand Simulation 2
Fetch!!!
Decode!!! Operand Register
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Hand Simulation 2 Operand Register
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Hand Simulation 2 Operand Register
Execute!!!