Servo Datasheet

7/31/2019 Servo Datasheet

1/14

Data Sheet

PT8A995/996 DigitalProportional Remote Controller

with 2 Analog CHs & 2 Digital CHs

PT0072(05/02) Ver:11

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Features

PT8A995 works as encoder and PT8A996 work

as decoders

Supply voltage: 3.0V to 6.4V

Internal auto-shutdown function

Internal over-load protection to meet HD271 safety

specification (996)

Integrated RF circuit (995)

Two analog channels, one for tachospeed and the

other for steering

32 steps for each of two analog channels

Fine tuning selection for two analog channels

Few external components needed

Closed loop adjustment for servo motor (996)

Built-in voltage regulator (996)

Package: 16-pin DIP (995P), 20-pin DIP (996P)

and 20-pin SOIC (996S)

Applications

Remote Controller

Toys

Remote Measurement

General Description:

The PT8A995 and PT8A996 provide a simple and

economic solution for basic Digital Proportional R/C

car toys. The chipset uses CMOS LSI Analog and

Mixed Signal technology. They provide high quality

encoder/decoder circuit.

PT8A995 severs as an encoder. When it is applied in

R/C car, the built-in AD converter samples the external

tachospeed and steering inputs and converts them into

5-bit digital signals. The internal coder assembles these

signals into a multi-frame. It contains header, data and

CRC value. To obtain accurate timing easily, Manches-

ter encoding is employed. Some digital modulation

scheme can be used, e.g., general ASK, OOK, FSK and

QPSK. OOK is easy to implement and low cost.

PT8A996 works as a decoder. Demodulated RF sig-

nal will be amplified and filtered in 996 to get

baseband signal. DPLL is adopted to generate sam-

pling clock. The decoder logic can extract F/B, L/R

and functional bits from received signal. The outputs

are pulse-width-modulated. When motors are blocked,

the built-in over-load protection mechanism will work

to meet Toy Safety Requirement.

PT8A995 RF Transmitter PT8A996RF Receiver

Transmitter Receiver

Figure 1: Application Diagram


2/14

Data Sheet



PT0072(05/02) Ver:12

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Block Diagram

Figure 2. Block Diagram of PT8A995

Oscillator TimingGenerator

AD

Encoder

&

Logic

Control

RF

Osc

OSCIOSCO

SC

CA1

CA2

F/B

L/R

Offset1

Offset2

RFout

PC

IRout/SC

F1

F2

Figure 3. Block Diagram of PT8A996

OSCI

OSCO

OSC

VT1

AD

SRV

SI

Current

Limiter

SerialTo

Parallel

Timing

GeneratorFilter

PWM&

Logic

DPLL

Left

Forward

F2

Right

Backward

F1

VI1 VI2VO1 VO2

VCC VrefREF

VT2

CRC

Check

FC


3/14

Data Sheet



PT0072(05/02) Ver:13

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Pin Configuration

Top View

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

F2

F1

IRout

GND

RFout

CA1

CA2

SC

PC

L/R

F/B

OSCI

OSCO

VCC

Offset2

Offset1

PT8A995P

16-Pin DIP

Pin DescriptionTable 1. Pin Description of PT8A995

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

Forward

Backward

Right

Left

GND

VT2

VT1

VO2

VI2

VO1

F2

F1

PC

SRV

OSCI

OSCO

VCC

SI

FC

VI1

PT8A996P

20-Pin DIP

20-Pin SOIC

.oNniP .oNniP .oNniP .oNniP .oNniP emanniP emanniP emanniP emanniP emanniP noitpircseD noitpircseD noitpircseD noitpircseD noitpircseD

1 2F niplortnocnoitcnuf2F

2 1F niplortnocnoitcnuf1F

3 tuoRI seirraczHK83htiwedoctuptuO

4 DNG dnuorG

5 tuoFR seirraczHM94roM72htiwedoctuptuO

6 1AC tupnirotallicsolatsyrczHM94roM72

7 2AC tuptuorotallicsolatsyrczHM94roM72

8 CS edoctuptuO

9 1tesffO tupnideepsfotnemtsujdatesfforofdesU

01 2tesffO tupnignireetsfotnemtsujdatesfforofdesU

11 VCC

rewop

21 O OCS tuptuorotallicsolatsyrC

31 O ICS tupnirotallicsolatsyrC

41 B/F deepsdrawkcab&drawrofroftupnI

51 R/L thgir&tfelelgnagnireetsroftupnI

61 CP tuptuolortnocrewoP


4/14

Data Sheet



PT0072(05/02) Ver:14

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.oNniP .oNniP .oNniP .oNniP .oNniP emaNniP emaNniP emaNniP emaNniP emaNniP noitpircseD noitpircseD noitpircseD noitpircseD noitpircseD

1 drawroF tuptuodrawroF

2 drawkcaB tuptuodrawkcaB

3 thgiR tuptuothgiR

4 tfeL tuptuotfeL

5 DNG DNG

6 2TV tupninoitcetorptimiltnerrucrotomB/F

7 1TV tupninoitcetorptimiltnerrucrotomR/L

8 2OV tuptuoyfilpmaegatsdnocesehT

9 2IV tupniyfilpmaegatsdnocesehT

01 1OV tuptuoyfilpmaegatstsrifehT

11 1IV tupniyfilpmaegatstsrifehT

21 CF tuptuonoitcennocabatuF

31 IS tupnilangisedocnE

41 VCC

rewoP

51 OCSO tuptuorotallicsolatsyrC

61 ICSO tupnirotallicsolatsyrC

71 VRS tupnikcabdeefrotomovreS

81 CP lortnocfforewopotuA

91 1F lortnoc1noitcnuF

02 2F lortnoc2noitcnuF

Table 2. Pin Description of PT8A996


5/14

Data Sheet



PT0072(05/02) Ver:15

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Functional Description

Functional Description of PT8A995

Oscillator Circuit

A fundamental crystal or ceramic resonator can be used as os-

cillator resonator. The central frequency is 455kHz. The fre-

quency tolerance can be up to 1.5%.

Internal A/D Converter

5-bit A/D converter is built-in. It has four input channels. To

get stable analog input, the level should be within 3/8 VCC

to

5/8 VCC

. The four channels are switched in turn. Refer to Fig.

3. When a 455kHz quartz is used, CLK is 1.18kHz. F/B and L/

R are converted into 5-bit. OffsetX is converted into 3-bit. No

external load capacitor is needed.

The analog input voltage and the corresponding digitalized

values are shown in Figure 5.

When the chipset is applied in R/C car, there are gross tuning

joysticks and fine tuning joysticks for SPEED and STEER-

ING respectively. We denote them SPEEDO, speedo,

STEERINGO, steeringo, corresponding to F/B, Offset1, L/R,

Offset2 respectively. Offset1 and offset2 complement F/B and

L/R offset respectively.

If current conversion values are Vsp, Vspo, Vst, Vsto, corre-

sponding to SPEEDO, speedo, STEERINGO, steeringo re-spectively, we can describe the SPEED value to be transmitted

as

Vspeed = Vsp + Vspo.

The STEERING value is

Vsteering = Vst + Vsto.

Encoder

Each time the transmitter is active, the chip will assemble

SPEED value and STEERING value into a multi-frame as

shown in Figure 6. The multi-frame has two sub-frames, de-

noted as odd frame and even frame.

After data are assembled, the bit stream is Manchester encoded.

It is illustrated in Figure 7. A rising edge denotes 1, and a

falling edge denotes 0.

The maximum encoding delay can be calculated by using fol-

lowing formula

Tmax = (48+5) * Tclock

= 53/1.18kHz = 45 (ms)

RF Circuit

RF circuit is integrated for easy application. A fundamental

crystal or third-tune crystal is required. The RF frequency canbe 27MHz or 49MHz. On-Off-Keying (OOK) scheme is

adopted for low cost and easy implementation.

Auto-Shutdown Function

Auto-shutdown function is adopted to lower power consump-

tion. Once input signal (joysticks, or F1 and F2) are silent for

at least 5 minutes, the chip will enter Shutdown Operation mode,

during which most circuits, including RF, are powered down.

The chip will exit Shutdown Operation mode and enter Nor-

mal Operation mode when F1 and F2 are active again. For

power dissipation, refer to Table 3.

When the chip enters Shutdown Operation mode, PC will out-

put LOW level, which will switch off external circuit. If it op-

erates normally, PC maintains HIGH level. If PC is forced to

HIGH level, the chip will not be auto-shut down forever.

MUX A/D

F/B

L/R

Offset1

Offset2

SA

CLK

Figure 4. Internal A/D Converter of PT8A995


6/14

Data Sheet



PT0072(05/02) Ver:16

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Figure 5. Analog Voltage and Digitalized Values

Figure 6. Multi-Frame Structure

01111110 111 3BF4BF 0 0BF-2BF 1F 3F 0 CRC

01111110 000 3LR4LR 0 0LR-2LR 1F 3F 0 CRC

Odd Frame

Even Frame

4

4

FB4-FB0: F/B values

RL4-RL0: R/L values

F4-F1: function value

F4/F3 are reserved

Figure 7. Manchester Modulation scheme

0

1

0

1

0

1 1

0 0

Manchester

edoM edoM edoM edoM edoM I(tnerruCniarDylppuSmumixaM I(tnerruCniarDylppuSmumixaM I(tnerruCniarDylppuSmumixaM I(tnerruCniarDylppuSmumixaM I(tnerruCniarDylppuSmumixaMCCCCCCCCCC))))) P(noitapissiDrewoP P(noitapissiDrewoP P(noitapissiDrewoP P(noitapissiDrewoP P(noitapissiDrewoP

ddddd)))))

noitarepOlamroN Am02 Wm001

noitarepOnwodtuhS Au02 Wu001

Table 3

1/47/128VDD

00000

10000

01111

11111

QAZ

VCC

SA81/128VDDDD VCC

1/2VCC


7/14

Data Sheet



PT0072(05/02) Ver:17

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Functional Description of PT8A996

When a baseband signal is applied to VI1 pin, it will be ampli-

fied and then filtered by the FILTER and sent to digital phase-

lock-loop (DPLL).

Once the loop is locked into input signal, HEADER in multi-

frame structure is detected. Data in bit stream are converted

into parallel output by Serial-to-Parallel module. If no CRC

error is found, the data are valid. At final step, FB and RL will

be pulse-width-modulated.

An internal A/D converter is required to make servo motor work

well. The inputs are SRV and Offset.

When an R/C car is out of control, over-load protection is pro-

vided by Current Limiter. If the R/C car is blocked by some

barriers, Forward and Backward are disabled. If servo motor

encounters troublesome, Left and Right are disabled.

Timing Generator

Timing Generator produces frequency signals of 151kHz and

37.8kHzfrom a 455kHz master clock.

Internal Amplifier

The baseband signal is amplified in two stages. An active band-

pass filter is applied externally. It can be achieved by RC filter.

DPLL

A digital PLL is built in PT8A996 to ensures 1.5 percent car-

rier frequency tolerance. 151kHz is used as local high fre-

quency.

PWM Modulation Scheme

The outputs of PT8A996 are pulse-width modulated for pro-

portional output. The duty-ratio of output is variable and ad-

justed by input on transmitter side. The average level is pro-

portional to analog input.

The pulse frequency is 37.8KHz. Duty ratio ranges from 1/64

to 1. The F/B controller works as a proportional adjuster with

32 steps. The L/R controller is made up of position control

loop and speed control loop to ensure high accuracy and speed.

Internal A/D Converter

5-bit A/D converter is built-in. It has two input channels. To

get stable analog input, the level should be within 3/8 VCC

to

5/8 VCC

. The scale is linear. A time-division multiplexing

method is used as a simple way to switch between two chan-

nels in PT8A996. When a 455kHz quartz is used, CLK is

1.18KHz. SRV is converted into 5-bit. Offset is converted into

3-bit to complement L/R offset (Offset2 on transmitter).

If current conversion values are Vsv and Vfd with regarding toSRV and Offset respectively, we can describe the servo FEED-

BACK value to be transmitted as

Vsrv = Vsv + Vfd.

Servo Feedback System

For more accurate motor position, servo feedback is necessary.

Overload Protection Function

Over-load protection function is shown in Figure 9. Once VT

keeps effective more than Te and ineffective less than Tm, the

chip enters over-load protection mode. It will disable all out-put. The device will exit over-load protection mode when VT

is not effective more than 200ms.

Futaba compatible connection

The PT8A996 has a FC pin, whose output signal can directly

control Futabas servo-motor or other compatible servo-motor.

The signal is illustrated in Figure 10.

VT1 or VT2

VT

VT is effective Te >= 3s

Tm < 200ms

Enters over-load

protection state

VT is not effective

and exists over-load

protection

200ms

0.4V

Figure 9. Over-Load Protection Function


8/14

Data Sheet



PT0072(05/02) Ver:18

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Figure 10. Output from FC Pin

t1

t2

t1

=0.85ms~1.66ms (Pulsewidth Adjustment Step = 27us)

t2

=13.5ms

X 12 7 M

X2

4 5 5 K

F21

F12

I R o u t3

G N D4

R F o u t5

C A16

C A27

S C8

Offset19

Offset210

Vc c11

O S C O 12

O S C I13

F/ B14

L/ R15

P C16

P T 8 A 9 9 5

C 9

2 0p

C 102 0p

S W

R 9

1 K

L E D B A T

4- 6v

C 11

0 . 1 u

R V2

5. 1k

R V 1

5 . 1 k

C 14

C S

0. 1u

CI

33 pR O

20 k C O

33 p

F2

F1

C0 1

24 0C0 2

1 5 0 p

C 03

15 p

C0 6

47 pC 051 2 0 p

C0 4

39 p

L 01

0 . 2 7

L0 2

0 . 2 2 u L0 3

0 . 3 6 u

L0 4

2. 4u

C 07

2 7p

A N T

D 1

I N 4 1 4 8

Vc c

Vc c

Vc c

L O S C

3u

Figure 11. Application of PT8A995 with Internal Modulation


9/14

Data Sheet



PT0072(05/02) Ver:19

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Figure12.ApplicationofP

T8A995withExternalModulation

X1

27M

X2

455K

F2

1

F1

2

IRout

3

GND

4

RFout

5

CA1

6

CA2

7

SC

8

Offset1

9

Offset2

10

Vcc

11

OSCO

12

OSCI

13

F/B

14

L/R

15

PC

16

PT8A995

C9

20p

C10

20p

SW

R9

3k

LED

BAT

7.2-

12V

C11

0.1u

RV2

5k

RV1

5k

ANT

Q1

L2

1.5mH

C1

68p

C2

150p

C4

15n

C3

1n

R2

10

C6

68p

C14

CS

0.1u

CI

33p

Vin

1

GND

2

Vout

3V1

78L05

RO

20k

CO

33p

F2

F1

Vcc

VRF

RE1

51

CE 430

p

Q2

9018

RB2

1K

CF

0.1

5u

RF

330

RB1

1K

Vcc

Vcc

Vc

c

VRF

LOS

C

3uH

RE2

51

CP

4.7u

L1B

LA

3.3u


10/14

Data Sheet



PT0072(05/02) Ver:110

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Figure13.Supper-Regenera

tionApplicationCircuitofPT8A996

A1

C1

10p

VT1

C945

C2

27p

L18.2u

C3

3300p

C44.7u

C50.0

1u

C627p

L2

R1

560p

R2

22k

R4

3.3

k

R322k

VT2

C38

0R5430

R6470

C7100p

R710k

R8

10k

C80.1u

L3

4.7u

R10

200

C14

0.0

1u

C15

0.0

1u

G1

455k

R11

*

Left

Right

Backward

Forward

VT1

VCC

2

SI

C16

470p

C90.1u

C17

330p

C18

4700p

R12

2.2M

R14

2.2

k

R13

2.2M

R15

2.2

k

C19

0.1u

R16

2.2

k

VCC

2

Forward

1

Backward

2

Right

3

Left

4

GND

5

VT2

6

VT1

7

VO2

8

VI2

9

VO1

10

VI1

11

FC

12

SI

13

Vcc

14

OSCO

15

OSCI

16

SRV

17

PC

18

F1

19

F2

20

PT8A996

R17

5k

C20

25p

R18

5k

FeedBack

SI

R19

2k

R23

300

R24

300

R290.2

VT3

IRFZ48N

VT4

IRFZ48N

VT5

IRF4905

VT6

IRF4905

C10

0.1u

VT7

8050

VT8

8050

VT9

8050

VT10

8050

R25

300

R20

2k

R26

300

Backward

Forward

R30

3k

R31

3k

VT1

M1

R32

1

10

C21

100u

C11

0.1u

C12

0.1u

C22

470u

VCC2

L422u

D2

NJM43

1

R910k

R33

16k

B1

3.6v

SW

1

B2

3.6v

VCC1

VCC1

VCC

2

F1Function

Loading

F2Function

Loading

VT11

8050

VT12

8050

VT13

BD237

VT14

BD237

R21

2k

R27

300

R28

300

R22

2k

VT15

B

D238

VT16

BD238

C13

0.1u

Left

Right

M2

VCC1

R34

1.3

k

4.7u

C23


11/14

Data Sheet



PT0072(05/02) Ver:111

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Figure14.Supper-HeterodyneApplicationCircuitofPT8A996

G1

455k

R1

0~5k

Left

Right

Backward

Forward

VT1

Vcc2S

I

C1

0.1u

C4330p

C5

4700p

R2

2.2M R

32.2

k

Vcc2

Forward

1

Backward

2

Right

3

Left

4

GND

5

VT2

6

VT1

7

VO2

8

VI2

9

VO1

10

VI1

11

FC

12

SI

13

Vcc

14

OSCO

15

OSCI

16

SRV

17

PC

18

F1

19

F2

20

PT8A996

R45k

C6

150p

R5

5k

FeedBack

SI

VT1

8050

VT2

8050

VT7

BD237

VT8

BD237

R6 2k

R10

300

R11

300

R7

2k

VT9

BD238

VT10

BD238

C20.1u

Left

Right

M1

Motor

1

R8

2k

R12

300

R13

300

R16

0.2

VT11

IRFZ48N

VT12

IRFZ48N

VT13

IRF4905

V

T14

IR

F4905

C30.1u

VT3

8050

VT4

8050

VT58050

VT68050

R14

300

R92k

R15

300

Backwar

Forward

R173k

R183k

M2

Motor2

R19

110

C

7

100u

C8

0.1u

C90.1u

C10

470u

Vcc2

L122u

D1

NJM431

R20

10k

R21

16k

B1

3.6v

SW1

Switch

B2

3.6v

Vcc1

Vcc1

Vcc1

Vcc2

F1Function

Loading

F2Function

Loading

R22

6.8

kR23

2.7

k

R25

120

R26

220

C11

27p

C12

0.0

1u

C15

0.0

1u

C17

20p

C14

680p

C16

0.0

1u

C18

3-10p

C19

0.0

47

u

C20

3.3u

C21

180p

L2

5.1u

T1

1.2u

T32u

L32.2u

A 1

G2

27M

T2

FL1

455k

1

35

6

7

8

10

11

13

PT8A201

VT1

59018

Vcc2

Vcc2

70

82

7

D41N60

D3

1N60

R27

510

VT1

R28

1.3

k

C22

47u

D61N4148

C23

150p

D

2

1

N60

D5

1N60

R24

2.2

k

C130.1u

T1

T2

6:10


12/14

Data Sheet



PT0072(05/02) Ver:112

|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||

Figure15.

Futaba-S3003Se

rvoApplicationCircuitofPT8A996

A1

C1

10p

VT1

C945

C2

27p

L 18.2u

C3

3300p

C44.7u

C5

0.0

1u

C627p

L2

R1

560p

R2

22k

R4

3.3

k

R322k

VT2

C380

R5430

R6470

C7100p R

710k

R810k

C80.1u

L3

4.7u

R10

200

C13

0.0

1u

C14

0.0

1u

G1

455k

R11*

Left

Right

Backward

Forward

VT1

VCC2

S I

C15

470p

C90.1u

C16

330p

C17

4700p

R12

2.2M

R14

2.2

k

R

13

2.2M

R15

2.2k C

180.1

u

R16

2.2

k

VCC2

Forward

1

Backward

2

Right

3

Left

4

GND

5

VT2

6

VT1

7

VO2

8

VI2

9

VO1

10

VI1

11

FC

12

SI

13

VCC

14

OSCO

15

OSCI

16

SRV

17

PC

18

F1

19

F2

20

PT8A996

R17

5k

C19

25p

R18

5k

FeedBack

SI

R19

2k

R21

300

R22

300

VT3

IRFZ48N

VT4

IRFZ48N

VT5

IRF4905

VT6

IRF4905

C100.1u

VT7

8050

VT8

8050

VT9

8050

VT10

8050

R2

3

300

R20

2k

R24

300

Backward

Forward

R26

3k

R27

3k

M1

R28

110

C20

100u

C11

0.1u

C12

0.1u

C21

470u

VCC2

L422u

D1

NJM431

R910k

R29

16k

B1

3.6v

SW1

B2

3.6v

VCC1

VCC1

VCC2

F1Function

Loading

F2Function

Loading

SI

1

VCC

2

GND

3

Servo1

Futaba_

S3003

F C

FC

VCC1

R25

0.2

VT1

R30

1.3

k

4.7u

C22


13/14

Data Sheet



PT0072(05/02) Ver:113

|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||

Figure 16. Mechanical Diagram of 20-pin SOIC


14/14

Data Sheet



PT0072(05/02) Ver:114

|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||

Notes

Pericom Technology Inc.

Email: [email protected] Web Site: www.pti.com.cn, www.pti-ic.com

China: No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, ChinaTel: (86)-21-6485 0576 Fax: (86)-21-6485 2181

Asia Pacific: Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, HongkongTel: (852)-2243 3660 Fax: (852)- 2243 3667

U.S.A.: 2380 Bering Drive, San Jose, California 95131, USATel: (1)-408-435 0800 Fax: (1)-408-435 1100

Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improvedesign or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any circuitry describedother than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry described herein is free frompatent infringement or other rights, of Pericom Technology Incorporation.

Servo Datasheet

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