Rudra Resume Cadence
1
111 Saratoga Ave, Mob. : (+1) 352 870 7276 Apt. # 2134, [email protected] Santa Clara, [email protected] California – 95051 www.linkedin.com/pub/rudra-prasad-baksi/62/112/437/ OBJECTIVE Seeking Full-time position as an Electrical Engineer with Cadence Design Systems, to excel in a professionally challenging environment, delivering quality work through dedication & excellence which provides me ample opportunities to utilize my skills and help me realize my full potential. EDUCATION Master of Science in Electrical and Computer Engineering May 2014 University of Florida, Gainesville, FL GPA: 3.53/4.0 Bachelor of Technology in Electronics and Telecommunications May 2012 KIIT University (Kalinga Institute of Industrial Technology), Bhubaneswar, India GPA: 8.63/10.00 COURSES Advanced VLSI Design, Computer Architecture, Reconfigurable Computing, RF Circuits and Systems, Wireless Communications, Advanced MEMS, Future of Microelectronics, MEMS. TECHNICAL SKILLSET Languages : C, C++, VHDL, Python, HTML Operating Systems : Windows, Ubuntu Design and Simulation Tools : Xilinx(ISE), Cadence Virtuoso, Agilent ADS, MATLAB, LabVIEW, SimpleScalar, DIMETalk, Altium Designer Hardware Experience : Nallatech Boards, PCB Designing, ATMEGA 89C51, High Energy Ball Milling TRAINING & EXPERIENCE Radio and Television Broadcasting at All India Radio (AIR) and Doordarshan (DD), Bhubaneswar, India Summer 2011 Training on various telecommunication devices and a detailed idea of the working of the organization was imparted. Frontend Digital VLSI Designing Using EDA Tool at KIIT University, Bhubaneswar, India; XILINX ISE Summer 2010 Training on VLSI design using XILINX ISE was undertaken wherein knowledge of VHDL and FPGA based systems were imparted. Internship on Robotics and Embedded Systems at TECHNOPHILIA, Mumbai, India Fall 2009 An internship on robotics where gained knowledge on haptic arm technology, mobile-controlled robots and RF sensors. ACADEMIC PROJECTS Low Power PCB Board Designing for Temperature & CO2 Sensor; (Altium Designer)(Proposed Topic, ongoing project) Fall 2014 This project aims to implement a PCB board with a temperature and CO2 sensor along with a GPS module for weather stations. Low Power N-bit Radix-4 Booth Multiplier; (Cadence Virtuoso and Xilinx ISE 14.7) Spring 2014 This project implemented a circuit that performs 32-bit Radix-4 multiplication using Booth’s Multiplication algorithm along with minimizing the power requirements. Minimization of the power utilization was achieved through employment of data-based clock gating for minimizing power utilization. To optimize the performance of the circuit, techniques like pipelined serial multiply and accumulate and carry select adder were put to use. DRC and LVS were performed. 1-D Time Domain Convolution; (Xilinx ISE 10.1) Fall 2013 A custom circuit for DSP Applications on Virtex IV FPGA boards was designed. The circuit was to be implemented on Nallatech boards which does 1-D Time-domain convolution. Adders and multipliers were used to exploit the inherent parallelism of convolution gaining considerable speedup over microprocessor. It was hardware based coding project using VHDL. Optimization of Superscalar Execution by exploiting Data Width Locality; (SimpleScalar) Fall 2013 The project aimed at the enhancement in performance of specific computer architecture with the prediction of data-width. The data-width was used to evaluate whether multiple data can be transferred to be executed at once. Instead of fetching a single long width instruction, fetching multiple shorter width instructions enabled the use of multiple execution units at once. As a result significant speedup was achieved. Design of 1 Gb/s Wireless Link operating at 5GHz; (Agilent ADS) Spring 2013 This project was aimed at designing a RF architecture for 1 Gbps wireless link at 5 GHz unlicensed band. The design aimed at to have an Error Vector Magnitude of 2% or below. The project aimed at accomplishing the objective by using IEEE 802.11 WLAN standards. The modulation technique used here was 256 QAM in order to achieve higher orders of data rate. Finance and Consumer Growth Forecasting using concepts of Digital Signal Processing; (MATLAB) IIT Bhubaneswar, Fall 2011 Designed a prediction model for predicting future customer growth for given telecom operator based on its past records using ARTIFICIAL NEURAL NETWORK (ANN) and GENETIC ALGORITHM (GA). HONORS & AWARDS Ranked in the top 1.6% of 0.8 million students who appeared for the All India Engineering Entrance Examination 2008. Received Achievement Award from University of Florida contributing for about 40% of my tuition fees. Won First Prize in the event Consigliere (A Case Study Event) in Kritansh 2009, in KIIT University. Rudra Prasad Baksi
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Transcript of Rudra Resume Cadence
111 Saratoga Ave, Mob. : (+1) 352 870 7276 Apt. # 2134, [email protected] Santa Clara, [email protected] California – 95051 www.linkedin.com/pub/rudra-prasad-baksi/62/112/437/
OBJECTIVE Seeking Full-time position as an Electrical Engineer with Cadence Design Systems, to excel in a professionally challenging environment, delivering quality work through dedication & excellence which provides me ample opportunities to utilize my skills and help me realize my full potential.
EDUCATION Master of Science in Electrical and Computer Engineering May 2014 University of Florida, Gainesville, FL GPA: 3.53/4.0
Bachelor of Technology in Electronics and Telecommunications May 2012 KIIT University (Kalinga Institute of Industrial Technology), Bhubaneswar, India GPA: 8.63/10.00
COURSES
Advanced VLSI Design, Computer Architecture, Reconfigurable Computing, RF Circuits and Systems, Wireless Communications, Advanced MEMS, Future of Microelectronics, MEMS.
TECHNICAL SKILLSET
Languages : C, C++, VHDL, Python, HTML
Operating Systems : Windows, Ubuntu
Design and Simulation Tools : Xilinx(ISE), Cadence Virtuoso, Agilent ADS, MATLAB, LabVIEW, SimpleScalar, DIMETalk,
Altium Designer
Hardware Experience : Nallatech Boards, PCB Designing, ATMEGA 89C51, High Energy Ball Milling
TRAINING & EXPERIENCE
Radio and Television Broadcasting at All India Radio (AIR) and Doordarshan (DD), Bhubaneswar, India Summer 2011
Training on various telecommunication devices and a detailed idea of the working of the organization was imparted. Frontend Digital VLSI Designing Using EDA Tool at KIIT University, Bhubaneswar, India; XILINX ISE Summer 2010
Training on VLSI design using XILINX ISE was undertaken wherein knowledge of VHDL and FPGA based systems were imparted. Internship on Robotics and Embedded Systems at TECHNOPHILIA, Mumbai, India Fall 2009
An internship on robotics where gained knowledge on haptic arm technology, mobile-controlled robots and RF sensors.
ACADEMIC PROJECTS
Low Power PCB Board Designing for Temperature & CO2 Sensor; (Altium Designer)(Proposed Topic, ongoing project) Fall 2014
This project aims to implement a PCB board with a temperature and CO2 sensor along with a GPS module for weather stations.
Low Power N-bit Radix-4 Booth Multiplier; (Cadence Virtuoso and Xilinx ISE 14.7) Spring 2014
This project implemented a circuit that performs 32-bit Radix-4 multiplication using Booth’s Multiplication algorithm along with minimizing the power requirements. Minimization of the power utilization was achieved through employment of data-based clock gating for minimizing power utilization. To optimize the performance of the circuit, techniques like pipelined serial multiply and accumulate and carry select adder were put to use. DRC and LVS were performed.
1-D Time Domain Convolution; (Xilinx ISE 10.1) Fall 2013
A custom circuit for DSP Applications on Virtex IV FPGA boards was designed. The circuit was to be implemented on Nallatech boards which does 1-D Time-domain convolution. Adders and multipliers were used to exploit the inherent parallelism of convolution gaining considerable speedup over microprocessor. It was hardware based coding project using VHDL.
Optimization of Superscalar Execution by exploiting Data Width Locality; (SimpleScalar) Fall 2013
The project aimed at the enhancement in performance of specific computer architecture with the prediction of data-width. The data-width was used to evaluate whether multiple data can be transferred to be executed at once. Instead of fetching a single long width instruction, fetching multiple shorter width instructions enabled the use of multiple execution units at once. As a result significant speedup was achieved.
Design of 1 Gb/s Wireless Link operating at 5GHz; (Agilent ADS) Spring 2013
This project was aimed at designing a RF architecture for 1 Gbps wireless link at 5 GHz unlicensed band. The design aimed at to have an Error Vector Magnitude of 2% or below. The project aimed at accomplishing the objective by using IEEE 802.11 WLAN standards. The modulation technique used here was 256 QAM in order to achieve higher orders of data rate.
Finance and Consumer Growth Forecasting using concepts of Digital Signal Processing; (MATLAB) IIT Bhubaneswar, Fall 2011
Designed a prediction model for predicting future customer growth for given telecom operator based on its past records using ARTIFICIAL NEURAL NETWORK (ANN) and GENETIC ALGORITHM (GA).
HONORS & AWARDS
Ranked in the top 1.6% of 0.8 million students who appeared for the All India Engineering Entrance Examination 2008.
Received Achievement Award from University of Florida contributing for about 40% of my tuition fees.
Won First Prize in the event Consigliere (A Case Study Event) in Kritansh 2009, in KIIT University.
Rudra Prasad Baksi
![Shri Rudra Bhaashyam [Abhinava Shankara, 1962]](https://static.fdocument.pub/doc/165x107/552caf504a7959b4068b47ab/shri-rudra-bhaashyam-abhinava-shankara-1962.jpg)
