Quadro DR-8050 FTA SAT Receiver Sm

24
MODELS: SERVICE MANUAL DR-8050 FTA Digital Satellite Receiver Free to Air

description

Satellite Receiver Quadro DR-8050 FTA SM

Transcript of Quadro DR-8050 FTA SAT Receiver Sm

Page 1: Quadro DR-8050 FTA SAT Receiver Sm

MODELS:

SERVICE MANUAL

DR-8050 FTA

Digital Satellite ReceiverFree to Air

Page 2: Quadro DR-8050 FTA SAT Receiver Sm

CONTENTS INDEX

1. Block Diagram ……………………………………………………. 3 page

2. Features .…………………………………………………………… 4 page 3. Technical Specifications ……………………………………………. 5~8 page 4. Trouble Shooting…………………………………………………….. 9~19 page 5. Circuit Drawing……………………………………………………… 20~24 page 6-1. Main / Front

Page 3: Quadro DR-8050 FTA SAT Receiver Sm

1. BLOCK DIAGRAM

SYSTEM ADDR & DATA BUS AC IN : 90 ~ 240Vac / Max 40W

LNB

CVBS RGB

SHARP QPSK CI INTERFACE

CPU & MPEG

SMPS (3.3V,5V, 7V,12V, 22V,30V)

2 - SLOT PCMCIA

SDRAM MEM. (K4S641632E-TC60)

FLASH MEM.(TE28F160C3TA90)

FRONT

(7-KEYs, LEDs,IR Reciever)

SERIAL INTERFACE (ST3232CD)

SCART

CONT.

(AK4702)

TV SCART

VCR SCART

4 - RCA (CVBS,L,R,SPDIF)

RF MODULATOR(RMUP74055WT)

LNBP & 22K CONT.

OVER CURRENT

PROTECTION

(BS2F7VZ0614)

Page 4: Quadro DR-8050 FTA SAT Receiver Sm

Features

• DVB Common Interface (Viaccess, , Irdeto, Nagra Vision, Conax, CrytoWorks, AlphaCrypt etc)

• Easy Graphic MENU Interface

• RS232C Port for Updating Control Software and Additional Service

• Supports DiSEqC1.0/DiSEqC 1.2, 13/18V, 0/22KHz Tone

• 2-SCART(TV,VCR) Connectors & 1-RCA(CVBS,L,R,SPDIF)

• Multi-language Function (Menu, Audio)

• Last Channel Memory

• OSD: Transparency & Blending, 256 Palette Colors

• 7 Front Panel Buttons & IR Remote Controller User Interface

• Editing Functions(TV or Radio Channel, Channel Name, PID, Transponder Name)

• EPG for On Screen Channel Information

• Channels Memory for Multi-satellite

• 3 Operation Modes(Digital TV, Digital Radio, Favorite)

• Receives QPSK Satellite Broadcasting RF Signal and Decodes the Digitally Encoded Signal

• Digital Tuner with Loop-through

• SCPC/MCPC Receivable from C/KU-band Satellite

• Wide Symbol Rate 2~45 Mbps & 950~2150 MHz input Frequency

• MPEG-2 Main Profile at Main Level

• Teletext Supported by VBI

• 4900 Channels Memory

• Max. 12 Characters of Channel Name Length

• PLL RF Modulator UHF 21~69 with PAL G/I/K (Optional)

• Digital Audio Output (S/PDIF)

• Dolby Digital Audio (Optional)

• Support Games (Tetris, Snake etc)

Page 5: Quadro DR-8050 FTA SAT Receiver Sm

TECHNICAL SPECIFICATIONS

Transmission Standards : DVB, MPEG2

1. Conditional Access Interface

PCMCIA 2 Slot.type I or type II

DVB Common Interface Standard

(Viaccess, Irdeto, Nagra Vision, Conax,

Crytoworks, AlpahCrypt …)

2. Tuner & Demodulator

LNB IF input 1 * F Type, IEC169-24, Female

LNB IF loop through output 1 * F Type, IEC169-24, Female

Input Frequency Range 950MHz to 2150MHz

RF input Signal Level -25 ~ -65 dBm

RF impedance 75 ohms

LNB Power 13.5 / 18.5Vdc +/- 5%,0.5Amax

Overload Protected

LNB tone switch 22KHz +/- 2KHz, 0.6Vpp +/- 0.2V

DiSEqC Version1.2,Tone burst A/B

Demodulation QPSK

Symbol Rate 2 ~ 45 Msps, SCPC/MCPC

3. MPEG

Transport Stream MPEG-2 TS Specification (ISO/IEC 13818)

Input Rate Max. 60Mbit/s

VIDEO MPEG-2 MP@ML

AUDIO MPEG-1/2 Audio layer 1,2

Aspect Ratio 4:3, 16:9

Video Resolution 720 * 576(PAL), 720 * 480(NTSC)

Audio mode Stereo, Dual channel, Joint stereo, Mono

Audio Sampling Frequency 32/44.1/48KHz

Page 6: Quadro DR-8050 FTA SAT Receiver Sm

4. A/V & Data In/Out

TV SCART RGB, CVBS, L, R out

VCR SCART CVBS, L, R out

RGB, CVBS, L, R in

RCA JACK CVBS (Yellow)

Audio L, R (White, Red)

Digital SPDIF out (Black)

Serial Port RS232C D-Sub Male Type

5. MEMORY

FLASH MEMORY 2 Mbytes

SDRAM 8 Mbytes

EEPROM 8 Kbytes

6. RF Modulator

TV Standard PAL G/I/K Selectable by Menu Setting

Audio Output Mono with Volume Control

Preset Channel CH 40(or TBD). Software changeable by Menu Screen

7. Power Supply

Input Voltage Range 90Vac ~ 240Vac(SMPS)

Input Frequency Range 50Hz ~ 60Hz

Power Consumption Max 30W

Standby Power Consumption <= 6.5W

Protection Separate Internal Fuse

The input shall the lighting protection

8. SCART Socket

PIN No. TV AUX

1 Audio out Right Audio out Right

2 - Audio in Right

3 Audio out Left Audio out Left

4 Audio ground Audio ground

Page 7: Quadro DR-8050 FTA SAT Receiver Sm

5 Blue ground Blue ground

6 - Audio in Left

7 Blue out Blue in

8 Function control out Function control in

9 Green ground Green ground

10 - -

11 Green out Green in

12 - -

13 Red ground Red ground

14 Fast blanking ground Fast blanking ground

15 Red out Red in

16 Fast blanking out Fast blanking in

17 CVBS ground CVBS ground

18 CVBS ground CVBS ground

19 CVBS out CVBS out

20 - CVBS in

21 Ground Ground

9. Serial (RS-232) Connector

PIN No. Signal Name

1 -

2 RxD (Receive Data)

3 TxD (Transmit Data)

4 -

5 Ground

6 -

7 -

8 -

9 -

Page 8: Quadro DR-8050 FTA SAT Receiver Sm

S P

E C

T

9-Pin Male Type 9-Pin Male Type

10. Physical Specification & Environmental Condition

Weight 2.0 KG

Size(W * H * D) 280mm x 55mm x245mm

Operating Temperature 0 °C ~ 40 °C

Storage Temperature -10 °C ~ 80 °C

Operating Humidity Range 10~85% RH, Non-condensing

Storage Humidity Range 5~90% RH, Non-condensing

11. REAR Panel (Back View)

AC IN

RF-MOD.

DIGITAL SCART TV/VCR

AUDIO VIDEO

R CVBS

IF IN ANT

L SPDIF

LOOP OUT RS-232

TV OUT

VCR IN/OUT

2pin

3pin

5pin

2pin

3pin

5pin

Page 9: Quadro DR-8050 FTA SAT Receiver Sm

4. Trouble Shooting 4-1. Appearance (Exterior) Test

Check the condition of install, joining of connectors, break or bend of PCB, cold-soldering or

Short of components and problem of part ,etc.

4-2. Power Test

5V Check the power at L(902,903)

3.3V Check the power at L(905,906,907)

23V Check the power at L901

12V Check the power at L904

4-3. System Test

Check whether STI5518 CPU or Flash Memory TE28F160 works normally.

Check Message Display by Hyper Terminal in PC.

* Configuration of Hyper Terminal

Baud rate : 115,200 bps

Data bit : 8 bits

Parity bit : none

Stop bit : 1

Control : none

4-3-1. Check STI5518 Clock

4-3-2. Test for Flash Memory

4-4. MPEG and Audio Video Test

Check the whole process from MPEG Decoder (STI5518) and Audio DAC &Audio/Video SWITCH (AK4702)

Also Check the (SCART, Phone Jack, RF-Modulator)

4-4-1. STI5518 (MPEG-2 Audio/Video Decoder)

4-4-2. SCART Controller AK4702

4-4-3. Audio DAC AK4702

4-5. Channel Test

4-5-1. When “NO SIGNAL” Message display.

4-5-1-1. U103 (KA317 Regulator) => Check the Voltage 21V ~ 24V at Pin 3.

Check the Voltage 13V(Vert) or 18V(Horz) at D104 of Anode.

4-5-1-2. I2C Control Signal

4-5-2. 22KHz Tone , TS-Data and Data Error control signal

4-6. Common Interface Test

Page 10: Quadro DR-8050 FTA SAT Receiver Sm

4-3-1. Check STI5518 Clock.

27Mhz =>

Check point : U301 Pin 120 or R310

or R311.

81Mhz =>

Check point : U301 Pin 118 or TP301

120 MHz =>

Check point : U402 Pin 38

Failure Causes and Solution.

If the 27MHz is unstable, Check the U304 and U402(SDRAM) and U301(STI5518) is damaged or not.

If you are firm belief of damage for the device, then replace the device.

If the clock 81MHz on TP301, 120MHz on Pin-38 of U402 is not generated , Please check the soldering state of U301.

Page 11: Quadro DR-8050 FTA SAT Receiver Sm

4-3-2. Test for Flash Memory

RESET =>

Check Point : U301 Pin 124

CE =>

Check Point : U401 Pin 26

Failure Causes and Solution

If the set do not operating correctly, the chip select pin and the reset pin of STI5518 must be checked. And if these signal

are not acting like above figure, then check the soldering state of U301, U401

Before checking these signal you must check the power for U301, U401 etc. Check 3.3V on L302 and check

2.5V on L301, L303, L304 respectively.

Page 12: Quadro DR-8050 FTA SAT Receiver Sm

4-4-1. STI5518(MPEG-2 Audio/Video Decoder)

SCLK=>

Check point : U501 Pin 40

SDATA =>

Check Point : U501 Pin 41

MCLK =>

Check Point : U501 Pin 39

LRCLK =>

Check Point : U301 Pin 42

SPDIF =>

Check Point : R315

Page 13: Quadro DR-8050 FTA SAT Receiver Sm

Failure Causes and Solution

If the Audio Main clock MCLK(2.048MHz ~12.8MHz) is acting unstably, check the soldering state of STI5518. And check

the oscillator U304 is generating 27 MHz clock. If STI5518 and oscillator are OK, then check the Audio DAC U501.

And all these are OK, STI5518 maybe damaged. Then you can try to replace the STI5518.

Page 14: Quadro DR-8050 FTA SAT Receiver Sm

4-4-2. SCART Controller AK4702

BLUE =>

Check Point : U501 Pin 7

GREEN =>

Check Point : U501 Pin 6

RED =>

Check Point : U501 Pin 5

C =>

Check Point : U501 Pin 5

Page 15: Quadro DR-8050 FTA SAT Receiver Sm

Y =>

Check Point : U501 Pin 3

CVBS =>

Check Point : U501 Pin 3

Failure Causes and Solution

If the video signal is not operating correctly, you should check R318, R317(18 Kohm).

And you may try to check the net concerning to B, G, R, Y, C, CVBS on BC501, BC502, BC503, BC504, BC505 and BC506.

When you had finished checking the above net or device and all these are OK, STI5518 maybe damaged.

Then you can try to replace the STI5518.

Page 16: Quadro DR-8050 FTA SAT Receiver Sm

4-4-3. Audio DAC AK4702

AOUTL =>

Check Point : U501 Pin 32

AOUTR =>

Check Pont : U501 Pin 31

Failure Causes and Solution

If there are no audio output, you should check the input signal LRCLK, SCLK, SDTA and MCLK of Audio DAC U501.

When you had finished checking the above net or device and all these are OK, Audio DAC maybe damaged.

Then you can try to replace the Audio DAC.

Page 17: Quadro DR-8050 FTA SAT Receiver Sm

4-5. Channel Test

4-5-1. When “NO SIGNAL” is displayed.

1. Check the RF cable is connected to LNB IN connector of rear panel. Then check U105(KA317 Regulator) pin 3

is powered between 21V to 24V. And check the voltage on L101 ~ L104 is proper level. When you had finished

checking the above net or device and all these are OK, Tuner maybe have problem. Replace the Tuner.

In case of Horz Polarity =>

Check Pont : R118

(In case at Low ) : LNBA=>

Check Point : D104, (18V)

In case of Vert Polarity =>

Check Point : R118

(In case at High) LNBA =>

Check Point : D104, (13V)

Failure Causes and Solution

If there’s no 13V or 18V on the output connector of Tuner U101, you should check High(3.3V)/low(0V) state of R118.

And this is Power check to the L102 of 3.3V and L103 of 1.8V.

Page 18: Quadro DR-8050 FTA SAT Receiver Sm

2. I2C Control Signal

SCL_NIM =>

Check Pont : R111

SDA_NIM =>

Check Point : R112

Failure Causes and Solution

If there’s no or different signal compare to above picture on I2C line, check the associated net. Try to remove serial resistor

Of R111, R112, R113, R114, if you could find what device has problem.

Page 19: Quadro DR-8050 FTA SAT Receiver Sm

4-5-2. 22KHz Tone , BCLK and ERROROUT control signal

22KHz =>

Check Point : R119

22KHz ON(L) / OFF(H) =>

Check Point : R120

CH_CLK =>

Check Pont : RA101 Pin 4

ERROROUT =>

Check Point : RA101 Pin 1

Failure Causes and Solution

If there’s no 22 KHz, check the Pin 12 of Tuner and associated net.

Page 20: Quadro DR-8050 FTA SAT Receiver Sm

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Boot From ROM

Boot From DCU

<Doc> PR1

STI5518

C

0 8Tuesday, June 29, 2004

Title

Size Document Number Rev

Date: Sheet of

SCL

SDA

DATA7DATA6

TSIN3

DATA5

DATA2

ADD

R11

DATA13

SD_A

DD

R10

DATA11

SD_A

DD

R9

DATA9

DATA4DATA3

SD_A

DD

R12

SD_A

DD

R7

SD_A

DD

R5

DATA12

DATA8

SD_A

DD

R11

SD_A

DD

R3

TSIN1

SD_A

DD

R13

TSIN6

TSIN4

DAT

A14

TSIN0

SD_A

DD

R0

DATA10

SD_A

DD

R2

SD_A

DD

R8

SD_A

DD

R6

SD_A

DD

R4

TSIN5

TSIN2

DATA0

SD_A

DD

R1

TSIN7

TSIN[7..0]

DAT

A15

DATA1

SD_D

ATA1

1SD

_DAT

A12

SD_D

ATA2

SD_D

ATA4

SD_D

ATA3

SD_D

ATA1

3

SD_D

ATA1

5

SD_D

ATA8

SD_D

ATA9

SD_D

ATA7

SD_D

ATA1

0

SD_D

ATA1

SD_D

ATA5

SD_D

ATA6

SD_D

ATA1

4

SD_D

ATA0

ADD

R2

ADD

R7

ADD

R5

ADD

R6

ADD

R1

ADD

R13

ADD

R9

ADD

R8

ADD

R4

ADD

R17

ADD

R21

ADD

R14

ADD

R15

ADD

R10

ADD

R16

ADD

R12

ADD

R3

ADD

R20

ADD

R19

ADD

R18

CTR_SYNC

D3_3V

D2_5V

D3_3V

D2_5V

D2_5V

D2_5V

D3_3V

D3_3VD2_5V

D3_3V D2_5V

5V

D3_3V

D3_3V

D3_3V

D3_3V

5V BC3110.1uF

TP302

L304FCM2012C-101

R3014.7K

C302NC(22pF)

R315

75

BC3130.1uF

U303C

74HC14

5 6

147

U303A74HC14

12

147

R31718K 1%

RA31233A1

234 5

678

BC307NC(0.1uF)

+CE30610uF/25V

RA31333A

1234 5

678

Q302KN3904S

1

23

R308NC(4.7K)

BC3020.1uF

U302A

MM74HC125M

2 3

14 1

7

+

CE30247uF/50V

R31818K 1%

Q301MMBT3906/SOT23

1

23

R320

NC(0)

L302FCM2012C-101

BC3120.1uF

R316

120

+CE304

NC(1uF/50V)

BC3030.1uF

TP304JP302/NC

12

U301STi5518

123456789

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PIO2_5PIO2_6PIO2_7VDD3_3VSSPIO3_0/PARA_D0PIO3_1/PARA_D1PIO3_2/PARA_D2PIO3_3/PARA_D3PIO3_4/PARA_D4PIO3_5/PARA_D5PIO3_6/PARA_D6PIO3_7/PARA_D7VDD2_5VSSB_DATAB_BCLKB_FLAGB_SYNCPIO5_0/NRSS_CLOCK/SSC1_DATAPIO5_1/NRSS_OUT/SSC1_CLOCKPIO5_2/NRSS_INVDD_RGBVSS_RGBB_OUTG_OUTR_OUTV_REF_RGBI_REF_RGBVDD_YCCVSS_YCCY_OUTC_OUTCVBS_OUTV_REF_YCCI_REF_YCCVDD2_5VSSPIO4_0/YC0PIO4_1/YC1PIO4_2/YC2PIO4_3/YC3PIO4_4/YC4PIO4_5/YC5PIO4_6/YC6PIO4_7/YC7VDD3_3VDD_PCMVSS_PCMVSSSCLKPCMOUT0

PCM

OU

T1PC

MO

UT2

PCM

CLK

LRC

LKSP

DIF

_OU

TSM

I_AD

DR

4SM

I_AD

DR

5SM

I_AD

DR

6SM

I_AD

DR

7SM

I_AD

DR

8SM

I_AD

DR

9VD

D2_

5VS

SSM

I_AD

DR

3SM

I_AD

DR

2SM

I_AD

DR

1SM

I_AD

DR

0SM

I_AD

DR

10SM

I_AD

DR

11SM

I_AD

DR

12SM

I_AD

DR

13SM

I_C

S0SM

I_C

S1SM

I_R

ASSM

I_C

ASSM

I_W

ESM

I_D

QM

LSM

I_D

QM

UVD

D3_

3SM

I_C

LKIN

VSS

SMI_

DAT

A0SM

I_D

ATA1

SMI_

DAT

A2SM

I_D

ATA3

SMI_

DAT

A4SM

I_D

ATA5

SMI_

DAT

A6SM

I_D

ATA7

SMI_

DAT

A8SM

I_D

ATA9

VDD

2_5

SMI_

CLK

OU

TVS

SSM

I_D

ATA1

0SM

I_D

ATA1

1SM

I_D

ATA1

2SM

I_D

ATA1

3SM

I_D

ATA1

4SM

I_D

ATA1

5PI

O5_

3PI

O5_

4

PIO5_5AUXCLKVDD3_3

VSSTRSTTMSTDOTDI

TCKVSYNC/PWM2

BOOT_FROM_ROM/PWM1HSYNC/PWM0

CPU_OECPU_RAM_CLK

VDD2_5PIX_CLK

VSSVDD_PLLVSS_PLL

RESETIRQ2IRQ1IRQ0

CPU_BE0/DQM0CPU_BE1/DQM1

CPU_RW/NOT_SDRAM_WECPU_WAIT

CPU_CE3CPU_CE2CPU_CE1CPU_CE0

VDD3_3VSS

CPU_RAS1CPU_CAS0CPU_CAS1

CPU_DATA0CPU_DATA1CPU_DATA2CPU_DATA3CPU_DATA4CPU_DATA5CPU_DATA6CPU_DATA7

VDD2_5VSS

CPU_DATA8CPU_DATA9

CPU_DATA10CPU_DATA11CPU_DATA12CPU_DATA13

DAT

A14

DAT

A15

VDD

3_3

VSS

CPU

_AD

DR

1C

PU_A

DD

R2

CPU

_AD

DR

3C

PU_A

DD

R4

CPU

_AD

DR

5C

PU_A

DD

R6

CPU

_AD

DR

7C

PU_A

DD

R8

CPU

_AD

DR

9C

PU_A

DD

R10

VDD

2_5

VSS

CPU

_AD

DR

11C

PU_A

DD

R12

CPU

_AD

DR

13C

PU_A

DD

R14

CPU

_AD

DR

15C

PU_A

DD

R16

CPU

_AD

DR

17C

PU_A

DD

R18

CPU

_AD

DR

19C

PU_A

DD

R20

CPU

_AD

DR

21VD

D3_

3VS

SPI

O0_

0/SC

0_D

ATA

PIO

0_1/

TTX_

IN_C

LOC

K/AT

API_

RD

PIO

0_2/

ATAP

I_W

RPI

O0_

3/SC

0_C

LOC

KPI

O0_

4/SC

0_R

STPI

O0_

5/SC

0_C

MD

_VC

CPI

O0_

6/SC

0_D

ATA_

DIR

PIO

0_7/

SC0_

DET

ECT

PIO

1_0/

SSC

0_D

ATA

PIO

1_1/

SSC

0_C

LOC

KPI

O1_

2/PA

RA_

DVA

LID

PIO

1_3/

TXD

2

PIO

1_4/

RXD

2PI

O1_

5/PA

RA_

SYN

C/T

XD1

VDD

2_5

VSS

TRIG

GER

_IN

TRIG

GER

_OU

TPI

O2_

0/SC

1_D

ATA

PIO

2_1/

PAR

A_R

EQ/R

XD1

PIO

2_2/

PAR

A_ST

RPI

O2_

3PI

O2_

4

R313

430

BC3140.1uF

R305 33

R309 10K

L303FCM2012C-101

R314

75

TP303

L301FCM2012C-101

R3044.7K

BC3040.1uF

BC310

0.1uF

R30710K

R303220

R306 NC

BC3080.1uF

+CE301100uF/10V

+ CE30310uF/25V

JP306

MPA

12345

U304SCO

8

4

5

1

VCC

GND

OUT

IN

BC3050.1uF

R321

4.7K

BC3090.1uF

TP301

SW301/NC

D301UF5404

1 2

+CE305

10uF/25V

BC3060.1uF

C301NC(0.01uF)

R312 33

R3024.7K

R3194.7K

R31133

R31033

JP301NC(HEADER 3)

123

BC3010.1uF

DATA[15..0]

nJPI_RST

SD_CLKOUT

SD_DATA[15..0]

SD_ADDR[13..0]

SCLKSDATA

LRCLK

SDA

nRST

TDI

CVBS

Y

nOE

R

B

TXD

TR_IN

ADDR[21..1]

nCE_ROM

nWE

SCL

TSIN[7..0]

WAIT

TS_SER_DATA

SDA_NIM

nMU

TE RXD

TMS

nWP

SD_nCAS

nBE1

C

SD_nRAS

SD_DQMU

TS_CLK

TCK

OLF

TDO

SD_DQMLSD_nWE

SD_nCS1

INT0

nTRST

TS_VALID

G

SCL_NIM

DINCLKSTB

CLK_HCLK_L

KEY2KEY3

KEY1

KEY4

TR_O

UT

LOO

P_C

TRL

14/1

8V

CH

_nR

ST

PCM

CIA

_BPC

MC

IA_A

22KHz_EN

PRE_IR_IN

27MHz

nCE_CI

CI_

RST

SC0_

DET

ECT

SC0_

CM

DVC

CSC

0_R

STSC

0_C

LK

SC0_

DAT

A

TS_SYNC

SPDIF_OUT

LNBP_EN

MCLK

Page 21: Quadro DR-8050 FTA SAT Receiver Sm

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3 3

2 2

1 1

Flash

SDRAM

RS232C Interface

ST-20 Connect Interface

EEPROM

Front Interface

<Doc> PR1

MEMORY & INTERFACE CIRCUITS

C

0 8Tuesday, June 29, 2004

Title

Size Document Number Rev

Date: Sheet of

SD_ADDR3

SD_ADDR1SD_ADDR2

SD_ADDR0SD_ADDR10SD_ADDR13SD_ADDR12

SD_ADDR6

SD_ADDR4

SD_ADDR9

SD_ADDR5

SD_ADDR7SD_ADDR8

SD_DATA15

SD_DATA14SD_DATA13

SD_DATA12SD_DATA11

SD_DATA10SD_DATA9

SD_DATA8

SD_DATA0

SD_DATA1SD_DATA2

SD_DATA3SD_DATA4

SD_DATA5SD_DATA6

SD_DATA7

SD_ADDR11

DATA0

ADDR9DATA5

ADDR18

DATA10

ADDR2

ADDR10

ADDR15

ADDR7

DATA11

DATA14

ADDR17

DATA13

ADDR5

ADDR13

DATA2

DATA8

ADDR3

ADDR11

ADDR20

ADDR19

DATA4

DATA6

ADDR16

DATA3

ADDR8

ADDR12

DATA1

DATA15

ADDR6

ADDR14

ADDR20

DATA9

DATA7

ADDR4

ADDR1

DATA12

D3_3V

D3_3V

D3_3V

D3_3V

D3_3V

D3_3V

5V

D3_3V

D3_3V

D3_3V

A7V

5V

BC3510.1uF

R405 0

L452FCM2012C-101

+CE40210uF/25V

R36210k/NC

U451

SP232ECN

13

45

111012

9

147138

156

216C1+

C1-

C2+C2-

TIN1TIN2RO1RO2

TO1TO2RI1RI2

GNDVO-

VO+VCC

U402

K4S641632D-TC/L80

12

4

65

7

3

8

10

1211

13

9

151617181920

222324252627 28

293031323334

3637383940

4342

44

52

45

47

4948

50

46

51

5354

14

2135

41

VDDDQ0

DQ1

VSSQDQ2

DQ3

VDDQ

DQ4

DQ5

VSSQDQ6

DQ7

VDDQ

LDQMWECASRASCSBA0

A10/APA0A1A2A3VDD VSS

A4A5A6A7A8A9

NCCKECLK

UDQMNC/RFU

VDDQDQ8

DQ9

VSSQ

DQ10

DQ11

VDDQDQ12

DQ13

VSSQ

DQ14

DQ15VSS

VDD

BA1A11

VSS

R351 33

R406 NC(0)

R401 0

R36510k/NC

L451FCM2012C-101

R451 NC(2012)

R35233

JP305

HEADER 12

123456789101112

BC4060.1uF

CON451

DB9

12345

6789

12345

6789

U401

TE28F160C3TA90

123456789

101112131415161718192021222324 25

26272829

31

33

35

38

40

42

44

30

32

34

36

39

41

43

45464748

37

A15A14A13A12A11A10A9A8NC/A19NCWERST/NCNC/VPPNC/WPRB/NC/A19A18A17A7A6A5A4A3A2A1 A0

CEVSS

OEDQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15VSS

BYTE/NC/VCCQA16

VCC

BC4010.1uF

BC453 0.1uF

BC4020.1uF

CON361/NC

CON20A

135791113151719

2468

101214161820

R408NC

BC4070.1uF

C304NC(0.1uF)

RA3614.7KA

12345 6 7 8

R4044.7K

R407 NC

BC4050.1uF

BC454 0.1uF

BC4040.1uF

R364 75/NC

R4094.7K

R3544.7K

R3564.7K

R4024.7K

C455

NC(1nF)

U502

78L05/NC

2

13

GN

D

OUTIN

+CE307

NC(100uF/25V)

BC451 0.1uF

R358

0

BC4030.1uF

R3574.7K/NC

C303

1000pF

C456

NC(1nF)

U351

AT24C64N-SC27

1234 5

678PRE

PB0PB1VSS SDA

SCLMODE

VCC

R4034.7K

R3554.7K

BC452 0.1uF

R452 0(2012)

R36110k/NC

R363 75/NC

R3534.7K

SD_DATA[15..0]

SDA

TDOnJPI_RST

TCKTMS

nTRST

TDI

DATA[15..0]

TR_INTR_OUT

SCL

KEY1

DINCLKSTB

CLK_HCLK_L

KEY2KEY3

PRE_IR_INKEY4

SD_ADDR[13..0]SD_DQMLSD_nWESD_nCASSD_nRASSD_nCS0SD_CLKOUTSD_DQMU

nWP

nWEnRST

ADDR[21..1]

nOE

nCE_ROM

TXD

RXD

Page 22: Quadro DR-8050 FTA SAT Receiver Sm

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

VCR SCART

Video

Audio R

Audio L

<Doc> <RevCode>

<Title>

C

0 8Tuesday, June 29, 2004

Title

Size Document Number Rev

Date: Sheet of

ENCRC

ENCCENCY

ENCV

ENCB

ENCG

RF_AUDIO

RF_VIDEO

ENCB

ENCG

ENCRC

ENCY

ENCC

ENCV

RF_VIDEORF_AUDIO

A12VA12V

A12V

5V

D3_3V

5V

+

CE51210uF/25V

C5291000pF

R546300

C525

0.47uF

L508FCM2012C-101

R568 0

Q502KN3904S

1

23

L503

FCI2012-150K

+

CE50710uF/25V

R52575 1/10W

C512

18pF

R507300 1%

+

CE50910uF/25V

R554300

R559NC

C517

56pF

+

CE51010uF/25V

BC515

0.1uF

C502

56pF

R556

300

BC502

0.1uF

R513NC(1K)

C522

1000pF

R515 33

BC5160.1uF

C518

18pF

C511

56pF

R555300

R562

75 1/10W

L501

FCI2012-150K

C515

18pF

C516NC

R501300 1%

R548NC(150)

R54575 1/10W

R509300 1%

+CE516

47uF/10V

R529 NC(150)

+CE50310uF/25V

R541 300

R55075 1/10W

BC514

0.1uF

+CE50110uF/25V

+

CE50610uF/25V

BC513

0.1uF

R543300

BC503

0.1uF

C501NC

R5341K

+CE515470uF/16V

+CE504

10uF/25V

L509FCM2012C-101

R53510K

C508

56pF

C527NC(100pF)

C5191000pF

L504

FCI2012-150K

R56175 1/10W

R530 NC(150)

C509

18pF

R563 100

R531 150

C504NC

R537 75 1/10W

JP501B

ILSSAN:DUAL SCART 2203-42T

2322

25

27

24

29

26

31

33

28

35

37

30

39

32

41

34

36

38

40

42

AINRAOUTR

RTN5

AINL

AOUTL

MODE

RTN1

RESERVED

RESERVED

BLUE

RTN6

BLANK

RTN2

RTN7

GREEN

VIN

RTN3

RED

RTN4

VOUT

SHIELD

BC506

0.1uF

R53610K

R539 300

L510 FCM2012C-101

R566 1K

R558300

R51275/NC

R540 10K

C514

56pF

R505300 1%

R55210K

R51875 1/10W

R565 820

R511300 1%

C513NC

BC510

0.1uF

C526

0.47uF

BC504

0.1uF

JP501A

ILSSAN:DUAL SCART 2203-42T

21

4

6

3

8

5

10

12

7

14

16

9

18

11

20

13

15

17

19

21

AINRAOUTR

RTN5

AINL

AOUTL

MODE

RTN1

RESERVED

RESERVED

BLUE

RTN6

BLANK

RTN2

RTN7

GREEN

VIN

RTN3

RED

RTN4

VOUT

SHIELD

R52775 1/10W

BC508

0.1uF

BC512

0.1uF

C524

1000pF

+

CE51410uF/25V

R50475/NC

R519470

R553300

C505

56pF

R521 300

JP503

1

234

56

MB+

VIDEO INAUDIO IN+5V

SDASCL

L502

FCI2012-150K

BC501

0.1uF

R51075/NC

+

CE51310uF/25V

R50275/NC

L505

FCI2012-150K

R5674.7K

R544300

R52310K

+CE50210uF/25V

L507FCM2012C-101

R55710K

R52210K

R5336.8K

L506

FCI2012-150K

C5201000pF

C521

1000pF

R520300

U501AK4702VQ

17 48

232221

92010191118

1412

1316

15

39404241

27

25

26

24

45

38 8 4 34

35

36

2 37

765

463

471

3231

3029

33

28

4344

VCRFB TVFB

TVSBVCRSB

INT

ENCBVCRBENCGVCRGENCRCVCRRC

ENCYENCC

ENCVVCRVIN

TVVIN

MCLKBICKLRCKSDTI

TVINL

VCRINL

TVINR

VCRINR

PDN

VD

VVD

1

VVD

2

VP

DVCOM

PVCOM

VVSS

VSS

TVBTVG

TVRC

RFVTVVOUT

VCRVOUTVCRC

TVOUTLTVOUTR

VCROUTLVCROUTR

MONOOUT

MONOIN

SCLSDA

C507NC

R52675 1/10W

C503

18pF

PHONO RCA JACK-4PACKJP502

2

3

5 1

6

BC511

0.1uF

+

CE50510uF/25V

C528NC(100pF)

R54775 1/10W

BC509

0.1uF

R560NC

R54975 1/10W

R528 NC(150)

R52475 1/10W

C510NC

BC517

0.1uF

C523

1000pF

C506

18pF

R542 300

R50875/NC

BC505

0.1uF

R53222K

BC518

0.1uF

R503300 1%

+

CE51110uF/25V

R50675/NC

R564 100

+

CE50810uF/25V

R538 300

R55110K

R514 33

SDA

SCLSDA

B

G

R

Y

C

CVBS

nMUTE

SCL

MCLKSCLKLRCLKSDATA

SPDIF_OUT

Page 23: Quadro DR-8050 FTA SAT Receiver Sm

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

H : ONL : OFF

CI MODE

FTA MODE

<Doc> PR1

QPSK&Power

C

1 11Tuesday, June 29, 2004

Title

Size Document Number Rev

Date: Sheet of

LNBA

PTO1PTO2

PTO0

PTO4PTO3

PTO5PTO6PTO7

TSIN7TSIN6

TSIN4TSIN5

TSIN0TSIN1TSIN2TSIN3

LNBA

LOOP_CTRL

D3_3V

5V

D3_3V

A22V

5V

D3_3V

A12V

A22V

5V

D3_3V

5V 5V

A7V

Q108KN3904S

1

23

R10410K

RA10633A

1234 5

678

L104

NC/ECFB201209P601

C106

1000pF

L101FCM2012C-101

RA10133A

1234 5

678

BC1030.1uF

R124240 1/10W

R111 100

RA10333A

1234 5

678

R12510K

C105NC/33pF

RA10233A

1234 5

678

+CE101220uF/10V

RA10533A

1234 5

678

L902FCM2012C-101

BC1020.1uF

R10610K

+CE901

47uF/50V

+CE102

220uF/10V

R118

10K

+CE904

220uF/10V

C1011000pF

+CE104

1uF/50V

Q101

TIP42C

1

3 2

+CE902

220uF/10V

R1082.2K

R112 100

R113

4.7K

Q106KN3904S

1

23

L907

FCM2012C-101

+CE103

220uF/10V

Q102KN3904S

1

23

L901ECFB201209P601

R119

10K

R10110K

R1284.7K 1/10W

R114

4.7K

Q103KN3904S

1

23

R110 NC

C1021000pF

C107

22pF

U103LM317

1

23

ADJ

OUTIN

BC9020.1uF

BC9030.1uF

R12710K

R10510K

D103Zener3.6V

C

A

R109

220

R13310K 1/8W

R115

1K

JP902

HEADER 11

123456789

1011

R13210K

R121120 1/10W

L103FCM2012C-101

RB101(10K 1/4W)

R1232.4K 1/10W 1%

L903

FCM2012C-101

Q109KN3904S

1

23

D104

1N5819

Q104KN3904S

1

23

R120

10K

U101BS2F7VZ 0614

B1B

B1A

B4 B2 NC

NC

NC

SDA

SCL

NC

B3 F22

VDD

D0

D1

D2

D3

D4

D5

D6

D7

BCLK

D/P

STR

OU

TER

RO

RR

ESET

R116

15K

U102

IP1521

1 2

5

8

3 6 7

4

VIN VOUT1

VOUT2PGN

D

NC

1

NC

2

NC

3

ON/OFF

R1034.7K 1/10W

RB1020.6 1/2W

R131

10K

R107

10K

BC1010.1uF

Q111

TIP42C

1

3 2

L102FCM2012C-101

BC9040.1uF

Q107KN3904S

1

23

C103 NC(0.01uF)

R122910 1/10W

R117

47K

Q110KN3904S

1

23

L905FCM2012C-101

R130

0

D101

1N5819

CA

RA10433A

1234 5

678

R126NC(10K)

L904FCM2012C-101

D102 1N4004AC

A

L906FCM2012C-101

R1294.7K 1/10W

R102

4.7K 1/10W

+CE903

100uF/25V

BC9010.1uF

Q105 KTA1273

C104NC/33pF

TS_SYNC

PTO[7..0]

CH_SYNCCH_VALIDCH_CLK

CH_nRST

TS_SER_DATA

TS_VALIDTS_CLKTSIN[7..0]

SCL_NIMSDA_NIM

14/18V

22KHz_EN

LNBP_EN

OLF

Page 24: Quadro DR-8050 FTA SAT Receiver Sm

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A(TEMIC)

CH UP

CH DOWN

VOL UP

VOL DOWN

POWER

MENU

EXIT

<Doc> PR1

DVB Front

B

1 1Thursday, February 12, 2004

Title

Size Document Number Rev

Date: Sheet of

5V

5V

5V

R2

330

S6

KPT1105

S2

KPT1105

LED4

C-394G

12345678 9

10111213141516COM1

COM2D-DP1/2+E-COM3DP-COM4 DP3-

DP3+F-

DP1/2-C-A-G-B-

S4

KPT1105

S1

KPT1105

R3

330

R451K

R6150

S3

KPT1105

LED2

Green

R1

330

+E2

47uF/16VS5

KPT1105

LED1

Red

R5

NC(33)U1

PT6955(SOP)

123456789

101112 13

1415161718192021222324OSC

DINCLKSTBVDDSG1SG2SG3SG4SG5SG6SG7 SG8

SG9SG10/GR7SG11/GR6SG12/GR5

VDDGNDGR4GR3GR2GR1GND

S7

KPT1105

R11

33

+ E1

10uF/50V

LED3

Yellow

CON1

CABLE 12PIN

123456789

101112

BC10.1uF

U2

TSOP1238

123

GNDVSOUT