Pulse-Width Modulated DC–DC Power...

2Buck PWM DC–DC Converter

2.1 Introduction

This chapter studies the PWM buck switching-mode converter, often referred to as a “chopper” [1–30]. Analysis isgiven for both continuous conduction mode (CCM) and discontinuous conduction mode (DCM). Current and voltagewaveforms for all the components of the converter are derived. The dc voltage function is derived for both the modes.Voltage and current stresses of the components are found. The boundary between CCM and DCM is determined. Anexpression for the output voltage ripple is derived. The power losses in all the components and the transistor gate-drive power are estimated. The overall efficiency of the converter is determined. Design examples are also given.

2.2 DC Analysis of PWM Buck Converter for CCM

2.2.1 Circuit Description

In general, a basic PWM converter, such as buck, boost, and buck–boost converter, contains a single-pole, double-throw switch, which controls the energy flow from the source to the load.

A circuit of the PWM buck dc–dc converter is depicted in Figure 2.1(a). It consists of four components: a powerMOSFET used as a controllable switch S, a rectifying diode D1, an inductor L, a filter capacitor C. Resistor RLrepresents a dc load. Power MOSFETs are the most commonly used controllable switches in dc–dc convertersbecause of their high speeds. In 1979, International Rectifier patented the first commercially viable power MOSFET,the HEXFET. Other power switches such as bipolar junction transistors (BJTs), isolated gate bipolar transistors(IGBTs), or MOS-controlled thyristors (MCTs) may also be used. The diode D1 is called a freewheeling diode, aflywheel diode, or a catch diode.

The transistor and the diode form a single-pole, double-throw switch, which controls the energy flow from thesource to the load. The task for the capacitor and the inductor is energy storage and transfer. The switching network,composed of the transistor and the diode, “chops” the dc input voltage VI , and therefore the converter is often calleda “chopper,” which produces a reduced average voltage. The switch S is controlled by a pulse-width modulator andis turned on and off at the switching frequency fs = 1∕T . The duty cycle D is defined as

D =ton

T=

ton

ton + toff= fston (2.1)

Pulse-Width Modulated DC–DC Power Converters, Second Edition. Marian K. Kazimierczuk.© 2016 John Wiley & Sons, Ltd. Published 2016 by John Wiley & Sons, Ltd.Companion Website: www.wiley.com/go/kazimierczuk/modulatedpower2

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Pulse-Width Modulated DC-DC Power Converters, 2nd Ed., Marian K. Kazimierczuk, Wiley, 2015.

Buck PWM DC–DC Converter 23

(a)

L

iLiS

iL

+VORLCiDVI

L

vL+vS+

(c)

+VORLC

vGS+VI

+VORLC

+vD

vL+

VI

L

(b)

D1

S

Figure 2.1 PWM buck converter and its ideal equivalent circuits for CCM. (a) Circuit. (b) Equivalent circuit when theswitch is ON and the diode is OFF. (c) Equivalent circuit when the switch is OFF and the diode is ON.

where ton is the time interval when the switch S is closed and toff is the time interval when the switch S is open.Since the duty cycle D of the drive voltage vGS is varied, so does the duty ratio of other waveforms. This permits theregulation of the dc output voltage against changes in the dc input voltage VI and the load resistance RL (or the load

current IO). The circuit L-C-RL acts like a second-order low-pass filter whose corner frequency is fo = 1∕(2𝜋√

LC).The output voltage VO of the buck converter is always lower than the input voltage VI . Therefore, it is a step-downconverter. The buck converter “bucks” the voltage to a lower level. Because the gate of the MOSFET is notreferenced to ground, it is difficult to drive the transistor. The converter requires a floating gate drive. With theinput current of the converter being discontinuous, a smoothing LC filter may be required at the input.

The buck converter can operate in a CCM or in a DCM, depending on the waveform of the inductor current. InCCM, the inductor current flows for the entire cycle, whereas in DCM, the inductor current flows only for a part ofthe cycle. In DCM, it falls to zero, remains at zero for some time interval, and then starts to increase. Operation atthe boundary between CCM and DCM is called the critical mode (CRM).

Let us consider the buck converter operation in the CCM. Figures 2.1(b) and (c) shows the equivalent circuitsof the buck converter for CCM when the switch S is on and the diode D1 is off, and when the switch is offand the diode is on, respectively. The principle of the converter operation is explained by the idealized currentand voltage waveforms depicted in Figure 2.2. At time t = 0, the switch is turned on by the driver. Consequently,the voltage across the diode is vD = −VI , causing the diode to be reverse biased. The voltage across the inductorL is vL = VI − VO and therefore the inductor current increases linearly with a slope of (VI − VO)∕L. For CCM,iL(0) > 0. The inductor current iL flows through the switch, resulting in iS = iL when the switch is on. During thistime interval, the energy is transferred from the dc input voltage source VI to the inductor, capacitor, and the load.At time t = DT , the switch is turned off by the driver.

24 Pulse-Width Modulated DC–DC Power Converters

VO

VI

t

vL

0

t

t

iS

0

iLVO

0

Δ iL

t

t

iD

VOVI

IDM

vD

VI

ID

A+

A

VI

L

VO

L

DT t

IO

IOISM

II

0

0

VSM VI

vS

IO

0

DT

T

T

T

T

T

T

DT

DT

DT

DT

vGS

0DT tT

Figure 2.2 Idealized current and voltage waveforms in the PWM buck converter for CCM.


The inductor has a nonzero current when the switch is turned off. Because the inductor current waveform isa continuous function of time, the inductor current continues to flow in the same direction after the switch turnsoff. Therefore, the inductor L acts as a current source, which forces the diode to turn on. The voltage across theswitch is VI and the voltage across the inductor is −VO. Hence, the inductor current decreases linearly with a slopeof −VO∕L. During this time interval, the input source VI is disconnected from the circuit and does not deliverenergy to the load and the LC circuit. The inductor L and capacitor C form an energy reservoir that maintains theload voltage and current when the switch is off. At time t = T , the switch is turned on again, the inductor currentincreases and hence energy increases. PWM converters are operated at hard switching because the switch voltagewaveform is rectangular and the transistor is turned on at a high voltage.

The power switch S and the diode D1 convert the dc input voltage VI into a square wave at the input of theL-C-RL circuit. In other words, the dc input voltage VI is chopped by the transistor–diode switching network. TheL-C-RL circuit acts as a second-order low-pass filter and converts the square wave into a low-ripple dc outputvoltage. Since the average voltage across the inductor L is zero for steady state, the average output voltage VO isequal to the average voltage of the square wave. The width of the square wave is equal to the on-time of the switchS and can be controlled by varying the duty cycle D of the MOSFET gate-drive voltage. Thus, the square wave is apulse-width modulated (PWM) voltage waveform. The average value of the PWM voltage waveform is VO = DVI ,which depends on the duty cycle D and is almost independent of the load for CCM operation. Theoretically, theduty cycle D may be varied from 0% to 100%. This means that the output VO ranges from 0 to VI . Thus, the buckcircuit is a step-down converter. In practice, the dc input voltage VI varies over a specified range while the outputvoltage VO should be held at a fixed value. If the dc voltage VI is increased, the duty cycle D is reduced so that theproduct DVI being the average value of the PWM voltage remains constant. On the other hand, if the input voltageVI is reduced, the duty cycle D is increased so that the average value of the PWM signal is constant. Therefore, theamount of energy delivered from the input voltage source VI to the load can be controlled by varying the switchon-duty cycle D. If the output voltage VO and the load resistance RL (or the load current IO) are constant, the outputpower is also constant. When the input voltage VI increases, the switch on-time is reduced to transfer the sameamount of energy. The practical range of D is usually from 5% to 95% due to resolution. The duty cycle D iscontrolled by a control circuit.

The inductor current contains an ac component which is independent of the dc load current in CCM and a dccomponent which is equal to the dc load current IO. As the dc output current IO flows through the inductor L, onlyone-half of the B–H curve of the inductor ferrite core is exploited. Therefore, the inductor L should be designedsuch that the core will not saturate. To avoid core saturation, a core with an air gap and sufficiently large volumemay be required.

2.2.2 Assumptions

The analysis of the buck PWM converter of Figure 2.1(a) begins with the following assumptions:

(1) The power MOSFET and the diode are ideal switches.(2) The transistor output capacitance, the diode capacitance, and the lead inductances are zero and thereby

switching losses are neglected.(3) Passive components are linear, time invariant, and frequency independent.(4) The output impedance of the input voltage source VI is zero for both dc and ac components.(5) The converter operates in steady state.(6) The switching period T = 1∕fs is much shorter than the time constants of reactive components.(7) The dc output voltage VO is constant, but the dc input voltage VI and the load resistance RL are variable.

2.2.3 Time Interval: 0 < t ≤ DT

During the time interval 0 < t ≤ DT , the switch S is on and the diode D1 is off. An ideal equivalent circuit for thistime interval is shown in Figure 2.1(b). When the switch is on, the voltage across the diode vD is approximately


equal to −VI , causing the diode to be reverse biased. The voltage across the switch vS and the diode current arezero. The voltage across the inductor L is given by

vL = VI − VO = LdiLdt. (2.2)

Hence, the current through the inductor L and the switch S is

iS = iL = 1L ∫

t

0vLdt + iL(0) =

VI − VO

L ∫

t

0dt + iL(0) =

VI − VO

Lt + iL(0) (2.3)

where iL(0) is the initial current in the inductor L at time t = 0. The peak inductor current becomes

iL(DT) =(VI − VO)DT

L+ iL(0) (2.4)

and the peak-to-peak ripple current of the inductor L is

ΔiL = iL(DT) − iL(0) =(VI − VO)DT

L=

(VI − VO)D

fsL=

VID(1 − D)

fsL. (2.5)

The diode voltage is

vD = −VI . (2.6)

Thus, the peak value of the diode reverse voltage is

VDM = VI . (2.7)

The average value of the inductor current is equal to the dc output current IO. Hence, the peak value of the switchcurrent is

ISM = IO +ΔiL2. (2.8)

The instantaneous energy stored in the magnetic field in the inductor is

wL(t) = 12

Li2L = 12

L

[VI − VO

Lt + iL(0)

]2

. (2.9)

The increase in the magnetic energy stored in the inductor L during the time interval 0 to DT is given by

ΔwL(in) =12

L[i2L(DT) − i2L(0)

]. (2.10)

The time interval 0 to DT is terminated when the switch is turned off by the gate driver.

2.2.4 Time Interval: DT < t ≤ T

During the time interval DT < t ≤ T , the switch S is off and the diode D1 is on. Figure 2.1(c) shows an idealequivalent circuit for this time interval. Since iL(DT) is nonzero at that instant, the switch turns off and the fact thatthe inductor current iL is a continuous function of time, the inductor acts as a current source and turns the diodeon. The switch current iS and the diode voltage vD are zero and the voltage across the inductor L is

vL = −VO = LdiLdt. (2.11)

The current through the inductor L and the diode can be found as

iD = iL = 1L ∫

t

DTvLdt + iL(DT) = 1

L ∫

t

DT(−VO)dt + iL(DT) = −

VO

L ∫

t

DTdt + iL(DT) = −

VO

L(t − DT) + iL(DT)

(2.12)


where iL(DT) is the initial condition of the inductor L at t = DT . The peak-to-peak ripple current of the inductorL is

ΔiL = iL(DT) − iL(T) =VOT(1 − D)

L=

VO(1 − D)

fsL. (2.13)

Note that the peak-to-peak value of the inductor current ripple ΔiL is independent of the load current IO in CCMand depends only on the dc input voltage VI and thereby on the duty cycle D. For a fixed output voltage VO, themaximum value of the peak-to-peak inductor ripple current occurs at the maximum input voltage VImax, whichcorresponds to the minimum duty cycle Dmin. It is given by

ΔiLmax =VO(1 − Dmin)

fsL. (2.14)

The switch voltage vS and the peak switch voltage VSM are given by

vS = VSM = VI . (2.15)

The diode and switch peak currents are given by

IDM = ISM = IO +ΔiL2. (2.16)

This time interval ends at t = T when the switch is turned on by the driver.The decrease in the magnetic energy stored in the inductor L during time interval DT < t ≤ T is given by

ΔWL(out) =12

L[i2L(DT) − i2L(T)

]. (2.17)

For steady-state operation, the increase in the magnetic energy ΔWL(in) is equal to the decrease in the magneticenergy ΔWL(out).

The transient and steady-state waveforms in converters with commercial components can be obtained fromcomputer simulations using SPICE model.

2.2.5 Device Stresses for CCM

The maximum voltage and current stresses of the switch and the diode in CCM for steady-state operation are

VSMmax = VDMmax = VImax (2.18)

and

ISMmax = IDMmax = IOmax +ΔiLmax

2= IOmax +

(VImax − VO)Dmin

2fsL= IOmax +

VO(1 − Dmin)

2fsL. (2.19)

2.2.6 DC Voltage Transfer Function for CCM

The voltage and current across a linear inductor are related by Faraday’s law in its differential form

vL = LdiLdt. (2.20)

For steady-state operation, the following boundary condition is satisfied

iL(0) = iL(T). (2.21)

Rearranging (2.20),

1L

vLdt = diL (2.22)


and integrating both sides yields

1L ∫

T

0vLdt =

∫

T

0diL = iL(T) − iL(0) = 0. (2.23)

The integral form of Faraday’s law for an inductor under steady-state conditions is

∫

T

0vLdt = 0. (2.24)

The average value of the voltage across an inductor for steady state is zero. Thus,

VL(AV) =1T ∫

T

0vLdt = 0. (2.25)

This equation is also called a volt-second balance for an inductor, which means that “volt-second” stored is equalto “volt-second” released.

The inductor average voltage for PWM converters operating in CCM is

VL(AV) =∫

DT

0vLdt +

∫

T

DTvLdt = 0 (2.26)

from which

∫

DT

0vLdt = −

∫

T

DTvLdt. (2.27)

This means that the area encircled by the positive part of the inductor voltage waveform A+ is equal to the areaencircled by the negative part of the inductor voltage waveform A−, that is,

VL(AV) =1T

[∫

DT

0vLdt +

∫

T

DTvLdt

]= 0 (2.28)

where

A+ =∫

DT

0vLdt (2.29)

and

A− = −∫

T

DTvLdt. (2.30)

Referring to Figure 2.2,

(VI − VO)DT = VO(1 − D)T (2.31)

which simplifies to the form

VO = DVI . (2.32)

For a lossless converter, VIII = VOIO. Hence, from (2.32), the dc voltage transfer function (or the voltage conversionratio) of the lossless buck converter is given by

MV DC ≡VO

VI=

II

IO= D. (2.33)

The range of MV DC is

0 ≤ MV DC ≤ 1. (2.34)


Note that the output voltage VO is independent of the load resistance RL. It depends only on the dc input voltage VIand the duty cycle D. The sensitivity of the output voltage with respect to the duty cycle is

S ≡dVO

dD= VI . (2.35)

In most practical situations, VO = DVI is constant which means that if VI is increased, D should be decreased by acontrol circuit to keep VO constant, and vice versa.

The dc current transfer function is given by

MIDC ≡IO

II= 1

D(2.36)

and its value decreases from ∞ to 1 as D is increased from 0 to 1.From (2.8), (2.15), and (2.33), the switch and the diode utilization in the buck converter is characterized by the

output-power capability

cp ≡PO

VSMISM=

VOIO

VSMISM≈

VO

VSM=

VO

VI= D. (2.37)

As D is increased from 0 to 1, so does cp.

2.2.7 Boundary Between CCM and DCM

Figure 2.3 depicts the inductor current waveform at the boundary between the CCM and the DCM, where iL(0) = 0.This waveform can be described by

iL =VI − VO

Lt, for 0 < t ≤ DT (2.38)

resulting in the peak inductor current

ΔiL = iL(DT) =(VI − VO)DT

L=

(VI − VO)D

fsL=

VO(1 − D)

fsL(2.39)

where VI = VO∕MV DC = VO∕D for a lossless buck converter. Hence, one obtains a dc load current at the boundary

IOB =ΔiL2

=(VI − VO)D

2fsL=

VO(1 − D)

2fsL(2.40)

and the load resistance at the boundary

RLB =VO

IOB=

2fsL

1 − D. (2.41)

Figures 2.4 and 2.5 show the normalized load current IOB∕(VO∕2fsL) = 1 − D and the load resistance RLB∕(2fsL) =1∕(1 − D) at the boundary between CCM and DCM as functions of the duty cycle D, respectively. The plots canbe obtained using MATLAB®, described in Appendix B.

iL

Δ iLmax

IOB

0 DminT T t

VO

L

VImax

L

DmaxT

VO VImin

LVO

Figure 2.3 Waveforms of the inductor current at the boundary between CCM and DCM at VImin and VImax.


0 0.2 0.4 0.6 0.8 10

0.2

0.4

0.6

0.8

1

D

CCM

DCM

I OB

/(V

O/2

f sL)

Figure 2.4 Normalized load current IOB∕(VO∕2fsL) at the boundary between CCM and DCM as a function of the dutycycle D for buck converter.

0 0.2 0.4 0.6 0.8 10

2

4

6

8

10

D

RLB

/(2

f sL)

CCM

DCM

Figure 2.5 Normalized load resistance RLB∕(2fsL) at the boundary between CCM and DCM as a function of the dutycycle D for buck converter.


For the worst case,

IOmin = IOBmax =ΔiLmax

2=

VImax − VO

2fsLmin=

VO(1 − Dmin)

2fsLmin. (2.42)

Hence, the minimum inductance required to maintain the CCM operation for the duty cycle ranging from Dmin toDmax is

L > Lmin =Dmin(VImax − VO)

2fsIOmin=

VO(1 − Dmin)

2fsIOmin=

RLmax(1 − Dmin)

2fs. (2.43)

As the switching frequency fs increases, the minimum inductance Lmin decreases. Therefore, high switchingfrequencies are desirable to reduce the size of the inductor. In some applications, the inductance L can be muchhigher than Lmin in order to reduce the ripple current through the inductor and the filter capacitor. Therefore, it iseasier to reduce the output voltage ripple, to avoid the core saturation, and to reduce the winding and core losses.

In a real converter, the efficiency 𝜂 < 1, and therefore MV DC = VO∕VI = 𝜂D. Since VI = VO∕(𝜂D),

ΔiL = iL(DT) =(VI − VO)DT

L=

(VI − VO)D

fsL=

VO

(1𝜂− D

)fsL

(2.44)

IOB =ΔiL2

=(VI − VO)D

2fsL=

VO

(1𝜂− D

)2fsL

(2.45)

IOmin = IOBmax =ΔiLmax

2=

(VImax − VO)Dmin

2fsLmin=

VO

(1𝜂− Dmin

)2fsLmin

(2.46)

and

L > Lmin =Dmin(VImax − VO)

2fsIOmin=

VO

(1𝜂− Dmin

)2fsIOmin

=RLmax

(1𝜂− Dmin

)2fs

, (2.47)

where Dmin = MV DCmin∕𝜂 = VO∕(𝜂VImax).A gapped ferrite core should be used to make the inductor because the inductor current contains a dc component,

and therefore the core may saturate. The inductance is given by

L =𝜇0AcN2

lg +lc𝜇r

(2.48)

where N is the number of turns, Ac is the core cross-sectional area, lc is the magnetic path length (MPL), and lg isthe air-gap length.

If the dc output current IO and the dc input voltage VI are fixed, the peak-to-peak inductor current ΔiL = 2IOcan be made very large while maintaining the converter operation in CCM. In this case, the ripple current of theinductor should be limited, for example, ΔiL∕(2IO) ≤ 10%.

2.2.8 Capacitors

Capacitors are classified according to dielectric material used between the conductors. The following types ofcapacitors are used in switching-mode power supplies:

wet aluminum electrolytic capacitors wet tantalum electrolytic capacitors


solid electrolytic capacitors ceramic capacitors.

Wet electrolytic capacitors can be built using aluminum or tantalum. They are made of two aluminum foils. Apaper spacer soaked in wet electrolyte separates the two aluminum foils. One of the aluminum foils is coated withan insulating aluminum oxide layer, which forms the capacitor dielectric material. The aluminum foil coated inaluminum oxide is the anode of the capacitor. The liquid electrolyte and the second aluminum foil act as a cathodeof the capacitor. The two aluminum foils with attached leads are rolled together with the electrolyte soaked paperin a cylindrical aluminum case to form a wet aluminum electrolyte capacitor.

Wet electrolyte tantalum capacitors are formed in a similar manner as wet aluminum electrolyte capacitors exceptthat the dielectric material is tantalum oxide.

Solid electrolytic capacitors are constructed similarly to wet electrolytic capacitors except that a solid dielectricmaterial is used in place of a wet dielectric material These capacitors have moderate capacitances and a higherripple current rating. Electrolytic capacitors are the most commonly used in power electronics because of a highratio of capacitance per unit volume and low cost.

Ceramic capacitors use ceramic dielectric to separate two conductive plates. The ceramic dielectric material iscomposed of titanium dioxide (Class I) or barium titanate (Class II). Ceramic capacitors can be disc capacitors ormultilayer ceramic (MLC) capacitors. Disc capacitors have low capacitance per unit volume. Conductive materialis placed on the ceramic dielectric material forming interlace fingers. Ceramic capacitors have lower capacitancesthan electrolytic capacitors. The capacitances of ceramic capacitors are usually below 1 𝜇F. Ceramic capacitorshave very low values of ESR. This property reduces voltage ripple and power loss.

Important parameters of capacitors are the capacitance C, the equivalent series resistance (ESR) rC, and the seriesequivalent inductance (ESL) Ls, the self-resonant frequncy fr, and the breakdown voltage VBD. The capacitance is

C =𝜖r𝜖A

d(2.49)

where A is the area of each conductor, d is the thickness of the dielectric, 𝜖r is the relative permittivity of thedielectric, and 𝜖0 = 8.85 × 10−12 F/m is the permittivity of free space. The ESR is the sum of the resistances ofleads, the resistances of the contacts, and the resistance of the plate conductors. The ESL is the inductance of theleads. The self-resonant frequency is

fr =1

2𝜋√

CLs

. (2.50)

The dissipation factor of a capacitor is

DF = 𝜔CrC. (2.51)

The quality factor of a capacitor at a frequency f = 𝜔∕(2𝜋) is

QC = 1𝜔CrC

= 1DF

. (2.52)

For the buck converter, the ESL is connected in series with the filter inductance L and does not present a problem.However, the ESL can have a negative effect in boost converter.

Capacitors are rated for the breakdown voltage and the maximum rms value of the ripple current. The maximumrms ripple current is the limit of ac current and is dependent of the temperature and frequency of the currentconducted by a capacitor. The ripple current flowing through the ESR causes power loss PC = rCI2

ac(rms), whichgenerates heat within the capacitor. Electrolytic tantalum capacitors have the highest values of ESR, and ceramiccapacitors have the lowest ESR.

The performance of electrolytic capacitors is highly affected by operating conditions, such as frequency, accurrent, dc voltage, and temperature. The ESR is frequency dependent. As the frequency increases, the ESR first


decreases, usually reaches a minimum value at the self-resonant frequency, and then increases. For electrolyticcapacitors, the ESR decreases as the dc voltage increases. It also decreases as the peak-to-peak ac ripple voltageincreases. The ESR is often measured by manufacturers at the capacitor self-resonant frequency. The ESR ofcapacitors controls the peak-to-peak value of the output ripple voltage. Also, the higher the ESR of the capacitor,the greater the heat generated due to the continuous flow of current through the ESR. This reduces the converterefficiency and life expectancy of the power supply. During aging process, the electrolytic liquid inside the capacitorgradually evaporates, causing an increase in ESR.

When a voltage is applied between the conductors and across the dielectric of a capacitor, an electric field isinduced in the dielectric. The electric energy is stored in the electric field. The dielectric has a maximum value ofthe electric field strength EBD = VBD∕d, resulting in a capacitor breakdown voltage VBD.

2.2.9 Ripple Voltage in Buck Converter for CCM

A model of the filter capacitor consists of capacitance C, equivalent series resistance rC, and equivalent seriesinductance LESL The impedance of the capacitor model is

ZC = rC + j(𝜔LESL −

1𝜔C

)= rC

[1 + jQCo

(𝜔

𝜔r−𝜔r

𝜔

)](2.53)

where the self-resonant frequency of the filter capacitor is

fr =1

2𝜋√

CLESL

(2.54)

and the quality factor of the capacitor at its self-resonant frequency is

QCo = 1𝜔rCrC

. (2.55)

Figures 2.6 and 2.7 show plots of the magnitude |ZC| and phase 𝜙ZC of the capacitor for C = 1 𝜇F, rC = 50 mΩ,and LESL = 15 nH. The filter capacitor impedance is capacitive below the self-resonant frequency and inductiveabove the self-resonant frequency.

The input voltage of the second-order low-pass LCR output filter is rectangular with a maximum value VI and aduty cycle D. This voltage can be expanded into a Fourier series

v = DVI

[1 + 2

∞∑n=1

sin(n𝜋D)n𝜋D

cos n𝜔st

]

= DVI + 2DVI

[ sin 𝜋D𝜋D

cos𝜔st +sin 2𝜋D

2𝜋Dcos 2𝜔st +

sin 3𝜋D3𝜋D

cos 3𝜔st +⋯]. (2.56)

The components of this series are transmitted through the output filter to the load. It is difficult to determine thepeak-to-peak output voltage ripple Vr using the Fourier series of the output voltage. Therefore, a different approachwill be taken for deriving an expression for Vr.

A simpler derivation [24] is given below. A model of the output part of the buck converter for frequencies lowerthan the capacitor self-resonant frequency (i.e., f ≤ fr) is shown in Figure 2.8. The filter capacitor in this figure ismodeled by its capacitance C and its equivalent series resistance (ESR) designated by rC. Figure 2.9 depicts currentand voltage waveforms in the converter output circuit. The dc component of the inductor current flows through theload resistor RL while the ac component is divided between the capacitor C and the load resistor RL. In practice, thefilter capacitor is designed so that the impedance of the capacitive branch is much less than the load resistance RL.Consequently, the load ripple current is very small and can be neglected. Thus, the current through the capacitor isapproximately equal to the ac component of the inductor current, that is, iC ≈ iL − IO.


100

102

104

106

108

10−2

10−1

100

101

102

103

104

105

f (Hz)

| ZC

| (Ω

)

Figure 2.6 Magnitude of the capacitor impedance.

104

105

106

107

108

−90

−60

−30

0

30

60

90

f (Hz)

C (°

ϕ)

Figure 2.7 Phase of the capacitor impedance.


iL

+VORL

C

+rC

vC

+

L iO = IO + io

vrc

iC

+ vo

Figure 2.8 Model of the output circuit of the buck converter for frequencies lower than the self-resonant frequency ofthe filter capacitor.

For the interval 0 < t ≤ DT , when the switch is on and the diode is off, the capacitor current is given by

iC =ΔiLt

DT−

ΔiL2

(2.57)

resulting in the ac component of the voltage across the ESR

vrc = rCiC = rCΔiL( t

DT− 1

2

). (2.58)

tmax

tmin Vr

vo

t0

t0

t0

t0

t0

DT T

Δ

T2

vc

vrc

ic

iL

IO

DT T

DT T

DT T

DT T

Figure 2.9 Waveforms illustrating the ripple voltage in the PWM buck converter.


The voltage across the filter capacitance vC consists of the dc voltage VC and the ac voltage vc, that is, vC = VC + vc.Only the ac component vc may contribute to the output ripple voltage. The ac component of the voltage across thefilter capacitance is found as

vc =1C ∫

t

0iCdt + vc(0) =

ΔiLC ∫

t

0

( tDT

− 12

)dt + vc(0) =

ΔiL2C

(t2

DT− t

)+ vc(0). (2.59)

For steady state, vc(DT) = vc(0). The waveform of the voltage across capacitance C is a parabolic function. The accomponent of the output voltage is the sum of voltage across the filter capacitor ESR rC and the filter capacitance C

vo = vrc + vc = ΔiL

[t2

2CDT+

( rC

DT− 1

2C

)t −

rC

2

]+ vc(0). (2.60)

Let us consider the minimum value of the voltage vo. The derivative of the voltage vo with respect to time is

dvo

dt= ΔiL

( tCDT

+rC

DT− 1

2C

). (2.61)

Setting this derivative to zero, the time at which the minimum value of vo occurs is given by

tmin = DT2

− rCC. (2.62)

The minimum value of vo is equal to the minimum value of vrc if tmin = 0. This occurs at a minimum capacitance,which is given by

Cmin(on) =Dmax

2fsrCmax. (2.63)

Consider the time interval DT < t ≤ T when the switch S is off and the diode D1 is on. Referring to Figure 2.9,the current through the capacitor is

iC = −ΔiL(t − DT)

(1 − D)T+

ΔiL2

(2.64)

resulting in the voltage across the ESR

vrc = rCiC = rCΔiL

[− t − DT

(1 − D)T+ 1

2

](2.65)

and the voltage across the capacitor

vc = 1C ∫

t

DTiCdt + vc(DT) =

ΔiLC ∫

t

DT

[− t − DT

(1 − D)T+ 1

2

]dt + vc(DT)

=ΔiL2C

[− t2 − 2DTt + (DT)2

(1 − D)T+ t − DT

]+ vc(DT). (2.66)

Adding (2.65) and (2.66) yields the ac component of the output voltage

vo = rcΔiL

[− t − DT

(1 − D)T+ 1

2

]+

ΔiL2C

[− t2 − 2DTt + (DT)2

T(1 − D)+ t − DT

]+ vc(DT). (2.67)

The derivative of vo with respect to time is

dvo

dt= −

rCΔiL(1 − D)T

+ΔiLC

[− t − DT

(1 − D)T+ 1

2

]. (2.68)


Setting the derivative to zero, the time at which the maximum value of vo occurs is expressed by

tmax =(1 + D)T

2− rCC. (2.69)

The maximum value of vo is equal to the maximum value of vrc if tmax = DT . This occurs at a minimum capacitance,which is given by

Cmin(off ) =1 − Dmin

2fsrCmax. (2.70)

The peak-to-peak ripple voltage is independent of the voltage across the filter capacitance C and is determinedonly by the ripple voltage across the ESR if

C ≥ Cmin = maxCmin(on), Cmin(off ) =maxDmax, 1 − Dmin

2fsrC. (2.71)

Hence,

Cmin =Dmax

2fsrCfor Dmin + Dmax > 1 (2.72)

and

Cmin =1 − Dmin

2fsrCfor Dmin + Dmax < 1. (2.73)

For the worst case, Dmin = 0 or Dmax = 1. Thus, the above condition is satisfied at any value of D if

C ≥ Cmin = 12rCfs

. (2.74)

If condition (2.71) is satisfied, the peak-to-peak ripple voltage of the buck converter is

Vr = rCΔiLmax =rCVO(1 − Dmin)

fsL. (2.75)

For steady-state operation, the average value of the ac component of the capacitor voltage vc is zero, that is,

1T ∫

T

0vcdt = 0 (2.76)

resulting in

vc(0) =ΔiL(2D − 1)

12fsC. (2.77)

Waveforms of vrc, vc, and vo are depicted in Figure 2.10 for three values of the filter capacitanceC. In Figure 2.10(a), the peak-to-peak value of vo is higher than the peak-to-peak value of vrc because C < Cmin.Figures 2.10(b) and (c) shows the waveforms for C = Cmin and C > Cmin, respectively. For both these cases, thepeak-to-peak voltages of vo and vrc are the same. For aluminum electrolytic capacitors, 𝜏 = rCC ≈ 65 × 10−6 s.

If condition (2.71) is not satisfied, both the voltage drop across the filter capacitor C and the voltage drop acrossthe ESR contribute to the ripple output voltage. The ac component of the voltage across the filter capacitor increaseswhen the ac component of the charge stored in capacitor is positive. The positive charge is equal to the area underthe capacitor current waveform for iC > 0. The capacitor current is positive during time interval T∕2. The maximumincrease of the charge stored in the filter capacitor in every cycle T is

ΔQ =T2

ΔiLmax

2

2=

TΔiLmax

8=

ΔiLmax

8fs. (2.78)


0

0t /T

(a)

Vrc

, Vc,V

o (V

)

10.4 0.80.60.2

0t /T

(b)

10.4 0.80.60.2

0t /T

(c)

10.4 0.80.60.2

0.08

0.04

−0.08

−0.04

0

Vrc

, Vc,V

o (V

)

0.08

0.04

−0.08

−0.04

0

Vrc

, Vc,V

o (V

)

0.08

0.04

−0.08

−0.04

v rc

vo

vc

v rc

vo

vc

v rc

vo

vc

Figure 2.10 Waveforms of vc, vrc, and vo at three values of the filter capacitor for CCM. (a) C < Cmin. (b) C = Cmin.(c) C > Cmin.


Hence, using (2.39), the voltage ripple across the capacitance C is

VCpp = ΔQC

=ΔiLmax

8fsC=

VO(1 − Dmin)

8f 2s LC

=(1 − Dmin)𝜋2VOf 2

o

2f 2s

(2.79)

where fo = 1∕(2𝜋√

LC) is the corner frequency of the output filter. The minimum filter capacitance required toreduce its peak-to-peak ripple voltage below a specified level VCpp is

Cmin =ΔiLmax

8fsVCpp=

(1 − Dmin)VO

8f 2s LVCpp

. (2.80)

Thus, Cmin is inversely proportional to f 2s . Therefore, high switching frequencies are desirable to reduce the size of

the filter capacitor.Using (2.39), the peak-to-peak voltage ripple across the ESR is

Vrcpp = rCΔiLmax =rCVO(1 − Dmin)

fsL. (2.81)

Hence, the conservative estimation of the total voltage ripple is

Vr ≈ VCpp + Vrcpp =VO(1 − Dmin)

8f 2s LC

+rCVO(1 − Dmin)

fsL. (2.82)

2.2.10 Switching Losses with Linear MOSFET Output Capacitance

Let us assume that the MOSFET output capacitance Co is linear. First, we shall consider the transistor turn-offtransition. During this time interval, the transistor is off, the drain-to-source voltage vDS increases from nearlyzero to VI , and the transistor output capacitance is charged. Because dQ = CodvDS, the charge transferred from theinput voltage source VI to the transistor output capacitance Co during the turn-off transition is

Q =∫

T

0iIdt =

∫

VI

0dQ = Co

∫

VI

0dvDS = CoVI (2.83)

yielding the energy transferred from the input voltage source VI to the converter during the turn-off transition as

WVI=∫

T

0p(t)dt =

∫

T

0vIiIdt = VI

∫

T

0iIdt = VIQ = CoV2

I . (2.84)

An alternative method for deriving an expression for the energy delivered from a dc source VI to a series R-Cocircuit after turning on VI is as follows. The input current is

iI =VI

Re−

t𝜏 (2.85)

where 𝜏 = RCo is the time constant. Hence,

WVI=∫

∞

0vIiIdt = VI

∫

∞

0iIdt =

V2I

R ∫

∞

0e−

t𝜏 dt =

V2I 𝜏

R= CoV2

I . (2.86)

Using dWs = QdvDS∕2, the energy stored in the transistor output capacitance Co at the end of the transistorturn-off transition, when vDS = VI , is given by

Ws =∫

VI

0dWs =

12

Q∫

VI

0dvDS = 1

2QVI =

12

CoV2I . (2.87)


Thus, the energy lost in the parasitic resistance of the capacitor charging path is the turn-off switching energy lossdescribed by

Wturn-off = WVI− Ws = CoV2

I − 12

CoV2I = 1

2CoV2

I (2.88)

which results in the turn-off switching power loss in the resistance of the charging path

Pturn-off =Wturn-off

T= fsWturn-off =

12

fsCoV2I . (2.89)

After turn-off, the transistor remains in the off-state for some time interval and the charge Ws is stored in the outputcapacitance Co. The efficiency of charging a linear capacitance from a dc voltage source is 50%.

Now consider the transistor turn-on transition. When the transistor is turned on, its output capacitance Co isshorted out through the transistor on-resistance rDS, the charge stored in Co decreases, and the drain-to-sourcevoltage decreases from VI to nearly zero. As a result, all the energy stored in the transistor output capacitance isdissipated as heat in the transistor on-resistance rDS. Therefore, the turn-on switching energy loss is

Wturn-on = Ws =12

CoV2I (2.90)

resulting in the turn-on switching power loss in the MOSFET

Pturn-on = Psw(FET) =Wturn-on

T= fsWturn-on = 1

2fsCoV2

I . (2.91)

The turn-on loss is independent of the transistor on-resistance rDS as long as the transistor output capacitance isfully discharged before the turn-off transition begins.

The total switching energy loss in every cycle of the switching frequency during the process of first chargingand then discharging of the output capacitance is given by

Wsw = Wturn-off + Wturn-on = WVI= CoV2

I (2.92)

and the total switching loss in the converter is

Psw =Wsw

T= fsWsw = fsCoV2

I . (2.93)

For a linear capacitance, one-half of the switching power is lost in the MOSFET and the other half is lost in theresistance of the charging path of the transistor output capacitance, that is, Pturn-on = Pturn-off = Psw∕2.

The behavior of a diode is different from that of a transistor because a diode cannot discharge its parallelcapacitance through its forward resistance. This is because a diode does not turn on until its voltage drops to thethreshold voltage. However, the junction diodes suffer from the reverse recovery at turn-off.

2.2.11 Switching Losses with Nonlinear MOSFET Output Capacitance

The MOSFET drain-to-source capacitance Cds is a nonlinear capacitance of the pn step-junction body-diode, whichdepends on the drain-to-source voltage vDS. This capacitance is given by

Cds =CJ0√1 + vDS

VB

= CJ0

√VB

vDS + VBfor vDS ≥ −VB (2.94)

where CJ0 is the zero-bias junction capacitance and VB is the built-in potential barrier and it is in the range0.55–0.9 V. From (2.94),

Cds(vDS) = Cds(VI)

√VI + VB

vDS + VB≈ Cds(VI)

√VI

vDS. (2.95)


Manufacturers of power MOSFETs usually specify the capacitances Crss = Cgd, Ciss = Cgs + Cgd, and Coss =Cds + Cgd at f = 1 MHz. The capacitances Crss and Coss are measured at VDS = 25 V and VGS = 0 V. Hence,Cds25 = Coss − Crss. The output capacitance at vDS = VI is

Cds(VI) =CJ0√1 + VI

VB

= Cds25

√25 + VB

VI + VB≈

5Cds25√VI

. (2.96)

Since dQ = CdsdvDS, the charge transferred from the dc input voltage source VI to the drain-to-source junctioncapacitance Cds during the turn-off transition is given by

Q(vDS) =∫

vDS

−VB

Cds(vDS)dvDS = CJ0∫

vDS

−VB

√VB

vDS + VBdvDS

= 2CJ0

√VB(vDS + VB) = 2(vDS + VB)Cds(vDS) ≈ 2Cds(vDS)vDS. (2.97)

Hence,

Q(VI) = 2(VI + VB)Cds(VI) ≈ 2Cds(VI)VI . (2.98)

The energy transferred from the input dc voltage source VI to the converter during the turn-off transition is givenby

WVI=∫

VI

−VB

vIiIdt = VI∫

VI

−VB

iIdt = VIQ(VI) = 2VI(VI + VB)Cds(VI) ≈ 2Cds(VI)V2I . (2.99)

Because dWs = QdvDS∕2, the energy stored in the drain-to-source capacitance Cds at vDS is

Ws(vDS) =∫

vDS

−VB

dWs =12 ∫

vDS

−VB

QdvDS = CJ0

√VB

∫

vDS

−VB

√vDS + VBdvDS

= 23

(vDS + VB)2Cds(vDS) ≈ 23

Cds(vDS)v2DS. (2.100)

Hence, one obtains the energy stored in Cds at VI

Ws =23

(VI + VB)2Cds(VI) ≈23

Cds(VI)V2I . (2.101)

Therefore, the energy lost in the resistance of the charging path of the MOSFET output capacitance is given by

Wturn-off = WVI− Ws ≈ 2Cds(VI)V

2I − 2

3Cds(VI)V

2I = 4

3Cds(VI)V

2I . (2.102)

Hence, the switching power loss dissipated in the resistance r of the path of charging the transistor output capacitanceis

Pr = Pturn-off =Wturn-off

T= fsWturn-off =

43

fsCds(VI)V2I = 20

3fsCds25

√V3

I . (2.103)

The transistor equivalent linear output capacitance that causes the same switching power loss in the charging pathresistance r during the turn-off transition as the linear one is derived as

12

fsCeq(r)V2I = 4

3fsCds(VI)V

2I = 20

3fsCds25

√V3

I (2.104)

producing

Ceq(r) =83

Cds(VI) =40Cds25

3√

VI

. (2.105)


During the turn-on transition, all the energy stored in the transistor output capacitance is lost in the MOSFETon-resistance rDS

Wturn-on = Ws =23

Cds(VI)(VI + VB)2 ≈ 23

Cds(VI)V2I . (2.106)

Thus, the MOSFET turn-on switching loss is

Psw(FET) = Pturn-on =Wturn-on

T= fsWturn-on = 2

3fsCds(VI)V

2I = 10

3fsCds25

√V3

I . (2.107)

The transistor equivalent linear output capacitance that causes the same switching power loss in the MOSFETon-resistance during the turn-on transition as the linear one can be obtained as

12

fsCeq(FET)V2I = 2

3fsCds(VI)V

2I = 10

3fsCds25

√V3

I (2.108)

resulting in

Ceq(FET) =43

Cds(VI) =20Cds25

3√

VI

. (2.109)

The total switching energy loss in each cycle of the switching frequency is

Wsw = Wturn-off + Wturn-on = WVI= 2Cds(VI)V

2I (2.110)

and the total switching loss in the converter is

Psw =Wsw

T= fsWsw = 2fsCds(VI)V

2I = 10fsCds25

√V3

I . (2.111)

The transistor equivalent linear output capacitance Ceq(sw) that produces the same amount of the switching loss asthe nonlinear one at a given VI can be derived as

fsCeq(sw)V2I = 2fsCds(VI)V

2I = 10fsCds25

√V3

I (2.112)

yielding

Ceq(sw) = 2Cds(VI) =10Cds25√

VI

. (2.113)

The turn-off switching power loss is twice as high as the turn-on switching power loss for the MOSFET with anonlinear output capacitance. The ratio of these losses is

Pturn-off

Pturn-on= 2. (2.114)

Example 2.1A power MOSFET IRF510 with VB = 0.774158 V, Crss = 25 pF, and Coss = 100 pF is operated in the buck PWMconverter at VI = 100 V and fs = 100 kHz. Find: Cds25, CJ0, Cds(VI), Q(VI), Wsw, Psw, Ceq(sw), Wturn-on, Psw(FET),Ceq(FET), Wturn-off , Pturn-off , and Ceq(r).

Solution: The transistor drain-to-source capacitance at VDS = 25 V is

Cds25 = Coss − Crss = 100 − 25 = 75 pF. (2.115)

The zero-bias drain-to-source capacitance is

CJ0 = Cds25

√1 + 25

VB= 75 ×

√1 + 25

0.774158= 432.75 pF. (2.116)


The drain-to-source capacitance at VI = 100 V is

Cds(VI) =CJ0√1 + VI

VB

= 432.75 × 10−12√1 + 100

0.774158

= 37.93 pF. (2.117)

The charge transferred from the dc input source to Cds during the turn-off transition is

Q(VI) = 2(VI + VB)Cds(VI) = 2 × (100 + 0.774158) × 37.93 × 10−12 = 7.6447 nC. (2.118)

The switching energy is

Wsw = WVI= 2V2

I Cds(VI) = 2 × 1002 × 37.93 × 10−12 = 758.6 nJ. (2.119)

The switching loss is

Psw = 2fsV2I Cds(VI) = 2 × 100 × 103 × 1002 × 37.93 × 10−12 = 75.86 mW. (2.120)

The equivalent linear switching capacitance is

Ceq(sw) = 2Cds(VI) = 2 × 37.93 × 10−12 = 75.86 pF. (2.121)

The energy lost during the turn-on transition is equal to the energy stored in Cds at the end of the turn-offtransition when vDS = VI . This energy is

Wturn-on = Ws =23

V2I Cds(VI) =

23× 1002 × 37.93 × 10−12 = 252.87 nJ. (2.122)

The switching power loss in the MOSFET is

Psw(FET) =23

fsV2I Cds(VI) =

23× 100 × 103 × 1002 × 37.93 × 10−12 = 25.287 mW. (2.123)

The equivalent linear turn-on capacitance is

Ceq(FET) =43

Cds(VI) =43× 37.93 × 10−12 = 50.57 pF. (2.124)

The energy lost in the resistance of the charging path of Cds during the turn-off transition is

Wturn-off =43

V2I Cds(VI) =

43× 1002 × 37.93 × 10−12 = 505.73 nJ. (2.125)

The turn-off switching loss is

Pturn-off =43

fsV2I Cds(VI) =

43× 100 × 103 × 1002 × 37.93 × 10−12 = 50.573 mW. (2.126)

The turn-off equivalent linear capacitance is

Ceq(r) =83

Cds(VI) =83× 37.93 × 10−12 = 101.1 pF. (2.127)

2.2.12 Power Losses and Efficiency of Buck Converter for CCM

An equivalent circuit of the buck converter with parasitic resistances is shown in Figure 2.11. In this figure, rDSis the MOSFET on-resistance, RF is the diode forward resistance, VF is the diode threshold voltage, rL is theESR of the inductor L, and rC is the ESR of the filter capacitor C. The slope of the ID–VDS curves in the ohmicregion is equal to the inverse of the MOSFET on-resistance 1∕rDS. The MOSFET on-resistance rDS increases withtemperature because the mobility of electrons 𝜇n ≈ K1∕T2.5 decreases with temperature T in the range from 100 to400C, where K1 is a constant. Typically, rDS doubles as the temperature rises by 100C.


rL

+VORL

C

rC

L IO

iC

iLr

DSiS

iDRF

VF

VI

Figure 2.11 Equivalent circuit of the buck converter with parasitic resistances and the diode offset voltage.

The large-signal model of a diode consists of a battery VF in series with a forward resistance RF . The voltageacross the conducting diode is VD = VF + RFID. If a line is drawn along the linear high-current portion of theID–VD curve (or log(ID)–VD) extending to the VD-axis, the intercept on the VD-axis is VF and the slope is 1∕RF .The threshold voltage VF is typically 0.7 V for silicon (Si) pn junction diodes, and VF = 2.8 V for silicon carbide(SiC) pn junction diodes. The threshold voltage VF = 0.3–0.4 V for silicon Schottky diodes and VF = 2 V forsilicon carbide Schottky diodes. The threshold voltage VF of silicon diodes decreases with temperature at the rateof 2 mV/C. The series resistance RF of pn junction diodes decreases with temperature, while resistance RF ofSchottky diodes increases with temperature.

The conduction losses will be evaluated assuming that the inductor current iL is ripple free and is equal to the dcoutput current IO. Hence, the switch current can be approximated by

iS =

IO, for 0 < t ≤ DT0, for DT < t ≤ T

(2.128)

which results in its rms value

ISrms =

√1T ∫

T

0i2Sdt =

√1T ∫

DT

0I2Odt = IO

√D (2.129)

and the MOSFET conduction loss

PrDS = rDSI2Srms = DrDSI2

O =DrDS

RLPO. (2.130)

The transistor conduction loss PrDS is proportional to the duty cycle D at a fixed load current IO. At D = 0, theswitch is off for the entire cycle and therefore the conduction loss is zero. At D = 1, the switch is on for the entirecycle, resulting in a maximum conduction loss. Assuming that Dmax = VO∕VImin as for the lossless converter, themaximum MOSFET conduction power is

PrDSmax = DmaxrDSI2Omax =

DmaxrDS

RLminPOmax ≈

VO

VImin

rDS

RLminPOmax. (2.131)

Assuming that the transistor output capacitance Co is linear, the switching loss is expressed by

Psw = fsCoV2I =

fsCoV2O

M2V DC

=fsCoRL

M2V DC

PO. (2.132)

The maximum switching loss is

Psw(max) = fsCoV2Imax =

fsCoV2O

M2V DCmin

=fsCoRLminV2

Imax

V2O

PO. (2.133)


Excluding the MOSFET gate-drive power, the total power dissipation in the MOSFET is

PFET = PrDS +Psw

2= DrDSI2

O + 12

fsCoV2I =

(DrDS

RL+

fsCoRL

2M2V DC

)PO. (2.134)

Similarly, the diode current can be approximated by

iD =

0, for 0 < t ≤ DTIO, for DT < t ≤ T

(2.135)

yielding its rms value

IDrms =

√1T ∫

T

0i2Ddt =

√1T ∫

T

DTI2Odt = IO

√1 − D (2.136)

and the power loss in RF

PRF = RFI2Drms = (1 − D)RFI2

O =(1 − D)RF

RLPO. (2.137)

The average value of the diode current is

ID = 1T ∫

T

0iDdt = 1

T ∫

T

DTIOdt = (1 − D)IO (2.138)

which gives the power loss associated with the voltage VF

PVF = VFID = (1 − D)VFIO =(1 − D)VF

VOPO. (2.139)

Thus, the overall diode conduction loss is

PD = PVF + PRF = (1 − D)VFIO + (1 − D)RFI2O = (1 − D)

(VF

VO+

RF

RL

)PO. (2.140)

The diode conduction loss PD decreases, when the duty cycle D increases at a fixed load current IO. At D = 0, thediode is on for the entire cycle, resulting in a maximum conduction loss. At D = 1, the diode is off for the entirecycle and therefore the conduction loss is zero. The maximum diode conduction loss is

PDmax = (1 − Dmin)

(VF

VO+

RF

RLmin

)POmax ≈

(1 −

VO

VImax

)(VF

VO+

RF

RLmin

)POmax. (2.141)

Typically, the power loss in the inductor core can be ignored and only the copper loss in the inductor windingshould be considered. The inductor current can be approximated by

iL ≈ IO (2.142)

leading to its rms value

ILrms = IO (2.143)

and the inductor conduction loss

PrL = rLI2Lrms = rLI2

O =rL

RLPO. (2.144)

The maximum power loss in the inductor is

PrLmax = rLI2Omax =

rL

RLminPOmax. (2.145)


Using (2.13), (2.57), and (2.64), the rms current through the filter capacitor is found to be

ICrms =

√1T ∫

T

0i2Cdt =

ΔiL√12

=VO(1 − D)√

12fsL(2.146)

and the power loss in the filter capacitor

PrC = rCI2Crms =

rCΔi2L12

=rCV2

O(1 − D)2

12f 2s L2

=rCRL(1 − D)2

12f 2s L2

PO. (2.147)

The maximum power loss in the capacitor is

PrCmax =rCΔi2Lmax

12=

rCV2O(1 − Dmin)2

12f 2s L2

≈rCRL

(1 − VO

VImax

)2

12f 2s L2

POmax. (2.148)

The overall power loss is given by

PLS = PrDS + Psw + PD + PrL + PrC = DrDSI2O + fsCoV2

I + (1 − D)(VFIO + RFI2O) + rLI2

O +rCΔi2L

12

=

[DrDS

RL+

fsCoRL

M2V DC

+ (1 − D)

(VF

VO+

RF

RL

)+

rL

RL+

rCRL(1 − D)2

12f 2s L2

]PO. (2.149)

Thus, the converter efficiency is

𝜂 =PO

PI=

PO

PO + PLS= 1

1 + PLS

PO

= 1

1 + DrDS+(1−D)RF+rL

RL+ (1−D)VF

VO+ fsCoRL

M2V DC

+ rCRL(1−D)2

12f 2s L2

= 1


RL+ (1−D)VF

DVI+ fsCoRL

D2+ rCRL(1−D)2

12f 2s L2

. (2.150)

For D = 0, the switch is off and the diode is on, yielding the converter efficiency

𝜂 = 1

1 + RF+rL

RL+ VF

VO

. (2.151)

For D = 1, the switch is on and the diode is off, resulting in the converter efficiency

𝜂 = 1

1 + rDS+rL

RL

. (2.152)

If the inductor peak-to-peak current ripple ΔiL = VO(1 − D)∕(fsL) = D(1 − D)VI∕(fsL) is taken into account, therms value of the switch current is given by

ISrms =√

D3

(I2Smin + ISminISmax + I2

Smax) = IO

√D

√1 + 1

12

(ΔiLIO

)2

(2.153)

where ISmin = IO − ΔiL∕2 and ISmax = IO + ΔiL∕2. Similarly, the rms value of the diode current is

IDrms =√

1 − D3

(I2Dmin + IDminIDmax + I2

Dmax

)= IO

√1 − D

√1 + 1

12

(ΔiLIO

)2

(2.154)


where IDmin = IO − ΔiL∕2 and IDmax = IO + ΔiL∕2. The rms value of the inductor current is

ILrms =√

13

(I2Lmin + ILminILmax + I2

Lmax

)= IO

√1 + 1

12

(ΔiLIO

)2

. (2.155)

For example, for ΔiL∕IO = 0.1, ILrms = 1.0017IO, and for ΔiL∕IO = 0.5, ILrms = 1.0408IO.Assuming that the resistances rL, rDS, and RF are constant and frequency independent, the conduction power loss

in the MOSFET is given by

PrDS = rDSI2Srms = rDSDI2

O

[1 + 1

12

(ΔiLIO

)2]=

rDSD

RL

[1 + 1

12

(ΔiLIO

)2]

PO. (2.156)

The conduction power loss in the diode forward resistance is

PRF = RFI2Drms = RF(1 − D)I2

O

[1 + 1

12

(ΔiLIO

)2]=

RF(1 − D)

RL

[1 + 1

12

(ΔiLIO

)2]

PO. (2.157)

Assuming that the inductor resistance rL is independent of frequency, the power loss in the inductor winding isgiven by


O

[1 + 1

12

(ΔiLIO

)2]=

rL

RL

[1 + 1

12

(ΔiLIO

)2]

PO. (2.158)

The overall power loss is

PLS =

DrDS + (1 − D)RF + rL

RL

[1 + 1

12

(ΔiLIO

)2]+

fsCoRL

M2V DC

+(1 − D)VF

VO+

rCRL(1 − D)2

12f 2s L2

PO. (2.159)

Hence, the converter efficiency is

𝜂 = 1


RL

[1 + 1

12

(ΔiLIO

)2]+ (1−D)VF

VO+ fsCoRL

M2V DC

+ rCRL(1−D)2

12f 2s L2

= 1


RL

[1 + 1

12

(ΔiLRL

DVI

)2]+ (1−D)VF

DVI+ fsCoRL

D2+ rCRL(1−D)2

12f 2s L2

. (2.160)

For example, for ΔiL∕IO = 0.1,


O

[1 + 1

12

( 110

)2]= rLI2

O

(1 + 1

1200

)= 1.0008333rLI2

O. (2.161)

For ΔiL∕IO = 0.2,


O

[1 + 1

12

(15

)2]= rLI2

O

(1 + 1

300

)= 1.00333rLI2

O. (2.162)

In the buck converter, part of the dc input power is transferred directly to the output and is converted to ac power,which is then converted back to dc power. It can be shown that the amount of power which is converted to acpower is

PAC = (1 − D)PO (2.163)

and the amount of the dc power that directly flows to the output is

PDC = DPO. (2.164)


2.2.13 DC Voltage Transfer Function of Lossy Converter for CCM

The dc component of the input current is

II =1T ∫

T

0iSdt = 1

T ∫

DT

0IOdt = DIO (2.165)

leading to the dc current transfer function of the buck converter

MIDC ≡IO

II= 1

D. (2.166)

This equation holds true for both lossless and lossy converters. The converter efficiency can be expressed as

𝜂 =PO

PI=

VOIO

VIII= MV DCMIDC =

MV DC

D(2.167)

from which the voltage transfer function of the lossy buck converter is

MV DC = 𝜂

MIDC= 𝜂D = D


RL+ (1−D)VF

VO+ fsCoRL

M2V DC

+ rCRL(1−D)2

12f 2s L2

= D


RL+ (1−D)VF

DVI+ fsCoRL

(VO∕VI )2+ rCRL(1−D)2

12f 2s L2

. (2.168)

For D = 1, MV DC = 𝜂 < 1.From (2.168), the on-duty cycle is

D =MV DC

𝜂=

VO

𝜂VI. (2.169)

The duty cycle D at a given dc voltage transfer function is higher for the lossy converter than that of a losslessconverter. This is because the switch S must be closed for a longer period of time for the lossy converter to transferenough energy to supply both the required output energy and the converter losses.

Substitution of (2.169) into (2.150) gives the converter efficiency

𝜂 =N𝜂

D𝜂

(2.170)

where

N𝜂 = 1 + MV DC

(VF

VO+

rCRL

6f 2s L2

−rDS − RF

RL

)+

[1 + MV DC

(VF

VO+

rCRL

6f 2s L2

−rDS − RF

RL

)]2

−M2

V DCrCRL

3f 2s L2

(1 +

RF + rL

RL+

VF

VO+

fsCoRL

M2V DC

+rCRL

12f 2s L2

) 12

(2.171)

and

D𝜂 = 2

(1 +

RF + rL

RL+

VF

VO+

fsCoRL

M2V DC

+rCRL

12f 2s L2

). (2.172)

2.2.14 MOSFET Gate-Drive Power

When the transistor is driven by a square-wave voltage source, the MOSFET gate-drive power is associatedwith charging the transistor input capacitance, when the gate-to-source voltage increases, and discharging this


capacitance when the gate-to-source voltage decreases. Unfortunately, the input capacitance of power MOSFETs ishighly nonlinear and therefore it is difficult to determine the gate-drive power, using the transistor input capacitance.In data sheets, a total gate charge Qg stored in the gate-to-source capacitance and the gate-to-drain capacitance isgiven at a specified gate-to-source voltage VGS (usually, VGS = 10 V) and a specified drain-to-source voltage VDS(usually, VDS = 0.8 of the maximum rating). Using a square-wave voltage source to drive the MOSFET gate, theenergy transferred from the gate-drive source to the transistor is

WG = QgVGSpp. (2.173)

This energy is lost during one cycle T of the switching frequency fs = 1∕T for charging and discharging theMOSFET input capacitance. Thus, the MOSFET gate-drive power is

PG =WG

T= fsWG = fsQgVGSpp. (2.174)

The gate-drive power PG is proportional to the switching frequency fs.The power gain is defined by

kp =PO

PG. (2.175)

The power-added efficiency (PAE) incorporates the gate-drive power PG by subtracting it from the output powerPO and is defined by

𝜂PAE =PO − PG

PI. (2.176)

If the power gain kp is high, 𝜂PAE ≈ 𝜂. If the power gain kp < 1, 𝜂PAE < 0.The total efficiency is defined by

𝜂t =PO

PI + PG. (2.177)

The average efficiency is defined by

𝜂AVG =POAVG

PIAVG. (2.178)

In order to determine this efficiency, the probability-density functions of the average input and output powers arerequired.

2.2.15 Gate Driver

Both the gate and the source of the MOSFET in the buck converter are connected to two hot points. Therefore, it isdifficult to drive the transistor. The driver is usually an integrated circuit, which requires a power supply and oneend terminal of the power supply should be connected to ground.

One option is to connect the driver between the gate and ground. In this case, KVL is

vG − vGS + vDS − VI = 0 (2.179)

yielding

vGS = vG − VI + vDS. (2.180)

When the MOSFET is on, vDS ≈ 0, resulting in

vGS = vG − VI . (2.181)


If the gate-to-source voltage vGS in the on state is 5–10 V, the on-gate voltage is

vG(ON) = VI + vGS(ON) ≈ VI + 5 V to VI + 10 V. (2.182)

For example, if VI = 5 V, vG(ON) = 5 + 5 = 10 V to vG(ON) = 5 + 10 = 15 V. However, if VI = 100 V, vG(ON) =100 + 5 = 105 V to 100 + 10 = 110 V.

When the MOSFET is off, the diode is on, vD ≈ 0, and vG(OFF) − vGS(OFF) = 0. If vG(OFF) = VI , vGS(OFF) =vG(OFF) = VI = 100 V. This high voltage will break the SiO2 dielectric in the gate.

2.2.16 Design of Buck Converter for CCM

Design a PWM buck converter operating in CCM to meet the following specifications: VI = 28± 4 V, VO = 12 V,IOmin = 1 A, IOmax = 10 A, fs = 100 kHz, and Vr∕VO ≤ 1%.

Solution: The minimum, nominal, and maximum values of the input voltage VImin = 24 V, VInom = 28 V, andVImax = 32 V. The maximum and minimum values of the dc output power are

POmax = VOIOmax = 12 × 10 = 120 W (2.183)

and

POmin = VOIOmin = 12 × 1 = 12 W. (2.184)

The minimum and maximum values of the load resistance are

RLmin =VO

IOmax= 12

10= 1.2 Ω (2.185)

and

RLmax =VO

IOmin= 12

1= 12 Ω. (2.186)

The minimum, nominal, and maximum values of the dc voltage transfer function are

MV DCmin =VO

VImax= 12

32= 0.375 (2.187)

MV DCnom =VO

VInom= 12

28= 0.43 (2.188)

and

MV DCmax =VO

VImin= 12

24= 0.5. (2.189)

Assume the converter efficiency 𝜂 = 85%. The minimum, nominal, and maximum values of the duty cycle are

Dmin =MV DCmin

𝜂= 0.375

0.85= 0.441 (2.190)

Dnom =MV DCnom

𝜂= 0.43

0.85= 0.506 (2.191)

and

Dmax =MV DCmax

𝜂= 0.5

0.85= 0.588. (2.192)


Assuming the switching frequency fs = 100 kHz, the minimum inductance that is required to maintain the converterin CCM is

Lmin =RLmax

(1𝜂− Dmin

)2fs

=12 ×

(1

0.85− 0.441

)2 × 105

= 44.18 𝜇H. (2.193)

Let us use a standard value of the inductane L = 50 𝜇H/rL = 0.05 Ω.The maximum inductor ripple current is


fsL= 12 × (1 − 0.441)

105 × 50 × 10−6= 1.3416 A. (2.194)

The ripple voltage is

Vr =VO

100= 12

100= 120 mV. (2.195)

If the filter capacitance is large enough, Vr = rCmaxΔiLmax and the maximum ESR of the filter capacitor is

rCmax =Vr

ΔiLmax= 120 × 10−3

1.3416= 89.5 mΩ. (2.196)

Let rC = 50 mΩ. The minimum value of the filter capacitance at which the ripple voltage is determined by theripple voltage across the ESR is

Cmin = max

Dmax

2fsrC,

1 − Dmin

2fsrC

=

Dmax

2fsrC= 0.588

2 × 105 × 50 × 10−3= 58.8 𝜇F. (2.197)

Pick C = 100 𝜇F/25 V/50 mΩ.The corner frequency of the output low-pass filter is

fo = 1

2𝜋√

LC= 1

2𝜋√

50 × 10−6 × 100 × 10−6= 2.25 kHz. (2.198)

Thus, fs∕fo = 100∕2.25 = 44.4. The bandwidth of the converter is approximately equal to the corner frequency.The voltage and current stresses of power MOSFET and diode are

VSMmax = VDMmax = VImax = 32 V (2.199)

and

ISMmax = IDMmax = IOmax +ΔiLmax

2= 10 + 1.427

2= 10.7135 A. (2.200)

An International Rectifier IRF150 power MOSFET is selected, which has VDSS = 100 V, ISM = 40 A, rDS =55 mΩ, Co = 100 pF, and Qg = 63 nC. Also, an MBR1060 Schottky barrier diode is chosen, which has IDM =20 A, VDM = 60 V, VF = 0.4 V, and RF = 25 mΩ.

The power losses and the efficiency will be calculated at the minimum load resistance RLmin = 1.2 Ω andthe maximum dc input voltage VImax = 32 V, which correspond to the minimum duty cycle Dmin = 0.441. Theconduction power loss in the MOSFET is

PrDS = DminrDSI2Omax = 0.441 × 0.055 × 102 = 2.426 W (2.201)

and the switching loss is

Psw = fsCoV2Imax = 105 × 100 × 10−12 × 322 = 0.01 W. (2.202)

Hence, the total power loss in the MOSFET is

PFET = PrDS +Psw

2= 2.426 + 0.005 = 2.431 W. (2.203)


However, the maximum conduction power loss in the MOSFET occurs at the minimum dc input voltage VImin = 24 V,RLmin = 1.2 Ω, and Dmax = 0.588. Thus, PrDSmax = DmaxrDSI2

Omax = 0.588 × 0.055 × 102 = 3.234 W.The diode loss due to VF is

PVF = (1 − Dmin)VFIOmax = (1 − 0.441) × 0.4 × 10 = 2.236 W (2.204)

the diode loss due to RF is

PRF = (1 − Dmin)RFI2Omax = (1 − 0.441) × 0.025 × 102 = 1.398 W (2.205)

and the total diode conduction loss is

PD = PVF + PRF = 2.236 + 1.398 = 3.634 W. (2.206)

The power loss in the inductor dc ESR rL = 50 mΩ is

PrL = rLI2Omax = 0.05 × 102 = 5 W. (2.207)

The power loss in the capacitor ESR is

PrC =rC(ΔiLmax)2

12= 0.05 × 1.4272

12= 0.008 W. (2.208)

The total power loss is

PLS = PrDS + Psw + PD + PrL + PrC = 2.426 + 0.01 + 3.634 + 5 + 0.008 = 11.078 W (2.209)

and the efficiency of the converter at full load is

𝜂 =PO

PO + PLS= 120

120 + 11.078= 91.55%. (2.210)

If the assumed efficiency is much different than the calculated one in (2.210), a next iteration step is needed with anew assumed converter efficiency.

Note that the maximum conduction power loss in the MOSFET occurs at VImin = 24 V and RLmin = 1.2 Ω and isgiven by

PrDS = DmaxrDSI2Omax = 0.588 × 0.055 × 102 = 3.234 W. (2.211)

Assuming that the peak-to-peak gate-to-source voltage is VGSpp = 16 V, the MOSFET gate-drive power is

PG = fsQgVGSpp = 105 × 63 × 10−9 × 16 = 100.8 mW. (2.212)

The efficiency 𝜂 of the designed buck converter was computed from (2.170) through (2.172) over the entire rangeof the specified operating conditions. Next, the duty cycle D was computed from (2.169), using the calculatedefficiency 𝜂. The plots of 𝜂 and D as functions of VI , IO, and RL are shown in Figures 2.12 through 2.17 forrDS = 55 mΩ, RF = 25 mΩ, VF = 0.4 V, rL = 50 mΩ, rC = 50 mΩ, L = 40 𝜇H, Co = 100 pF, and fs = 100 kHz.The converter efficiency 𝜂 decreases as the load current IO increases (or the load resistance RL decreases). Theminimum efficiency 𝜂min occurs at the maximum load current IOmax and the maximum dc input voltage VImax. Theduty cycle D decreases when VI increases, and D increases when IO increases (or RL decreases).

2.3 DC Analysis of PWM Buck Converter for DCM

Equivalent circuits for the PWM buck converter operating in the DCM are depicted in Figure 2.18. Idealized currentand voltage waveforms are shown in Figure 2.19. At time t = 0 when the switch is turned on, the inductor current iszero. For the time interval 0 < t ≤ DT , the switch is on and the diode is off as depicted in Figure 2.18(b). The voltageacross the diode is −VI . The voltage across the inductor is VI − VO, which causes the inductor current to increase


24 25 26 27 28 29 30 31 3291

92

93

94

95

96

97

98

VI (V)

η (

%)

RL = 12 Ω

2.4 Ω

1.2 Ω

Figure 2.12 Efficiency 𝜂 of the designed buck converter as a function of dc input voltage VI for CCM at RL = 1.2 Ω,2.4 Ω, and 12 Ω.

24 25 26 27 28 29 30 31 320.38

0.4

0.42

0.44

0.46

0.48

0.5

0.52

0.54

0.56

VI (V)

D

12 Ω

2.4 Ω

RL = 1.2 Ω

Figure 2.13 Duty cycle D of the designed buck converter as a function of dc input voltage VI for CCM at RL = 1.2 Ω,2.4 Ω, and 12 Ω.


1 2 3 4 5 6 7 8 9 1091

92

93

94

95

96

97

98

IO

(A)

η (

%)

VI = 24 V

28 V

32 V

Figure 2.14 Efficiency 𝜂 of the designed buck converter as a function of load current IO for CCM at VI = 24 V, 28 V,and 32 V.

1 2 3 4 5 6 7 8 9 100.38

0.4

0.42

0.44

0.46

0.48

0.5

0.52

0.54

0.56

IO

(A)

D

VI = 24 V

28 V

32 V

Figure 2.15 Duty cycle D of the designed buck converter as a function of load current IO for CCM at VI = 24 V, 28 V,and 32 V.


1 2 3 4 5 6 7 8 9 10 11 1291

92

93

94

95

96

97

98

RL (Ω)

η (

%)

VI = 24 V

28 V

32 V

Figure 2.16 Efficiency 𝜂 of the designed buck converter as a function of load resistance RL for CCM at VI = 24 V, 28V, and 32 V.

1 2 3 4 5 6 7 8 9 10 11 120.38

0.4

0.42

0.44

0.46

0.48

0.5

0.52

0.54

0.56

RL (Ω)

D

VI = 24 V

28 V

32 V

Figure 2.17 Duty cycle D of the designed buck converter as a function of load resistance RL for CCM at VI = 24 V, 28V, and 32 V.


(a)

L

iL

+VORLCiDVI

L

vL+

(c)

+VORLC

vGS+VI D1

S

iLiS

+VORLC

+vD

vL+

VI

L

(b)

+VORLC

+vDVI

(d)

vS+

vS+

Figure 2.18 PWM buck converter and its ideal equivalent circuits for DCM. (a) Circuit. (b) Equivalent circuit whenthe switch is ON and the diode is OFF. (c) Equivalent circuit when the switch is OFF and the diode is ON. (d) Equivalentcircuit when both the switch and the diode are OFF.

linearly from zero. At time t = DT , the switch is turned off and the inductor current is diverted from the switch tothe freewheeling diode. The equivalent circuit is shown in Figure 2.18(c) for time interval DT < t ≤ (D + D1)T .The voltage across the switch is VI . The voltage across the inductor is −VO, causing the inductor current to decreaselinearly. This current flows through the diode. At time t = (D + D1)T , the diode current reaches zero and the diodebegins to turn off. Since the diode cannot conduct negative current (neglecting the reverse-recovery current), theinductor current remains zero until the switch is turned on at time t = T . Figure 2.18(d) shows the equivalent circuitfor time interval (D + D1)T < t ≤ T . The voltage across the inductor is zero because its current is constant andequals zero. At time t = T , the switch is turned on and the inductor current increases from zero.

2.3.1 Time Interval: 0 < t ≤ DT

During this time interval, the switch is on and the diode is off. The equivalent circuit is shown in Figure 2.18(b).The switch voltage vS and the diode current iD are zero. The voltage across the inductor L is

vL = VI − VO = LdiLdt

, iL(0) = 0. (2.213)

Hence, the current through the inductor and switch is

iS = iL = 1L ∫

t

0vLdt = 1

L ∫

t

0(VI − VO)dt =

VI − VO

Lt. (2.214)


VOt

vL

0

t

t

iS

0

iL

0

Δ iL

t

t

iD

IDM

vD

VI

ID

A+

A−

VO

L

DT t

IO

ISM

IS

0

0

vS

0

D1T D2T

VI VO

L

VI

VO

VOVI

VOVI

vGS

0DT t

DT

T

T

T

T

T

T

T

DT

DT

DT

DT

Figure 2.19 Idealized current and voltage waveforms in the PWM buck converter for DCM.


Thus, the peak current through the switch and inductor is

ISM = ΔiL = iL(DT) =(VI − VO)DT

L=

(VI − VO)D

fsL. (2.215)

The voltage across the diode is

vD = −VI . (2.216)

The end of this time interval occurs when the switch is turned off by the driver.

2.3.2 Time Interval: DT < t ≤ (D + D1)T

The equivalent circuit for this time interval is shown in Figure 2.18(c). The switch is off and the diode is on.Hence, iS = 0 and vD = 0. The voltage across the inductor L is

vL = −VO = LdiLdt

(2.217)

and the inductor and diode currents are obtained using (2.215)

iD = iL = 1L ∫

t

DTvLdt + iL(DT) = 1

L ∫

t

DT(−VO)dt + iL(DT)

= −VO

L(t − DT) + iL(DT) = −

VO

L(t − DT) +

(VI − VO)DT

L. (2.218)

These currents can also be derived as

iD = iL = 1L ∫

t

(D+D1)TvLdt = 1

L ∫

t

(D+D1)T(−VO)dt = −

VO

L[t − (D + D1)T]

= −VO

L(t − DT) +

VOD1T

L= −

VO

L(t − DT) + iL(DT). (2.219)

Hence, the diode and inductor peak currents are found as

IDM = ΔiL = iL(DT) =D1VO

fsL(2.220)

or

IDM = ΔiL = 1L ∫

DT

(D+D1)TvLdt = 1

L ∫

DT

(D+D1)T(−VO)dt =

VOD1T

L=

VOD1

fsL. (2.221)

The peak voltage across the switch is

VSM = VI . (2.222)

This time interval ends when the diode current reaches zero.

2.3.3 Time Interval: (D + D1)T < t ≤ T

During this time interval, both the switch and the diode are off. The equivalent circuit is shown in Figure 2.18(d).The inductor current iL, the inductor voltage vL, the switch current iS, and the diode current iD are zero. The voltageacross the switch is

vS = VI − VO (2.223)


and the voltage across the diode is

vD = −VO. (2.224)

This time interval ends when the switch is turned on by the driver.

2.3.4 Device Stresses for DCM

Using (2.7) and (2.15), one obtains the voltage stress of the switch and the diode in DCM for steady-state operation

VSMmax = VDMmax = VImax. (2.225)

From (2.215), the current stress of the switch and the diode in DCM for steady-state operation is

ISMmax = IDMmax = ΔiLmax =(VImax − VO)Dmin

fsL. (2.226)

2.3.5 DC Voltage Transfer Function for DCM

Referring to Figure 2.19 and using the volt-second balance principle, A+ = A−. Hence,

(VI − VO)DT = VOD1T (2.227)

which leads to

MV DC =VO

VI= D

D + D1. (2.228)

From (2.215) and (2.228), the peak-to-peak value of the inductor current is

ΔiL =(VI − VO)DT

L=

VOD(1 − MV DC)

fsLMV DC. (2.229)

The dc output current is equal to the average value of the inductor current

IO = 1T ∫

T

0iLdt =

(D + D1)ΔiL2

=VOD(D + D1)(1 − MV DC)

2fsLMV DC. (2.230)

Substitution of (2.228) into (2.230) yields

IO =VOD2(1 − MV DC)

2fsLM2V DC

=VO

RL(2.231)

which can be rearranged to the form

D =

√2fsLM2

V DCIO

(1 − MV DC)VO=

√2fsLM2

V DC

RL(1 − MV DC)for D ≤ 1 −

2fsL

RL= 1 −

2fsLIO

VO. (2.232)

Thus, the duty cycle D increases with increasing IO when VO and MV DC (or VI) are held constant. The inductancerequired to obtain a desired dc voltage transfer function at given values of D, RL, and fs is

L =D2RL(1 − MV DC)

2fsM2V DC

. (2.233)

At the boundary between CCM and DCM,

MV DCB = DB (2.234)


0 0.2 0.4 0.6 0.8 10

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

IO /(VO/2fsL)

D

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

MVDC

= 0.9

CCMDCM

Figure 2.20 Duty cycle D as a function of the normalized load current IO∕(VO∕2fsL) at various values of MV DC for thelossless buck converter.

as in CCM. Substitution of this into (2.232) yields the duty cycle DB at the boundary

MV DCB = DB = 1 −2fsL

RL= 1 −

2fsLIO

VO. (2.235)

As the normalized load current IO∕(VO∕2fsL) is increased from 0 to 1, the boundary duty cycle DB decreases from1 to 0. At D close to 1, the converter operates in CCM practically at any load. At D close to zero, there is a largeload range in which the converter operates in DCM. Figures 2.20 and 2.21 show plots of D versus normalized loadcurrent IO∕(VO∕2fsL) and normalized load resistance RL∕(2fsL) at various values of MV DC for both CCM and DCMfor the lossless buck converter, respectively.

Rearranging (2.232), one obtains

2fsL

D2RL

M2V DC + MV DC − 1 = 0. (2.236)

Solving this equation for MV DC gives

MV DC = 2

1 +√

1 + 8fsL

D2RL

= 2

1 +√

1 + 8fsLIO

D2VO

for MV DC ≤ 1 −2fsL

RL= 1 −

2fsLIO

VO. (2.237)

The dc voltage transfer function depends on the load resistance RL for DCM. Figures 2.22 and 2.23 display MV DCversus normalized load current IO∕(VO∕2fsL) and normalized load resistance RL∕(2fsL) at various values of D forboth CCM and DCM for the lossless buck converter, respectively.


100

101

102

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

D

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

MVDC

= 0.9

CCM

DCM

RL/(2fsL)

Figure 2.21 Duty cycle D as a function of the normalized load resistance RL∕(2fsL) at various values of MV DC for thelossless buck converter.

0 0.2 0.4 0.6 0.8 10

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

MV

DC

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

D = 0.9

CCM

DCM

IO /(VO/2fsL)

Figure 2.22 DC voltage transfer function MV DC as a function of the normalized load current IO∕(VO∕2fsL) at fixedvalues of D for the lossless buck converter.


100

101

102

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

MV

DC

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

D = 0.9

CCM

DCM

RL/(2fsL)

Figure 2.23 DC voltage transfer function MV DC as a function of the normalized load resistance RL∕(2fsL) at fixed valuesof D for the lossless buck converter.

Using (2.228) and (2.237), D1 can be expressed in terms of D, RL, fs, and L as

D1 = D

(1

MV DC− 1

)= D

2

(√1 +

8fsL

D2RL

− 1

). (2.238)

It can be seen that D1 depends on D, RL, L, and fs.

2.3.6 Maximum Inductance for DCM

Figure 2.24 shows the waveforms of the inductor current at the boundary between DCM and CCM for VI = VIminand VI = VImax. Using (2.39), the minimum value of the inductor peak current at the boundary between DCM andCCM is

ΔiLmin =VImax − VO(DBmax)

fsLmax=

VO(1 − DBmax)

fsLmax. (2.239)

iL

Lmin

IOB

0 DminT T t

VImax VO

LVImin VO

L

DmaxT

VO

LΔ i

Figure 2.24 Waveforms of the inductor current at the boundary between DCM and CCM for VI = VImin and VI = VImax.


Therefore, the dc output current at the boundary can be expressed as

IOB = IOmax =ΔiLmin

2=

VO(1 − DBmax)

2fsLmax=

VO

RLmin(2.240)

which yields

Lmax =RLmin(1 − DBmax)

2fs(2.241)

where DBmax is the maximum duty cycle at the boundary between the CCM and DCM modes for the lossy buckconverter and is given by

DBmax =MV DCmax

𝜂=

VO

𝜂VImin. (2.242)

The dwell-duty cycle is

Dw = 1 − Dmax − D1min = 1 − Dmin − D1max = 1 − Dmax −Dmax

MV DCmax+ Dmax = 1 −

Dmax

MV DCmax

= 1 −

√2fsLmax

𝜂RLmin(1 − MV DCmax). (2.243)

Hence, the maximum inductance for a given dwell-duty cycle is

Lmax =𝜂RLmin(1 − MV DCmax)(1 − Dw)2

2fs. (2.244)

For example, for RLmin = 1.2 Ω, MV DCmax = 0.5, fs = 100 kHz, 𝜂 = 0.9, and Dw = 0.05, we get Lmax = 2.4368 𝜇H.The filter capacitor can be designed using the same approach as that for CCM. The maximum ripple voltage

occurs at full power, for which the inductor waveform is close to that of the boundary between the DCM and CCM.

2.3.7 Power Losses and Efficiency of Buck Converter for DCM

Substitution of (2.228) into (2.229) yields the inductor, switch, and diode peak current

ΔiL = ISM = IDM =DVO

fsL

(1

MV DC− 1

)= VO

√2(1 − MV DC)

fsLRL. (2.245)

Using this expression, one obtains the rms value of the switch current

ISrms =

√1T ∫

DT

0i2Sdt = ΔiL

√D3

= VO

√√√√ 23RL

√2M2

V DC(1 − MV DC)

fsLRL(2.246)

and the conduction loss in the MOSFET

PrDS = rDSI2Srms =

rDSDΔi2L3

=2rDS

3

√2M2

V DC(1 − MV DC)

fsLRLPO. (2.247)


Psw = fsCoV2I =

fsCoV2O

M2V DC

=fsCoRL

M2V DC

PO. (2.248)


The total power loss in the MOSFET is

PFET = PrDS +Psw

2=

⎡⎢⎢⎣2rDS

3

√2M2

V DC(1 − MV DC)

fsLRL+

fsCoRL

2M2V DC

⎤⎥⎥⎦PO. (2.249)

Using (2.238) and (2.245), one arrives at the rms value of the diode current

IDrms =

√1T ∫

(D+D1)T

DTi2Ddt = ΔiL

√D1

3= VO

√√√√ 23RL

√2(1 − MV DC)3

fsLRL(2.250)

which gives the diode conduction loss due to RF

PRF = RFI2Drms =

D1RFΔi2L3

=2RF

3

√2(1 − MV DC)3

fsLRLPO. (2.251)

Using (2.218), (2.230), (2.238), and (2.245), one obtains the average diode current

ID = 1T ∫

T

0iDdt =

D2VO

2fsL

(1

MV DC− 1

)2

= IO(1 − MV DC) (2.252)

resulting in the diode conduction loss due to VF

PVF = VFID = VFIO(1 − MV DC) =VF(1 − MV DC)

VOPO. (2.253)

Hence, the overall diode conduction loss is

PD = PVF + PRF =⎡⎢⎢⎣

VF(1 − MV DC)

VO+

2RF

3

√2(1 − MV DC)3

fsLRL

⎤⎥⎥⎦PO. (2.254)

Using (2.238) and (2.245), one obtains the rms value of the inductor current

ILrms =

√1T ∫

(D+D1)T

0i2Ldt = ΔiL

√D + D1

3= ΔiL

√1 − Dw

3= VO

√√√√ 23RL

√2(1 − MV DC)

fsLRL(2.255)

which leads to the power loss in the inductor ESR

PrL = rLI2Lrms =

rLΔi2L(D + D1)

3=

rLΔi2L(1 − Dw)

3=

2rL

3

√2(1 − MV DC)

fsLRLPO. (2.256)

Neglecting the power loss in the ESR of the filter capacitor, the total converter power loss is given by

PLS = PrDS + Psw + PD + PrL =⎡⎢⎢⎣

2rDS

3

√2M2

V DC(1 − MV DC)

fsLRL+

fsCoRL

M2V DC

+2RF

3

√2(1 − MV DC)3

fsLRL

+VF(1 − MV DC)

VO+

2rL

3

√2(1 − MV DC)

fsLRL

]PO. (2.257)

The efficiency of the buck converter in DCM is defined as

𝜂 ≡PO

PI=

PO

PO + PLS= 1

1 + PLS

PO

(2.258)


which gives

𝜂 =[

1 +2rDS

3

√2M2

V DC(1 − MV DC)

fsLRL+

fsCoRL

M2V DC

+2RF

3

√2(1 − MV DC)3

fsLRL+

VF(1 − MV DC)

VO

+2rL

3

√2(1 − MV DC)

fsLRL

]−1

. (2.259)

The dc input current of the converter is described by

II =1T ∫

DT

0iSdt = 1

T ∫

DT

0

(VI − VO)t

Ldt =

D2(VI − VO)

2fsL(2.260)

yielding the dc input power

PI = VIII =D2VI(VI − VO)

2fsL=

D2V2I

(1 − VO

VI

)2fsL

=D2V2

I

(1 − MV DC

)2fsL

. (2.261)

The dc output power is

PO =V2

O

RL. (2.262)

Hence, the efficiency of the buck converter operating in DCM is given by

𝜂 =PO

PI=

2fsLV2O

D2V2I (1 − MV DC)

=2fsLM2

V DC

D2RL(1 − MV DC). (2.263)

The duty cycle

D =

√2fsLM2

V DCIO

𝜂VO(1 − MV DC)=

√2fsLM2

V DC

𝜂RL(1 − MV DC)for D < 1 −

2fsL

RL= 1 −

2fsLIO

VO(2.264)

and the dc voltage transfer function of the lossy buck converter for DCM

MV DC = 2

1 +√

1 + 8fsL

𝜂D2RL

= 2

1 +√

1 + 8fsLIO

𝜂D2VO

for D < 1 −2fsL

RL= 1 −

2fsLIO

VO. (2.265)

At the boundary between DCM and CCM, D = D1 = 0.5, and ΔiL∕IO = 2. Hence, the power loss in the inductorwinding is given by

PrL = rLI2Lrms = rL

[1 + 1

3

(ΔiLIO

)2]= PO

(1 + 1

3× 22

)= 2.3333PO. (2.266)

2.3.8 Design of Buck Converter for DCM

Design a PWM buck converter to meet the following specifications: POmin = 0, POmax = 120 W, VO = 12 V,VImin = 24 V, VInom = 28 V, VImax = 32 V, fs = 100 kHz, and Vr∕VO ≤ 6%.

The maximum load current is

IOmax =POmax

VO= 120

12= 10 A (2.267)


and the minimum load resistance is

RLmin =VO

IOmax= 12

10= 1.2 Ω. (2.268)

The dc voltage transfer functions are

MV DCmin =VO

VImax= 12

32= 0.375 (2.269)

MV DCnom =VO

VInom= 12

28= 0.4286 (2.270)

and

MV DCmax =VO

VImin= 12

24= 0.5. (2.271)

Let us assume 𝜂 = 0.9. The maximum duty cycle at the boundary between CCM and DCM at full load RLmin =1.2 Ω occurs at VImin = 24 V

DBmax =MV DCmax

𝜂=

VO

𝜂VImin= 12

0.9 × 24= 0.5556 (2.272)

resulting in the maximum inductance required for DCM operation

Lmax =RLmin(1 − DBmax)

2fs= 1.2 × (1 − 0.5556)

2 × 100 × 103= 2.6665 𝜇H. (2.273)

Pick L = 2.4 𝜇H. The maximum duty cycle at RLmin = 1.2 Ω, VImin = 24 V, and L = 2.4 𝜇H is

Dmax =

√2fsLM2

V DCmax

𝜂RLmin(1 − MV DCmax)=

√2 × 100 × 103 × 2.4 × 10−6 × 0.52

0.9 × 1.2 × (1 − 0.5)= 0.4714 (2.274)

D1min = Dmax

(1

MV DCmax− 1

)= 0.4714 ×

( 10.5

− 1)= 0.4714 (2.275)

and

Dmax + D1min = 0.4714 + 0.4714 = 0.9428 < 1. (2.276)

The nominal duty cycle at RLmin = 1.2 Ω and VInom = 28 V is

Dnom =

√2fsLM2

V DCnom

𝜂RLmin(1 − MV DCnom)=

√2 × 100 × 103 × 2.4 × 10−6 × 0.42862

0.9 × 1.2 × (1 − 0.4286)= 0.378 (2.277)

D1nom = Dnom

(1

MV DCnom− 1

)= 0.378 ×

( 10.4286

− 1)= 0.5039 (2.278)

and

Dnom + D1nom = 0.378 + 0.5039 = 0.8819 < 1. (2.279)


The minimum duty cycle at RLmin = 1.2 Ω and VImax = 32 V is

Dmin =

√2fsLM2

V DCmin

𝜂RLmin(1 − MV DCmin)=

√2 × 100 × 103 × 2.4 × 10−6 × 0.3752

0.9 × 1.2 × (1 − 0.375)= 0.3162 (2.280)

D1max = Dmin

(1

MV DCmin− 1

)= 0.3162 ×

( 10.375

− 1)= 0.527 (2.281)

and

Dmin + D1max = 0.3162 + 0.527 = 0.8432 < 1. (2.282)

The maximum peak switch, diode, and inductor current occurs at RLmin = 1.2 Ω and VImax = 32 V and is foundas

ISMmax = IDMmax = ΔiLmax =Dmin(VImax − VO)

fsL= 0.3162 × (32 − 12)

100 × 103 × 2.4 × 10−6= 26.35 A. (2.283)

The maximum switch and diode voltage stress is

VSMmax = VDMmax = VImax = 32 V. (2.284)

Let us choose an IRF150 power MOSFET with VDSS = 100 V, ISM = 40 A, rDS = 0.055 Ω, Co = 100 pF, andQg = 63 nC. In addition, we select an MBR4040 Schottky diode with VDM = 40 V, IDM = 40 A, VF = 0.4 V, andRF = 25 mΩ.

The ripple voltage is

Vr = 0.06VO = 0.06 × 12 = 720 mV. (2.285)

The minimum filter capacitor ESR is

rCmax =Vr

ΔiLmax= 720

26.35= 27.32 mΩ. (2.286)

Pick rC = 25 mΩ. The minimum filter capacitance is

Cmin = 12rCfs

= 12 × 0.025 × 100 × 103

= 200 𝜇F. (2.287)

Pick C = 220 𝜇F/25 V/25 mΩ.Let us estimate the power losses in various components at RLmin = 1.2 Ω and VImin = 24 V. The conduction power

loss in the MOSFET is

PrDS =2rDS

3

√2M2

V DCmax(1 − MV DCmax)

fsLRLminPOmax =

2 × 0.0553

√2 × 0.52 × (1 − 0.5)

100 × 103 × 2.4 × 10−6 × 1.2× 120 = 4.1 W.

(2.288)


Psw = fsCoV2Imin = 100 × 103 × 100 × 10−12 × 242 = 0.006 W. (2.289)

Hence, the total power loss in the MOSFET is

PFET = PrDS +Psw

2= 4.1 + 0.003 = 4.103 W. (2.290)


The diode conduction loss due to RF is

PRF =2RF

3

√2(1 − MV DCmax)3

fsLRLminPOmax =

2 × 0.0253

√2 × (1 − 0.5)3

100 × 103 × 2.4 × 10−6 × 1.2× 120 = 1.864 W. (2.291)

The power loss in the diode due to VF is

PVF = VFIOmax(1 − MV DCmax) = 0.4 × 10 × (1 − 0.5) = 2 W. (2.292)

Hence, the overall diode conduction loss is

PD = PRF + PVF = 1.864 + 2 = 3.864 W. (2.293)

Assuming rL = 0.05 Ω, the power loss in the inductor ESR is

PrL =2rL

3

√2(1 − MV DCmax)

fsLRLminPOmax =

2 × 0.053

√2 × (1 − 0.5)

100 × 103 × 2.4 × 10−6 × 1.2× 120 = 7.454 W. (2.294)

The total power loss is

PLS = PrDS + Psw + PD + PrL = 4.1 + 0.006 + 3.864 + 7.454 = 15.424 W (2.295)

resulting in the converter efficiency

𝜂 =PO

PO + PLS= 120

120 + 15.424= 88.61%. (2.296)

Assuming the gate-to-source peak-to-peak voltage VGSm = 8 V, the MOSFET gate-drive power is

PG = fsQgVGSm = 100 × 103 × 63 × 10−9 × 8 = 50.4 mW. (2.297)

The converter efficiency 𝜂 can be computed from (2.258) and the duty cycle D from (2.264). Figures 2.25 and2.26 depict plots of the converter efficiency 𝜂 and the duty cycle D as functions of the DC input voltage VI at fixedload resistances RL, respectively, at rDS = 55 mΩ, RF = 25 mΩ, VF = 0.4 V, rL = 50 mΩ, rC = 25 mΩ, L = 2.4 𝜇H,Co = 100 pF, and fs = 100 kHz. It can be seen that the efficiency 𝜂 decreases as the input voltage VI increases.Figures 2.27 through 2.30 show plots of the converter efficiency 𝜂 and duty cycle D versus the load current IO andthe load resistance RL for DCM at fixed values of the dc input voltage VI . The efficiency decreases with respect toIO and increases with respect to RL.

2.4 Buck Converter with Input Filter

The disadvantage of the buck converter topology shown in Figure 2.1(a) is discontinuous and pulsating input currentwaveform because the switch is connected in series with the input voltage source. The input current flows whenthe switch is closed and is abruptly interrupted when the switch is opened. In order to obtain a continuous inputcurrent, a second-order L1-C1 low-pass filter can be added at the input of the converter, as depicted in Figure 2.31.

2.5 Buck Converter with Synchronous Rectifier

A buck converter topology with a synchronous rectifier is shown in Figure 2.32(a). This circuit is obtainedby replacing the diode with an n-channel MOSFET. In general, diodes have an offset voltage VF and may becomparable to the output voltage in low-voltage applications. In contrast, MOSFETs do not have an offset voltage.If the on-resistance of a MOSFET is low, the forward voltage drop across the MOSFET is very low, reducing theconduction loss and yielding high efficiency. Some low-breakdown voltage MOSFETs have the on-resistance rDS


24 25 26 27 28 29 30 31 3287

88

89

90

91

92

93

94

95

VI (V)

(

%)

RL = 1.2 Ω

RL = 2.4 Ω

RL = 12 Ω

η

Figure 2.25 Efficiency 𝜂 as a function of the DC input voltage VI for the buck converter given in the design examplefor DCM at RL = 1.2 Ω, 2.4 Ω, and 12 Ω.

24 25 26 27 28 29 30 31 320.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

VI (V)

D

RL = 1.2 Ω

RL = 2.4 Ω

RL = 12 Ω

Figure 2.26 Duty cycle D as a function of the dc input voltage VI for the buck converter given in the design examplefor DCM at RL = 1.2 Ω, 2.4 Ω, and 12 Ω.


0 1 2 3 4 5 6 7 8 9 1087

88

89

90

91

92

93

94

95

96

97

IO (A)

η (

%)

VI = 24 V

VI = 28 V

VI = 32 V

Figure 2.27 Efficiency 𝜂 of the buck converter as a function of the load current IO for DCM at VI = 24 V, 28 V, and32 V.

0 1 2 3 4 5 6 7 8 9 100

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

IO

(A)

D

VI = 24 V

VI = 28 V V

I = 32 V

Figure 2.28 Duty cycle D of the buck converter as a function of the load current IO for DCM at VI = 24 V, 28 V, and32 V.


1 2 3 4 5 6 7 8 9 10 11 1287

88

89

90

91

92

93

94

95

RL (Ω)

(

%)

VI = 24 V

VI = 28 V

VI = 32 V

η

Figure 2.29 Efficiency 𝜂 of the buck converter as a function of load resistance RL for DCM at VI = 24 V, 28 V, and32 V.

1 2 3 4 5 6 7 8 9 10 11 120.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

RL (Ω)

D

VI = 24 V

VI = 28 V

VI = 32 V

Figure 2.30 Duty cycle D of the buck converter as a function of load resistance RL for DCM at VI = 24 V, 28 V, and32 V.


+VORL

vGS+VI C2

L2L1

C1

Figure 2.31 Buck converter with an input L1-C1 low-pass filter.

as low as 6 mΩ. In addition, operation in DCM can be avoided because the channel of the transistor can conductcurrent in both directions. The synchronous buck converter operates in CCM from no load to full load.

The two MOSFETs are driven in a complimentary manner. The low side n-channel MOSFET replaces a Schottkydiode and operates in the third quadrant because the current normally flows from source to drain. When both thetransistors are n-channel MOSFETs, it is difficult to drive the upper MOSFET because both the gate and the sourceare connected to “hot” points. One solution is to use a transformer with one primary winding and two secondarywindings. The primary winding is connected to a driver, for example, an integrated circuit (IC) driver. Onetransformer output is noninverting and the other transformer output is inverting. The synchronous buck convertersuffers from cross-conduction (or shoot-through) effect, resulting in high current spikes in both transistors. Thisproduces high losses and reduces the efficiency. A nonoverlapping driver can produce a dead time and reducethe cross-conduction loss. During the dead time periods, the inductor current flows through the lower MOSFETbody diode. This body diode has a very slow reverse recovery characteristic that can adversely affect the converterefficiency. An external Schottky diode can be connected in parallel with the low-side MOSFET to shunt the bodydiode and to prevent it from affecting the converter performance. The added Schottky diode can have a much lower

+VORLC

VI

L

+VORLC

VI

L

(a)

(b)

Figure 2.32 Buck converter with a synchronous rectifier. (a) With two n-channel MOSFETs. (b) CMOS buck converter.


+VOR

VI

L

C

Figure 2.33 Synchronous buck converter with a transformer driver.

current rating than the diode in the conventional nonsynchronous buck converter because it only conducts duringthe small dead time when both MOSFETs are off.

If the upper MOSFET is a PMOS and the lower MOSFET is an NMOS, then the circuit is similar to a digitalCMOS inverter, as shown in Figure 2.32(b). In this case, both transistors can be driven by the same gate-to-sourcevoltage. The peak-to-peak gate-to-source voltage should be equal or close to the dc input voltage VI . Therefore,the CMOS buck synchronous converter is a good topology for applications with a low dc voltage VI . The wholeconverter can be integrated, except for the filter capacitor C. The PMOS transistor has larger capacitances becauseit must have larger area due to lower mobility of holes.

At a high voltage VI , the peak-to-peak gate-to-source voltage is high and may break the MOSFET gate. Thesame gate-to-drive voltage may cause cross-conduction of both transistors, generating high spikes and drasticallyreducing the converter efficiency. A dead time will reduce the current spikes, but this requires two nonoverlappinggate-to-source voltages to drive the MOSFETs.

The synchronous buck converter is especially attractive in power supplies with a very low output voltage (e.g.,VO = 3.3 V or VO = 1 V) and/or a wide load range, including operation from no-load to full-load. Its main advantageis higher efficiency than that of the conventional buck converter. The synchronous buck converter may be used asa bidirectional converter.

Figure 2.33 shows a synchronous buck converter with a transformer driver. If both MOSFETs are n-channeldevices, then the upper output of the transformer should be noninverting and the other should be inverting. Ifthe upper transistor is a PMOS and the bottom transistor is an NMOS, then both transformer outputs should benoninverting or inverting.

Figure 2.34 shows a synchronous buck converter with a voltage mirror driver. The voltage mirror driver acts asa voltage shifter for the ac voltage waveform so that the gate-to-source voltage of the n-channel MOSFET is thesame as the source-to-gate voltage of the p-channel MOSFET. Unlike in the CMOS synchronous buck converter,the peak-to-peak voltage of the gate-to-source voltage can be lower than the dc input voltage VI . Therefore, thisdriver is good for applications with high values of VI .

+VORC

VI

LCb

Figure 2.34 Synchronous buck converter with a voltage mirror driver.


The minimum inductance for the synchronous converter is limited only by the inductor current. For CCM, themaximum inductor current ripple is


fsLmin. (2.298)

Hence, the minimum inductance is given by

Lmin =VO(1 − Dmin)

fsΔiLmax=

(1 − Dmin)RLmin

fsΔiLmax∕IOmax. (2.299)

The choice between synchronous rectification and Schottky diode rectification is as follows. Synchronousrectifiers should be used for VO ≤ 2 V, fs ≤ 300 kHz, and 10 A ≤ IO ≤ 100 A. Schottky diodes should be used forVO > 5 V and fs > 1 MHz, IO < 10 A, and IO > 100 A.

The efficiency of the buck converter with synchronous rectifier is

𝜂 =PO

PI= 1

1 + DrDS1+(1−D)rDS2+rL

RL

[1 + 1

12

(ΔiLIO

)2]+ 2fsCoRL

M2V DC

+ rCRL(1−D)2

12f 2s L2

, (2.300)

where ΔiL = VO(1 − D)∕(fsL) = D(1 − D)VI∕(fsL) and ΔiL∕IO = RL(1 − D)∕(fsL) = RL(1 − VO∕VI)∕fsL = (1 −VO∕VI)VO∕(fsLIO). If rDS1 = rDS2, the converter efficiency becomes

𝜂 = 1

1 + rDS+rL

RL

[1 + 1

12

(ΔiLIO

)2]+ 2fsCoRL

M2V DC

+ rCRL(1−D)2

12f 2s L2

= 1

1 + (rDS+rL)IO

VO

[1 + 1

12

(ΔiLIO

)2]+ 2fsCoVO

IO(VO∕VI )2+ rCVO(1−D)2

12f 2s L2IO

= 1

1 + (rDS+rL)PO

V2O

[1 + 1

12

(ΔiLRL

VO

)2]+ 2fsCoV2

O

PO(VO∕VI )2+ rCV2

O(1−D)2

12f 2s L2PO

= 1

1 + rDS+rL

RL

[1 + 1

12

(ΔiLRL

DVI

)2]+ 2fsCoRL

D2+ rCRL(1−D)2

12f 2s L2

.

(2.301)

Figures 2.35, 2.36, and 2.37 show the efficiency 𝜂 of the buck converter with synchronous rectifier as functionsof the load current IO, the load resistance RL, and the output power PO, respectively, at VO = 12 V, VI = 28 V,rDS = 55 mΩ, rL = rC = 50 mΩ, D = 0.506, MV DC = 0.43, fs = 100 kHz, and Co = 100 pF. The inductor currentripple is ΔiL = VO(1 − D)∕(fsL) = 12 × (1 − 0.506)∕(105 × 40 × 10−6) = 1.482 A. It can be observed that theconverter efficiency 𝜂 decreases for low values of load current IO ≤ 0.2 A, which corresponds to large values ofload resistance RL ≥ 60 Ω and low values of output power PO ≤ 24 mW.

The dc voltage transfer function is

MV DC =VO

VI= 𝜂D = D

1 + rDS+rL

RL

[1 + 1

12

(ΔiLIO

)2]+ 2fsCoRL

M2V DC

+ rCRL(1−D)2

12f 2s L2

= D

1 + (rDS+rL)IO

VO

[1 + 1

12

(ΔiLIO

)2]+ 2fsCoVO

IO(VO∕VI )2+ rCVO(1−D)2

12f 2s L2IO

= D

1 + (rDS+rL)PO

V2O

[1 + 1

12

(ΔiLPO

VO

)2]+ 2fsCoV2

O

PO(VO∕VI )2+ rCV2

O(1−D)2

12f 2s L2PO

= D

1 + rDS+rL

RL

[1 + 1

12

(ΔiLRL

DVI

)2]+ 2fsCoRL

D2+ rCRL(1−D)2

12f 2s L2

. (2.302)


0 2 4 6 8 10 1280

82

84

86

88

90

92

94

96

98

100

IO (A)

(

%)

η

Figure 2.35 Efficiency 𝜂 of the buck converter with synchronous rectifier as a function of the load current IO at VI = 28 Vand VO = 12 V.

100

101

102

103

104

105

0

10

20

30

40

50

60

70

80

90

100

RL (Ω)

(

%)

η

Figure 2.36 Efficiency 𝜂 of the buck converter with synchronous rectifier as a function of the load resistance RL atVI = 28 V and VO = 12 V.


0 20 40 60 80 100 12091

92

93

94

95

96

97

98

99

100

PO

(W)

η (

%)

Figure 2.37 Efficiency 𝜂 of the buck converter with synchronous rectifier as a function of the output power PO atVI = 28 V and VO = 12 V.

Figures 2.38 and 2.39 show the efficiency 𝜂 of the buck converter with synchronous rectifier and the voltage transferfunction MV DC as functions of the duty cycle D at the load resistance RL = 1.2 Ω, respectively, at VI = 28 V,rDS = 55 mΩ, rL = rC = 50 mΩ, fs = 100 kHz, and Co = 100 pF.

2.6 Buck Converter with Positive Common Rail

Figure 2.40 shows the derivation of a buck converter topology, in which the positive potential of both the inputand output voltages is common and can be connected to the ground. The classical buck converter with a negativecommon rail is depicted in Figure 2.40(a). Figure 2.40(b) shows the converter circuit with the MOSFET andthe inductor moved to the common rail of Figure 2.40(a). The resulting positive bus is now the common rail.Figure 2.40(c) shows the circuit of Figure 2.40(b) flipped so that the positive rail is at the bottom.

Gate-Drive with Respect to Ground. One of the disadvantages of the buck converter shown in Figure 2.1(a) isthe difficulty of driving the transistor because neither the gate nor the source is connected to the ground. Figure 2.41shows a topology of the buck converter, in which the gate is referenced to ground, but the output of the converter isnot grounded. This topology may be useful in some preliminary laboratory tests of the converter because a simpledriver may be used. It can also be used in applications, where the load is not connected to ground, for example, abulb or an LED with variable brightness.

Figure 2.42 shows a topology of the buck converter, in which both the source of the MOSFET and the output ofthe converter are connected to ground, but it requires a floating power supply.

2.7 Quadratic Buck Converter

In order to increase the range of the conversion ratio, two buck converters can be cascaded. However, thiscircuit requires twice as many components as a single-stage buck converter, which increases the size, weight,


0 0.2 0.4 0.6 0.8 10

10

20

30

40

50

60

70

80

90

100

D

(%

)η

Figure 2.38 Efficiency 𝜂 of the buck converter with synchronous rectifier as a function of duty cycle D at fixed RL = 1.2Ωand VI = 28 V.

0 0.2 0.4 0.6 0.8 10

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

D

MV

DC

Figure 2.39 DC voltage transfer function MV DC of the buck converter with synchronous rectifier as a function of dutycycle D at fixed RL = 1.2 Ω and VI = 28 V.


(a)

(b)

(c)

VOVI

++

VOVI

++

VOVI

++RLC

L

RLCL

RLC

L

Figure 2.40 Derivation of the buck converter topology with the positive common rail. (a) Classical buck converterwith a negative common rail. (b) Buck converter with the MOSFET and the inductor moved to the negative branch,resulting in the positive common rail. (c) Buck converter with a positive common rail.

and cost. A quadratic buck converter [25–28] is shown in Figure 2.43. The dc voltage transfer function of thisconverter is

MV DC =VO

VI= 𝜂D2. (2.303)

The quadratic buck converter contains only one transistor.

+VO

RLC

vGS

+

VI

L

Figure 2.41 Topology of the buck converter with the gate referenced to ground and floating output voltage.


+VORLC

vGS+

VI L

Figure 2.42 Topology of the buck converter in which both the MOSFET source and the converter output are grounded,but this topology requires a floating power supply.

2.8 Tapped-Inductor Buck Converters

The simplest method of extending the range of the dc voltage transfer function MV DC is by replacing the inductorL with a tapped inductor in the basic dc–dc converters. The turns ratio n of the tapped inductor is present in MV DC.It permits to adjust the duty cycle value to achieve high efficiency. Very low and very high values of the duty cyclecan be avoided. Also, the utilization of the switching devices cp and passive devices can be improved.

Tapped-inductor buck converters are shown in Figure 2.44. These circuits are high step-down converters. Thetapped inductor acts as a transformer and its magnetizing inductance acts as an output filter inductor. A magneticcore with an air gap can be used to build the tapped inductor. The tapped inductor may store magnetic energy.

2.8.1 Tapped-Inductor Common-Diode Buck Converter

Consider the common-diode (CD) tapped-inductor buck converter shown in Figure 2.44(a). The voltage transferfunction of the tapped inductor is

n = vvs

=Np + Ns

Ns=

Np

Ns+ 1. (2.304)

When the MOSFET is on and the diode is off,

VI − VO = v = nvs (2.305)

producing the voltage across the Ns winding

vs =VI − VO

n. (2.306)

When the MOSFET is off and the diode is on,

vs = VO. (2.307)

VOVI

+RL

L2

C2D3

L1

C1D1

D2

Figure 2.43 Quadratic buck converter.


VOVI

+RLC

Np Ns

vp+ vs+

v+

(a)

VOVI

+RLC

Np

Ns

vp+

vs+

(b)

+

v

VOVI

+RLC

Np

Ns

vs

+vp

+

(c)

+

v

Figure 2.44 Tapped-inductor buck converters. (a) Tapped-inductor common-diode buck converter. (b) Tapped-inductor common-switch buck converter. (c) Watkins–Johnson (common-source) converter.

Using the volt-second balance for the Ns winding, we obtain the dc voltage transfer function for the common-diodeconverter operating in CCM

MV DC =VO

VI= D

D + n(1 − D). (2.308)

The dc voltage transfer function MV DC versus D for CCM is illustrated in Figure 2.45. The current and voltagestresses are

ISM1 =MV DC

DIO =

(MV DC +

1 − MV DC

n

)IO (2.309)

VSM1 = VI + (n − 1)VO =(

1MV DC

+ n − 1

)VO (2.310)

VSM2 =VI − VO

n+ VO =

(1 + n

M− 1

n

)VO. (2.311)

The magnetizing inductance on the terminals of winding Ns is

Lm =(

Ls

Lp + Ls

)2

L (2.312)

where L = Lp + Ls is the total winding inductance.


0 0.25 0.5 0.75 10

0.2

0.4

0.6

0.8

1

D

MV

DC

n = 1

2

5

10

Figure 2.45 DC voltage transfer function of common-diode tapped-inductor buck converter for CCM.

The circuit has several advantages, such as high voltage conversion ratio, low switch current stress, and lowdiode voltage stress. The main disadvantage of the tapped-inductor buck converter is the effect of the leakageinductance of winding Np. When the upper transistor is turned off, the leakage inductance forms a resonant circuitwith the drain-to-source capacitance of that transistor, causing ringing. This increases the transistor peak voltageand switching loss. A higher voltage transistor is required, which will have a higher on-resistance, resulting in ahigher conduction loss. MOSFET on-resistance rapidly increases with rated breakdown voltage. An active-clamptechnique may be used to reduce the switch peak voltage.

2.8.2 Tapped-Inductor Common-Transistor Buck Converter

Consider the tapped-inductor common-transistor (CT) buck converter shown in Figure 2.44(b). When the MOSFETis on and the diode is off,

vs = VI − VO. (2.313)


v = −VO = nvs (2.314)

resulting in

vs = −VO

n. (2.315)

Applying the volt-second balance, we arrive at the dc voltage transfer function for the common-switch converteroperating in CCM

MV DC =VO

VI= D

D + 1−Dn

. (2.316)

Figure 2.46 shows plots of MV DC as function of D for CCM.


0 0.25 0.5 0.75 10

0.2

0.4

0.6

0.8

1

D

MV

DC

n = 10

5

2

1

Figure 2.46 DC voltage transfer function of tapped-inductor common-switch buck converter for CCM.

2.8.3 Watkins–Johnson Converter

Now, we will analyze the Watkins–Johnson (WJ) converter, which is a tapped-inductor common-source (CS)converter. The converter was named after its inventors, Watkins–Johnson Company. It has been used to powertraveling wave tubes that exhibit a negative input resistance and are used in satellite communications. The circuithas two poles and a single LHP zero. When the MOSFET is on and the diode is off,

vs = VI − VO = vn

(2.317)

yielding

v = n(VI − VO). (2.318)


vp = VI = v − vs = v − vn= v

n − 1n

(2.319)

resulting in

v = nn − 1

VI . (2.320)

Applying the volt-second balance,

n(VI − VO)DT = nn − 1

VI(1 − D)T (2.321)

we get the dc voltage transfer function of the Watkins–Johnson converter for CCM

MV DC =VO

VI= nD − 1

D(n − 1). (2.322)


0 0.25 0.5 0.75 10

0.2

0.4

0.6

0.8

1

D

MV

DC

n = 5 2 1.2

Figure 2.47 DC voltage transfer function of Watkins–Johnson (common-source) tapped-inductor buck converter forCCM.

This function is illustrated in Figure 2.47. A multiple-output Watkins–Johnson converter can be built, for example,VO1 = 3.3 V and VO2 = 14 V [23].

2.9 Multiphase Buck Converter

So far, we have studied a single-phase buck converter. This circuit requires a relatively large filter capacitor toreduce the output voltage ripple. Microprocessors are supplied with a very low voltage and a very high current, forexample, VO = 1.1 V and IO = 100 A. In these applications, there is a stringent requirement on the output voltagetolerance. The output voltage must remain within the required range under dynamic load variations. This imposesrestrictions on the values of the filter inductance and the filter capacitance. A very wide bandwidth is required inAM modulators used in RF transmitters. Multiphase buck converter has a smaller filter capacitor and therefore awider bandwidth.

In a polyphase or multiphase buck converter, two or more single-phase converters are operated in parallel andfeed the same filter capacitor and load resistance, resulting in ripple cancellation. A two-phase buck converter isshown in Figure 2.48. Usually, synchronous rectifiers are used as diodes. Current and voltage waveforms are shownin Figure 2.49 for the two-phase buck converter. In the two-phase buck converter, the drive signals vGS1 and vGS2are shifted by 180. When the individual phases of the converter are switched complimentarily, the output voltageripple reduces considerably due to the ripple cancellation. In a two-phase buck converter, iL1 + iL2 is constant atD = 0.5, yielding a zero ac component. Therefore, the ac component of the current through the filter capacitor isalso zero, resulting in zero ripple voltage. Partial ripple cancellation occurs at D ≠ 0.5.

If n individual phases are operated in parallel, the frequency of the ripple in the output voltage is n times theswitching frequency of each single-phase converter, that is, fr = nfs. The ripple cancellation occurs at D = 1∕n.Due to the reduced magnitude and increased frequency of the output voltage ripple, the required filter capacitanceis reduced significantly. This improves the transient response of the power supply.


iL1

iD2

+VORLC+

vD1

vS2

+

VI

iL1+ iL2 IO

L1

L2

iL2

iS1

iS2iD2

vD2+

+ vS1

Figure 2.48 Two-phase buck converter.

VO

t

t

iL1

t(1– D)

VI

VI

TDT

t

vGS1

t

t

t

vL1

t

VI

t

t

t

t

t

tVI

T

iD1

vS1

+ t

vGS2

vL2

VO

VO

VOVI

iL2

iL1 iL2

iS1

vS2

iS2

vD1

iD2

vD2

VI

T

Figure 2.49 Waveforms in two-phase buck converter.


iL1

iD2

+VORL+

vD1

vS2

+

VI

L1

L2

iL2

iS2

vD2+

CC2

C1

+ vS1

iS1

iD1

Figure 2.50 Two-phase buck converter with two input capacitors.

Figure 2.50 shows a two-phase buck converter, with two large capacitors C1 and C2 at the input. The voltagestresses of the switches in this converter are reduced. The dc voltage transfer function is

MV DC =VO

VI= D

2. (2.323)

2.10 Switched-Inductor Buck Converter

Figure 2.51 shows a circuit of a swithed-inductor buck converter. The dc voltage transfer function of this converterfor CCM is given by

MV DC =VO

VI= D

2 − D. (2.324)

Figure 2.52 shows a plot of a dc voltage transfer function MV DC as a function of duty cycle D.

2.11 Layout

The layout of the converter components is very important from EMI and power loss point of view. The dc current ineach loop distributes to minimize the dc voltage drop around the loop, thus minimizing the dc conduction loss. Theac currents distribute to minimize energy stored in magnetic field for each current harmonic. Thus, the ac currentflows through the path of the lowest inductance.

2.12 Summary

The PWM buck converter is a step-down converter (VO < VI). The buck converter is a transformerless converter. It does not provide dc isolation. It can operate in two modes: CCM or DCM.

+VORLCVI

L1S

L2

Figure 2.51 Switched-inductor buck converter.


0 0.2 0.4 0.6 0.8 10

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

D

MV

DC

Figure 2.52 DC voltage transfer function of switched-inductor buck converter MV DC as a function of the duty cycle D.

The dc voltage transfer function of the buck converter is MV DC = VO∕VI = D for CCM if the losses areneglected. It is independent of the load resistance RL (or the load current IO) and depends only on the switchon-duty cycle D. Therefore, the output voltage VO = DVI is independent of the load resistance RL and dependsonly on the dc input voltage VI and the duty cycle D.

The converter has conduction losses and switching losses. The duty cycle D of the lossy converter is greater than that of the lossless converter at the same dc voltage

transfer function. The peak-to-peak value of the inductor ripple current ΔiL is independent of the dc load current for CCM. The peak-to-peak value of the current through the filter capacitor C is relatively low and is equal to the

peak-to-peak inductor ripple current ΔiL. If the capacitance of the filter capacitor is sufficiently high, the output ripple voltage is determined only by the

ESR of the filter capacitor and is independent of the capacitance of the filter capacitor. In order to reduce theoutput ripple voltage, it is necessary to chose a filter capacitor with a low ESR.

The minimum value of the inductor is determined by the boundary between CCM and DCM, ripple voltage, orac losses in the inductor and the filter capacitor.

A disadvantage of the buck converter is that the input current is pulsating. However, an LC filter can be placedat the converter input to obtain a nonpulsating input current waveform.

The corner frequency of the output filter fo = 1∕(2𝜋√

LC) is independent of the load resistance. It is relatively difficult to drive the transistor because neither the source nor the gate is referenced to ground.

Therefore, a transformer or an optical coupler is required in the driver circuit. For CCM, the maximum conduction loss in the transistor occurs at the maximum load current IOmax and at the

minimum input voltage VImin (i.e., at Dmax). For CCM, the maximum conduction loss in the diode occurs at the maximum load current IOmax and at the

maximum input voltage VImax (i.e., at Dmin).


The dc voltage transfer function MV DC is independent of the inductance L for CCM, whereas MV DC dependson L for DCM.

The minimum efficiency occurs at the full load IOmax (or RLmin) and at VImin for the buck converter operated inboth CCM and DCM.

The peak currents, rms currents, and conduction losses in the switch, diode, and filter capacitor are higher inDCM than those in CCM at the same values of the dc input and output currents and output power. The devicecurrent stresses in DCM are higher than those in CCM by a factor of two or more.

The ESR of the inductor in DCM is usually lower than that in CCM because the inductance is lower. A filter capacitor with a very low ESR is required for the buck converter to achieve a low ripple voltage. The efficiency of the converter in CCM is higher than that in DCM at the same dc input and output currents

and the same switching frequency. Only one-half of the B–H curve of the inductor core is utilized in the buck converter because the dc current

flows through the inductor L.

References

[1] R. D. Middlebrook and S. Cuk, Advances in Switched-Mode Power Conversion, vols. I, II, and III. Pasadena, CA: TESLAco,1981.

[2] E. R. Hnatek, Design of Solid-State Power Supplies, 2nd Ed. New York: Van Nostrand, 1981.[3] K. K. Sum, Switching Power Conversion. New York: Marcel Dekker, 1984.[4] G. Chryssis, High-Frequency Power Supplies: Theory and Design. New York: McGraw-Hill, 1984.[5] R. P. Severns and G. Bloom, Modern DC-to-DC Switchmode Power Converter Circuits. New York: Van Nostrand, 1985.[6] D. M. Mitchell, Switching Regulator Analysis. New York: McGraw-Hill, 1988.[7] K. Billings, Switchmode Power Supply Handbook. New York: McGraw-Hill, 1989.[8] M. H. Rashid, Power Electronics, Circuits, Devices, and Applications, 3rd Ed. Upper Saddle River, NJ: Prentice Hall, 2004.[9] N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics: Converters, Applications and Design, 3rd Ed. New

York: John Wiley & Sons, 2004.[10] J. G. Kassakian, M. F. Schlecht, and G. C. Verghese, Principles of Power Electronics. Reading, MA: Addison-Wesley,

1991.[11] A. I. Pressman, Switching Power Supply Design. New York: McGraw-Hill, 1991.[12] B. M. Bird, K. G. King, and D. A. G. Pedder, An Introduction to Power Electronics. New York, NY: John Wiley & Sons,

1993.[13] D. W. Hart, Introduction to Power Electronics. Upper Saddle River, NJ: Prentice Hall, 1997.[14] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics. Norwell, MA: Kluwer Academic Publisher, 2001.[15] I. Batarseh, Power Electronic Circuits. New York, NY: John Wiley & Sons, 2004.[16] A. Aminian and M. K. Kazimierczuk, Electronic Devices: A Design Approach. Upper Saddle River, NJ: Prentice Hall,

2004.[17] A. Reatti, “Steady-state analysis including parasitic components and switching losses of buck and boost dc-dc converter,”

International Journal of Electronics, vol. 77, no. 5, pp. 679–702, November 1994.[18] M. K. Kazimierczuk, “Reverse recovery of power pn junction diodes,” International Journal of Circuits, Systems, and

Computers, vol. 5, no. 4, pp. 747–755, December 1995.[19] D. A. Grant and Y. Darraman, “Watkins-Johnson converter completes tapped inductor converter matrix,” Electronic Letters,

vol. 39, no. 3, pp. 271–272, February 6, 2003.[20] T. H. Kim, J. H. Park, and B. H. Cho, “Small-signal modeling of the tapped-inductor converter under variable frequency

control,” IEEE Power Electronics Specialists Conference, 2004, pp. 1648–1652.[21] K. Yao, M. Ye, M. Xu, and F. C. Lee, “Tapped-inductor buck converter for high-step-down dc-dc conversion,” IEEE

Transactions on Power Electronics, vol. 20, no. 4, pp. 775–780, July 2005.[22] B. Axelord, Y. Berbovich, and A. Ioinovici, “Switched-capacitor/switched-inductor structure for getting transformerless

hybrid dc-dc PWM converters,” IEEE Transactions on Circuits and Systems, vol. 55, no. 2, pp. 687–696, March 2008.[23] Y. Darroman and A. Ferre, “42-V/3-V Watkins-Johnson converter for automotive use,” IEEE Transactions on Power

Electronics, vol. 21, no. 3, pp. 592–602, May 2006.


[24] D. Czarkowski and M. K. Kazimierczuk, “Static- and dynamic-circuit models of PWM buck-derived converters,” IEEProceedings Part G Devices Circuits and Systems, vol. 139, no. 6, pp. 669–679, December 1992.

[25] D. Maksimovic and S. Cuk, “Switching converters with wide dc conversion range,” IEEE Transactions on Power Electronics,vol. 6, no. 1, pp. 151–157, January 1991.

[26] A. Ayachit and M. K. Kazimierczuk, “Steady-state analysis of PWM quadratic buck converter in CCM,” IEEE MidwestSymposium on Circuits and Systems, Columbus, OH, August 3–7, 2013, pp. 49–52.

[27] A. Ayachit and M. K. Kazimierczuk, “Power losses and efficiency analysis of PWM quadratic buck converter in CCM,”IEEE Midwest Symposium on Circuits and Systems, College Station, TX, August 4–8, 2014.

[28] A. Ayachit and M. K. Kazimierczuk, “Open-loop transfer functions of PWM quadratic buck converter in CCM,” IEEEIndustrial Electronics Society, Dallas, TX, November 2014, pp. 1643–1649.

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9-𝜇s transient recovery time,” IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 59, no. 3, pp. 575–583,March 2012. pp. 687–696, March 2008.

Review Questions

2.1 Define the converter operation in the CCM and the DCM.

2.2 Does the buck converter have a transformer version?

2.3 Is the input current of the basic buck converter pulsating?

2.4 How can the buck circuit be modified to obtain a nonpulsating input current?

2.5 Is the transistor driven with respect to ground in the buck converter?

2.6 How is the dc voltage transfer function MV DC related to the duty cycle D for the lossless buck converteroperated in CCM?

2.7 Is the duty cycle D of the lossy buck converter lower or greater than that of the lossless converter at a givenvalue of MV DC for CCM?

2.8 Does the dc voltage transfer function of the buck converter depend on the load resistance?

2.9 What determines the ripple voltage in the buck converter in CCM?

2.10 Compare the voltage and current stresses for the transistor and the diode in the buck converter for CCM andDCM.

2.11 Is the corner frequency of the output filter dependent on the load resistance in the buck converter?

2.12 Is the efficiency high at heavy or light loads for the buck converter operated in CCM?

2.13 Are both halves of the B–H curve of the inductor core utilized in the buck converter?

Problems

2.1 Derive an expression for the dc voltage transfer function of the lossless buck converter operating in CCMusing the diode voltage waveform.

2.2 A buck converter has VI = 22–32 V, VO = 14 V, IO = 0.2–2 A, and fs = 40 kHz. Find the minimum inductanceL required to maintain the converter operation in the continuous conduction mode.

2.3 For the converter given in Problem 2.2, find the voltage and current stresses of the transistor and diode.


2.4 A buck PWM converter has VI = 10–14 V, VO = 5 V, IO = 0.2–1 A, fs = 200 kHz, L = 100 𝜇H, C = 100 𝜇F,and rC = 20 mΩ. Find the ripple voltage Vr and (Vr∕VO) × 100%. Also, calculate the ripple voltage acrossthe filter capacitance and the corner frequency of the output filter.

2.5 For the converter given in Problem 2.4, the filter capacitance has been reduced to 47 𝜇F. Find the ripplevoltage.

2.6 A PWM converter operates in CCM at VI = 10 V and VO = 5 V. Find the duty cycle D if (a) the converterefficiency 𝜂 = 100% and (b) the converter efficiency 𝜂 = 80%.

2.7 A buck converter operating in CCM has a MOSFET whose rDS = 0.025 Ω. The load current is IO = 10 A.Determine the MOSFET conduction loss at D = 0.1 and 0.9.

2.8 A buck converter operating in CCM has a diode whose RF = 0.025 Ω and VF = 0.3 V. The load current isIO = 10 A. Determine the diode conduction loss at D = 0.1 and 0.9.

2.9 A power MOSFET has VB = 0.75 V, Crss = 30 pF, and Coss = 130 pF at VDS = 25 V. It is used in a buckPWM converter with VI = 400 V and fs = 1 MHz. Find CJ0, Cds(VI), Q(VI), Psw, Pturn-off and Psw(FET).

2.10 A buck converter has VI = 22–32 V, VO = 14 V, IO = 0–2 A, and fs = 40 kHz. Find the maximum inductanceL required to maintain the converter operation in the discontinuous conduction mode. Assume 𝜂 = 90%.

2.11 Design a buck PWM converter to meet the following specifications: VI = 12 V± 4 V, VO = 5 V, IO =1–10 A, Vr∕VO ≤ 1%, fs = 100 kHz, rL(dc) = 50 mΩ, rDS = 10 mΩ, Co = 200 pF, VF = 0.3 V, and RF = 20mΩ.

2.12 Design a universal buck PWM converter to meet the following specifications: VImin = 85√

2 V, VImax =264

√2 V, VO = 48 V, IO = 0.2 to 2 A, Vr∕VO ≤ 1%, fs = 200 kHz, rL = 1 Ω, rDS = 1 Ω, Co = 100 pF, VF =

0.7 V, and RF = 25 mΩ.

2.13 A buck converter has the following specifications: VI = 4–6 V, VO = 3 V, IO = 0–5 A, fs = 250 kHz, andVr∕VO ≤ 2%. Assume 𝜂 = 0.9. Find L, C, and rC.

2.14 A buck PWM converter has VI = 270 V ±5%, VO = 28 V, IO = 0–15 A, Vr∕VO ≤ 5%, rL(dc) = 0.05 Ω,rC = 0.037 Ω, rDS = 0.3 Ω, Co = 150 pF, VF = 0.8 V, RF = 17.1 mΩ, and fs = 100 kHz. Find L, C, andrC. Assume the initial efficiency 𝜂 = 90% at full power.

2.15 A buck PWM converter has VI = 5 V± 20%, VO = 1.8 V, IO = 1–10 A, Vr∕VO ≤ 3%, rL(dc) = 0.02 Ω,rDS = 0.01 Ω, Co = 150 pF, VF = 0.3 V, RF = 18 mΩ, and fs = 500 kHz. Find L, C, rCmax, ISMmax, and VSMmax.Estimate PLS and 𝜂 at IOmax and VImin. Assume the initial efficiency 𝜂 = 80% at full power.

2.16 Design a buck converter to meet the following specifications: VI = 5 ± 1 V, VO = 3.3 V, IO = 0–5 A,Vr∕VO ≤ 1%, fs = 500 kHz, rDS = 8 mΩ, RF = 20 mΩ, VF = 0.3 V, rL = 50 mΩ, and Qg = 50 nC.

2.17 Design a buck PWM converter to meet the following specifications: VI = 3.3 V± 0.3 V, VO = 1.8 V,IO = 0.3–1.5 A, Vr ≤ 10 mV, and fs = 200 kHz.

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