Prof. Jan Rabaey - Nano-Tera 2015
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Antenna
Voltage Doubler
Load (LED) Impedance Matcher
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NEED TO REVISIT WHAT WE
MEAN BY COMPUTATION
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2-3 orders more efficient than today’s silicon equivalent (>1016 FLOPS with ~20 W)
Robustness in presence of component failure and variations
Neural response is highly variable (σ/μ≈1) [Faisal]
Amazing performance with mediocre components
E.g. sensory pathways– auditory, olfactory, vision,
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Physical Interface Platforms across Scale and Modality
μECoG+BMIPeter Ledochowitsch / Aaron Koralek
Carmena / Maharbiz
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64 channel remotely powered wireless uECoG [Muller, Le, Ledoschowicz, Li]
Free-floating wireless AP acquisition electrodes [Biederman, Yeager, VLSI12]
Register Bank
Memory Feature Extraction
Preamble Buffer
Spike Detection
Spike Alignment
Asynchronous 250 nW/channel spike-sorting [Liu, VLSI12]
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μ
[DJ Seo et al, Arxiv, June 2013]
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i d
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• – –
–
•
–
– –
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Functional non-determinism present in most applications related to human-cyber interfaces
feature extraction, classification, synthesis, recognition, decision making, learning,
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Choose the right information representation that makes computation easy, efficient and robust matches the platform!
CNFET+RRAM Sparse Vector Generator
Correlation Matrix Memory
Energy-efficient Analog Adaptive
Front End
Rec
ogni
tion
Sen
sor R
espo
nses
Sparse Representation
Storage Recognition Feature Extraction
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•
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‘WEAK’ Linear Classifier 2
Sensor Data
Trainer
‘WEAK’ Linear Classifier 1
Weight 1
Weight 2‘STRONG’
ClassificationResult
Weighted Voter
Training Data
Model
Weak classifier fault due to circuit
non-idealities
DAQ SYSTEM
/ PC
SENSOR ARRAY THIN-FILM CLASSIFIERProjector
8x8cm photoconductor plane on glass
1cm
MB-GND
MS-
MB+
MS+
Weak TFT classifier branches on glass
Probe card for testing
Rat
es (t
p &
tn)
1 2 3 4 5 60.30.40.50.60.70.80.9
1
tntp
No. of weak classifiers
(measured)
tnSVM tp
2-5 weak classifiers based on highly non-ideal (TFT) multipliers achieve performance of ideal SVM
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Kiji
j
∂θi∂t =ωi + Kij
j=1
M
∑ sin(θ j −θi )
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Learning
(Correlation)
Retrieval (Projection)
(Thresholding)
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ILV RRAM
CNFET
106
1080
5
RRAM ( )
RR
AM
/
Target / > 1
Measured CNFET σ/μ = 0.57
Delay Cell Coincidence Detector
100 μm
Delay Cell
RRAM
CNFETs
ILVs
100 μm
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Dis
trib
utio
n
VX (V)
Up3Dn2
Up3Dn1
Up1Dn1
ZN=1 ZN=0
w/o IOFF with IOFF w/o IOFF with IOFF w/o IOFF with IOFF
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THANK YOU!
MERCI BEAUCOUP!