Interrupts of 8085

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  • 8085 INTERRUPTS *

  • INTERRUPTSWhen a microprocessor is interrupted, it stops executing its current program and calls a special routine which services the interrupt

    The event that causes the interruption is called Interrupt

    The special routine executed to service the interrupt is called ISR - Interrupt Service Routine/Procedure*

  • INTERRUPT CLASSIFICATIONHardware Interrupt An interrupt caused by an External signal Software Interrupt An interrupt caused by Special Instruction Maskable Interrupts Can be delayed or RejectedNon-Maskable Interrupts Can not be delayed or Rejected (Service must)Vectored Where the subroutine starts is referred to as Vector Location Non-vectored The address of the service routine needs to be supplied externally by the device*

  • 8085 INTERRUPTS*The EI instruction is a one byte instruction and is used to Enable the maskable interrupts.The DI instruction is a one byte instruction and is used to Disable the maskable interrupts.

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    Interrupt NameMaskableVectoredINTRYesNoRST 5.5YesYesRST 6.5YesYesRST 7.5YesYesTRAPNoYes

  • INTERRUPT VECTORS & THE VECTOR TABLEAn interrupt vector is a pointer to where the ISR is stored in memory.All interrupts (vectored or otherwise) are mapped onto a memory area called the Interrupt Vector Table (IVT).The IVT is usually located in (0000H - 00FFH).

    Vector Address = Interrupt number * 8

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    Interrupt NameCalculation Vector AddressINTR----TRAP ( RST 4.5)4.5x8=360024HRST 5.55.5x8=44002CHRST 6.56.5x8=520034HRST 7.57.5x8=60003CH

  • 8085 INTERRUPTS SUMMARY *

    Interrupt NameTriggering MethodPriorityMaskableMasking MethodVector AddressTRAPRST 4.5Edge & Level Sensitive1st HighestNoNone0024HRST 7.5Edge Sensitive2nd YesDI / EISIM003CHRST 6.5 Level Sensitive3rd YesDI / EISIM0034H

    RST 5.5Level Sensitive4th YesDI / EISIM002CH

    INTRLevel Sensitive5th LowestYesPin( INTR & INTA)--

  • SOFTWARE INTERRUPTThe 8085 recognizes 8 RESTART instructions: RST n ( RST0 - RST7)Each of these would send the execution to a redetermined hard-wired memory location:

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    Restart InstructionVector AddressRST 0CALL 0000HRST 1CALL 0008HRST 2CALL 0010HRST 3CALL 0018HRST 4CALL 0020HRST 5CALL 0028HRST 6CALL 0030HRST 7CALL 0038H

  • THE 8085 MASKABLE/VECTORED INTERRUPT PROCESSThe interrupt process should be enabled using the EI instruction.The 8085 checks for an interrupt during the execution of every instruction.If there is an interrupt, and if the interrupt is enabled using the interrupt mask, the microprocessor will complete the executing instruction, and reset the interrupt flip flop.The microprocessor then executes a call instruction that sends the execution to the appropriate location in the interrupt vector table.*

  • THE 8085 MASKABLE/VECTORED INTERRUPT PROCESSWhen the microprocessor executes the call instruction, it saves the address of the next instruction on the stack.The microprocessor jumps to the specific service routine.The service routine must include the instruction EI to re-enable the interrupt process.At the end of the service routine, the RET instruction returns the execution to where the program was interrupted.*

  • SIM VALUE MUST BE LOADED IN ACCUMULATOR*RST5.5 MaskRST6.5 MaskRST7.5 Mask}0 - Available1 - MaskedMask Set Enable0 - Ignore bits 0-21 - Set the masks according to bits 0-2Force RST7.5 Flip Flop to resetNot UsedEnable Serial Data0 - Disable1 - EnableSerial Data OutEither 0 or 1SIM SERIAL INTERRUPT MASK

  • ExampleMSE Mask Set EnableRST 6.5 MaskRST 5.5 & 7.2 UnmaskRST FF Dont ResetSerial Data Igonered *SDOSDEXXXR7.5MSEM7.5M6.5M5.501000001Contents of accumulator are: 0AHEI; Enable interrupts including INTRMVI A, 0A; Prepare the mask to enable RST 7.5, and 5.5, disable 6.5SIM; Apply the settings RST masks

  • ExampleMSE Mask Set DisableRST FF ResetSerial Data EnableSerial Data output is 0 *SDOSDEXXXR7.5MSEM7.5M6.5M5.510010100Contents of accumulator are: 54H

  • *RST5.5 MaskRST6.5 MaskRST7.5 Mask}0 - Available1 - MaskedInterrupt EnableValue of the Interrupt EnableFlip FlopSerial Data InRST5.5 Interrupt PendingRST6.5 Interrupt PendingRST7.5 Interrupt PendingRIM READ INTERRUPT MASK Set 1Reset - 0COPIES THE STATUS OF THE INTERRUPTS INTO THE ACCUMULATOR

  • ExampleInterrupt EnableRST 5.5 & 6.5 MaskedRST 7.5 Pending Serial Input Data is 0*SIDP7.5P6.5P5.5IEM7.5M6.5M5.501100101Contents of accumulator are: 4BH