A K-Band 5W Doherty Amplifier MMIC Utilizing 0.15μm GaN on SiC HEMT Technology

Charles F. Campbell, Kim Tran, Ming-Yih Kao and Sabyasachi Nayak

TriQuint Semiconductor, Defense Products and Foundry Services, 500 West Renner Rd., Richardson, TX

Abstract — The design and performance of a K-Band Doherty

amplifier MMIC is presented. The monolithic 2-stage amplifier was fabricated with a dual field plate 0.15μm GaN on SiC HEMT process technology. Measured continuous wave results at 23GHz demonstrate over 5W of saturated output power and up to 48% power added efficiency. Peak efficiency occurs at approximately 1dB of gain compression and the amplifier maintains 25% power added efficiency at 8dB of input power back off from P1dB.

Index Terms — MMIC, Gallium Nitride, Doherty amplifier, power amplifier.

I. INTRODUCTION

Power amplifier MMICs are critical components for both commercial and military microwave communication systems. Modern communication links utilize digitally modulated signals with significant peak to average power ratios (PAR). As the push to higher data rates continues, increasingly higher order and higher bandwidth modulation schemes are being used. Assuming that the average transmitted power level remains fixed, a higher PAR signal will require correspondingly higher power amplifiers to avoid clipping the signal peaks. These peaks however occur infrequently meaning that most of the time the power amplifier will operate well backed off from saturation. Unfortunately, most linear power amplifiers are inefficient when operated well backed from saturation and thermal management will be come a significant concern.

Fortunately this problem has been well studied by researchers designing basestation WCDMA power amplifiers [1]. The solution is to use a power amplifier architecture that maintains high power added efficiency when backed off from P1dB. Examples would be Doherty amplifiers, Chireix outphasing, envelope elimination and restoration (EER), and digital amplifiers [2-4]. Most of these techniques are complex requiring significant amounts of circuitry in addition to the power amplifier itself. The most straightforward of these approaches is probably Doherty. Doherty amplifiers however are not particularly linear which is critical to meeting error vector magnitude (EVM) and spectral mask requirements. Therefore, many basestation power amplifier architectures use a Doherty amplifier to achieve high backed off efficiency and digital predistortion (DPD) to linearize the system to an acceptable level.

In this paper the design and performance of a monolithic 2-stage K-band Doherty power amplifier MMIC fabricated with a 0.15μm GaN HEMT process is described. The circuit is designed for a 23GHz center frequency, greater than 5W saturated output power and high power added efficiency (PAE) when backed off from the output 1dB gain compression point (P1dB). Measured results for the fabricated MMICs under continuous wave (CW) conditions and DPD corrected for a 22MHz bandwidth 256 QAM modulated signal at 22.7GHz are presented.

II. PROCESS TECHNOLOGY

The 0.15μm gate length K-band Doherty amplifier MMICs were fabricated on 100mm SiC wafers with an AlGaN/GaN epitaxial layer. Active devices were isolated by a mesa etch using a reactive-ion-etch (RIE) process. Ti/Al based metal stack and rapid thermal anneal (RTA) at 850°C were used for constructing source-drain ohmic contacts. Ohmic contact resistances were measured to be < 0.4Ω-mm for this process. Gate openings of 0.1μm were defined by electron-beam lithography followed by a RIE etch into the dielectric layer. The second gate patterning step also used e-beam lithography to define the top portion of the gate metal stack. For substrate via hole formation, the GaN on SiC wafers were thinned to 100μm and etched with an inductively coupled plasma (ICP) etcher. Typical DC characteristics of these transistors are Imax=1.15A/mm, gm,max=380mS/mm and -3.5V pinch-off at 10V Vds. Device breakdown voltage exceeds 50V at Igd=1mA/mm. Measured efficiency tuned load pull results at 30GHz for a 4x50μm unit FET cell demonstrates 4W/mm output power density with associated gain and power added efficiency (PAE) of 10.9dB and 52%.

III. CIRCUIT DESIGN

The design goals for the Doherty amplifier MMIC are as follows; 22-24GHz bandwidth, 15dB small signal gain, 5W saturated output power and greater than 25% PAE at 8dB of input power back off from P1dB. The operating principle for a standard 2-way Doherty amplifier is as follows. The input signal is split with a quadrature circuit into a “carrier” amplifier and a “peaking” amplifier. Under small signal conditions the class-AB carrier amplifier is PAE loaded by the

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Doherty output network. The class-C peaking amplifier is off, supplies no output power and is therefore open circuit loaded. As the input power increases the peaking amplifier starts to turn on and it’s load impedance begins to decrease. At the same time the load impedance for the carrier amplifier also decreases and moves toward a higher output power loading condition. At full saturation both the peaking and carrier amplifiers are power loaded and contribute equal amounts of output power to the load. Therefore, in theory the Doherty architecture can deliver up to twice as much output power as a PAE tuned circuit with same transistor periphery. The trade off is 3dB less small signal gain (due to the input splitter) and more than twice as much power dissipation under saturated operation conditions. Clearly continuous operation under saturated conditions will present significant thermal management issues. However, the Doherty amplifier is quite useful for applications requiring efficient backed off operation with infrequent excursions into saturation.

Analysis of PAE tuned 23GHz load pull data suggests that two 8x75μm output FET cells will meet the 5W peak output power goal when modulated to a power load. The observed peak current under efficiency loading was roughly half of the overall current capability of the transistor. It was also determined that two gain stages are required to meet the small signal gain target. Further analysis revealed that the preferred architecture was 2-stage peaking and carrier amplifiers with the quadrature splitter at the input as opposed to a single ended first stage followed by the splitter. A Lange coupler was used to provide the quadrature power split and has the added advantage of good input return loss. The various networks were designed using EEHEMT models for the transistor cells within the AWRTM Microwave Office simulation environment. The design was finalized with extensive EM simulation using SonnetTM. A photograph of the fabricated MMIC is shown in Fig. 1, the die dimensions are 3.4 x 2.0mm2.

Fig. 1. Photograph of the fabricated Doherty amplifier MMIC.

IV. MEASURED RESULTS

Fabricated devices were 100% DC and RF tested on-wafer at TriQuint’s production test facility. To facilitate in-fixture testing, separated electrically good die were soldered to 40mil thick CuMo carrier plates. The amplifier input and output bond pads were connected to 10mil thick alumina de-embedding lines with two short bond wires. The assembly is then inserted into an aluminum test fixture. The opposite ends of the alumina de-embedding lines are contacted with 2.4mm connectorized launchers and the entire fixture is placed on an aluminum heat sink. The calibration procedure de-embeds the launchers and de-embedding lines up to the bond wire/alumina line attach point. The in-fixture measurements are performed under continuous wave conditions at room temperature. No cold plate or any other form of active thermal management of the MMIC backside temperature was used.

Measured in-fixture results for small signal s-parameters are shown in Fig. 2. The quiescent bias condition for the measurements is Vd=20V and Id=150mA. The frequency response of the amplifier appears to have shifted down about 0.5GHz from the target operating band. The measured small signal gain exceeds 14dB from 20GHz to 24GHz and reaches the 15dB goal from 21GHz to 23GHz. The input and output return loss was observed to be better than 20dB and 13dB respectively over the design band of the amplifier.

Fig. 2. Measured small signal s-parameters, Vd=20V, Idq=150mA Measured CW data for output power and power added

efficiency at 23GHz is plotted in Fig. 3. The quiescent drain voltage was Vd=20V and the gate voltage on the peaking amplifier was adjusted to for a flat compression characteristic. The peaking amplifier current was increased slightly over what was used for the s-parameter measurements resulting in higher linear gain than what is shown in Fig. 2. The saturated CW output power at 23GHz exceeds 5W with an output P1dB of 36.8dBm. The peak PAE is 48% and occurs at less than P1dB demonstrating hard compression from a 2-stage GaN power amplifier MMIC. The PAE at 8dB of input power back off from the 1dB gain compression point is 25%. Measured

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saturated output power and peak PAE over frequency is shown in Fig. 4. Over a 21-24GHz frequency range the saturated output power ranges 4W to 5.5W and the peak PAE 42% to 50%.

Fig. 3. Measured output power and PAE at 23GHz, Vd=20V and with the peaking amplifier gate voltage set for flat gain compression. Fig. 4. Measured saturated output power and peak PAE.

It is of particular interest to characterize the operation of

this amplifier with a high order digitally modulated input signal and DPD correction. To investigate, a 22MHz bandwidth 256 QAM signal with a carrier frequency of 22.7GHz was generated. The amplifier was then subjected to 7th order DPD correction with the goal of meeting spectral mask ETSI EN 300 198 ver. 1.5.1, Class 5A while maximizing output power and efficiency. A more complete description of the DPD measurement system used for this work is provided in [5]. Measured static and dynamic AM to PM conversion data is shown in Figs. 5 and 6 with and without DPD correction. Clearly the application of DPD corrects for the static (red curve) AM-PM distortion. The dynamic (blue dots) AM-PM distortion is caused thermal and electrical memory, the latter of which is minimized by bias

circuit optimization. The signal spectrum with and without DPD correction is shown in Fig. 7 with spectral mask ETSI EN 300 198 ver. 1.5.1, Class 5A superimposed on the data. For an average input power level of 14dBm, the application of 7th order DPD provides about 20dB of close in correction and compliance to the spectral mask. Under this condition, the average output power is 29.4dBm with 27% power added efficiency. The PAR of this signal is about 8dB and a 29.4dBm output power level is consistent with the known 37dBm peak power capability of the Doherty amplifier MMIC. The humps and spikes in the data around 60MHz offset are due to clock leakage and bandwidth limitations of the DPD system.

Fig. 5. Static and dynamic AM-PM conversion without DPD. Fig. 6. Static and dynamic AM-PM conversion with DPD.

There are few published benchmarks to compare this work against. Branson, et. al. demonstrated the use DPD to linearize a 3-stage GaAs power amplifier with a complex

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digital signal at 15GHz [5]. Over 20dB of correction was achieved with a reported output power and efficiency of 26.3dBm and 8.9%. This device was a commercially available linear power amplifier and not of the Doherty type. By way of comparison the GaN Doherty amplifier reported here produces twice the output power and over 3 times the efficiency at a higher operating frequency.

Fig. 7. Output signal spectrum, 22.7GHz, 256 QAM, 22MHz BW.

V. CONCLUSION

The design and performance of a K-Band Doherty amplifier MMIC has been presented. The monolithic 2-stage amplifier was fabricated with a dual field plate 0.15μm GaN on SiC HEMT process technology. Measured results at 23GHz demonstrate over 5W of saturated output power and up to 48% power added efficiency. Peak efficiency occurs at

approximately 1dB of gain compression and the amplifier maintains 25% power added efficiency at 8dB of input power back off from P1dB. The amplifier was also demonstrated to operate well under digital predistorted conditions with a wideband complex modulated signal. For a 256 QAM, 22MHz bandwidth signal at 22.7GHz, the DPD corrected average output power and PAE were observed to be 29.4dBm and 27% while meeting spectral mask ETSI EN 300 198 ver. 1.5.1, Class 5A. To the authors best knowledge, the results reported here are among the best published for K-band Doherty amplifier MMIC.

ACKNOWLEDGEMENT

The authors would like to thank Craig Steinbeiser, Roger Branson, Oleh Krutko and James Nelson for support and helpful advice during the course of this project.

REFERENCES

[1] C. Steinbeiser, et. al., “Doherty Power Amplifiers using 2nd Generation HVHBT Technology for High Efficiency Basestation Applications,” IEEE Compound Semiconductor Integr. Circuit Symp., Oct. 201..

[2] S. C. Cripps, RF Power Amplifiers for Wireless Communications, Artech House, 1999.

[3] F. H. Raab, “Efficiency of Doherty RF power-amplifier systems,” IEEE Trans. Broadcast., vol.BC-33, no. 3, pp. 77-83, Sep. 1987.

[4] D. Kimball, et al., “Modeling and Design of RF Amplifiers for Envelope Tracking WCDMA Base-Station Applications”, IEEE Compound Semiconductor Integr. Circuit Symp., Oct. 2008.

[5] R. A. Branson, et. al., “Digital Pre-distortion for Improving Efficiency, Linearity and Average Output Power of Microwave Point-to-Point Power Amplifiers used in Cellular Backhaul Telecommunication Systems “, IEEE MTT-S Int. Microwave Symp. Dig., 2012, pp. 1-4.

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