[IEEE 2010 IEEE International Conference on Semiconductor Electronics (ICSE) - Malacca, Malaysia...

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ICSE Proc. 2010, Melaka, Malaysia R R C L 1 0 = ω A 5-GHZ VCO FOR WLAN APPLICATIONS Mahdi M.Bayat (1) , Hossein shamsi (2) , Majid Fouladian (3) , Morteza Rahimi (4) (1) Electrical Engineering Department, Islamic Azad University Qazvin Branch, Qazvin, Iran (2) Electrical Engineering Department, K.N. Toosi University of Technology, Tehran, Iran (3,4) Electrical Engineering Department, Azad Islamic University Saveh Branch, Saveh, Iran (1) [email protected], (2) [email protected], (3) [email protected] , (4) [email protected] Abstract: A fully monolithic 5 GHz CMOS LC-VCO, designed in a 0.18 µm 1P6M CMOS technology, is presented in this paper. The tuning range of the VCO is from 4.1 GHz to 5.24 GHz, about 24%. The measured phase noise at 5-GHz is - 115.8dBc/Hz at 1MHz offset from the carrier. It meets the requirements for IEEE 802.11a WLAN standard. The current dissipation of the VCO is 2mA from the 1.8V power supply. Keywords: VCO, Tuning range, phase noise. I. INTRODUCTION The explosive growth of today’s telecommunication market has brought an increasing demand for high performance, low cost, and low power consumption radio frequency integrated circuits (RFICs). Tremendous effort has been reported to integrate all radio-frequency (RF) blocks, including the low-noise amplifier (LNA), mixer, intermediate frequency (IF) filter, local oscillator (LO) and power amplifier (PA) into a single chip [1]. Among all these RF blocks, the design on voltage-controlled oscillators (VCOs), which generate the LO carrier signal, is a major challenge and thus has received the most attention in recent years, as evidenced by the large number of publications [2]. The LOs are usually a frequency-synthesizer based on a phase locked loop (PLL) as depicted in the Fig 1, in which the output oscillation signal is provided by a VCO. Due to the ever-increasing demand for bandwidth in communications, very stringent requirements are placed on the spectral purity of Los. In LC oscillators, the on-chip passive inductors are critical components. It is well known that a high quality factor (Q factor) tank can effectively improve the noise performance of the oscillators. However, due to several energy loss Mechanisms of the on-chip passive inductor, the Q factors of the on-chip inductors as well as the overall Q factor of the tank are Primarily limited by the given processing technology. Hence, many Q improvement methods require additional Process steps, which may be impractical for circuit designers [3]. This paper presents a 4.1-to-5.3 GHz VCO designed in a 0.18µm CMOS technology. This work focuses on the Tuning range performance of LC VCO. It realizes a continuous Tuning range (24%) at 5GHz using differential transconductor tuning, with a VCO phase noise of - 115.8dBc/Hz at 1-MHz frequency offset from the carrier. The paper is organized as follows. In Sect. 2, the basic of Lc- vco is described. In Sect. 3 the phase noise is described. The circuit implementation of the VCO as well as its circuit level simulation results are presented in Sect. 4 and 5. Finally, Sect. 6 concludes the paper. Fig.1: the Block diagram of PLL-based frequency synthesizers [3] II. BASIC of LC-VCO The cross-couple oscillator of Fig.2 is a differential topology mainly consisting of two equal active RF devices acting amplifier and feedback. The high load impedance is realized by a parallel LC resonator. When neglecting any resistive parasitic, the impedance and thus the loop gain approach infinity at the resonance frequency. Consequently, oscillation occurs at the resonance frequency: Fig.2: the schematic of a cross couple oscillator. (1) With L R and C R as the effective resonator components [4]. A. Frequency Tuning For several reasons, oscillators need frequency tuning. First, for course tuning associated with the compensation of process variation, aging and the temperature effects, which can change the reactive values of the circuit element [4]. It is possible to design a VCO with a wide tuning range using single tuning band as shown in Fig 3(a) by employing MOS devices as varactors. This implementation however‚ is not suited for monolithic integration due to high VCO Sensitivity and tuning nonlinearity. Broadband VCO implementation with sub bands as shown in Fig 3(b) is considered here for integration purposes for lower VCO sensitivity and improved tuning linearity. Generally, we can vary frequency by changing the reactive values of the element. The capacitances of active devices can be changed by varying the gate and/or VCC CR CR LR LR 149 978-1-4244-6609-2/10/$26.00 ©2010 IEEE

Transcript of [IEEE 2010 IEEE International Conference on Semiconductor Electronics (ICSE) - Malacca, Malaysia...

Page 1: [IEEE 2010 IEEE International Conference on Semiconductor Electronics (ICSE) - Malacca, Malaysia (2010.06.28-2010.06.30)] 2010 IEEE International Conference on Semiconductor Electronics

ICSE Proc. 2010, Melaka, Malaysia

RRCL1

0 =ω

A 5-GHZ VCO FOR WLAN APPLICATIONS

Mahdi M.Bayat(1), Hossein shamsi(2), Majid Fouladian(3), Morteza Rahimi(4) (1) Electrical Engineering Department, Islamic Azad University Qazvin Branch, Qazvin, Iran

(2) Electrical Engineering Department, K.N. Toosi University of Technology, Tehran, Iran (3,4) Electrical Engineering Department, Azad Islamic University Saveh Branch, Saveh, Iran

(1)[email protected], (2)[email protected], (3) [email protected], (4)[email protected] Abstract: A fully monolithic 5 GHz CMOS LC-VCO,

designed in a 0.18 µm 1P6M CMOS technology, is presented in this paper. The tuning range of the VCO is from 4.1 GHz to 5.24 GHz, about 24%. The measured phase noise at 5-GHz is -115.8dBc/Hz at 1MHz offset from the carrier. It meets the requirements for IEEE 802.11a WLAN standard. The current dissipation of the VCO is 2mA from the 1.8V power supply. Keywords: VCO, Tuning range, phase noise.

I. INTRODUCTION

The explosive growth of today’s telecommunication

market has brought an increasing demand for high performance, low cost, and low power consumption radio frequency integrated circuits (RFICs). Tremendous effort has been reported to integrate all radio-frequency (RF) blocks, including the low-noise amplifier (LNA), mixer, intermediate frequency (IF) filter, local oscillator (LO) and power amplifier (PA) into a single chip [1]. Among all these RF blocks, the design on voltage-controlled oscillators (VCOs), which generate the LO carrier signal, is a major challenge and thus has received the most attention in recent years, as evidenced by the large number of publications [2].

The LOs are usually a frequency-synthesizer based on a phase locked loop (PLL) as depicted in the Fig 1, in which the output oscillation signal is provided by a VCO. Due to the ever-increasing demand for bandwidth in communications, very stringent requirements are placed on the spectral purity of Los. In LC oscillators, the on-chip passive inductors are critical components. It is well known that a high quality factor (Q factor) tank can effectively improve the noise performance of the oscillators. However, due to several energy loss Mechanisms of the on-chip passive inductor, the Q factors of the on-chip inductors as well as the overall Q factor of the tank are Primarily limited by the given processing technology. Hence, many Q improvement methods require additional Process steps, which may be impractical for circuit designers [3]. This paper presents a 4.1-to-5.3 GHz VCO designed in a 0.18µm CMOS technology. This work focuses on the Tuning range performance of LC VCO. It realizes a continuous Tuning range (24%) at 5GHz using differential transconductor tuning, with a VCO phase noise of -115.8dBc/Hz at 1-MHz frequency offset from the carrier. The paper is organized as follows. In Sect. 2, the basic of Lc-vco is described. In Sect. 3 the phase noise is described. The circuit implementation of the VCO as well as its circuit level simulation results are presented in Sect. 4 and 5. Finally, Sect. 6 concludes the paper.

Fig.1: the Block diagram of PLL-based frequency synthesizers [3]

II. BASIC of LC-VCO

The cross-couple oscillator of Fig.2 is a differential topology mainly consisting of two equal active RF devices acting amplifier and feedback. The high load impedance is realized by a parallel LC resonator. When neglecting any resistive parasitic, the impedance and thus the loop gain approach infinity at the resonance frequency. Consequently, oscillation occurs at the resonance frequency:

Fig.2: the schematic of a cross couple oscillator.

(1) With LR and CR as the effective resonator components [4]. A. Frequency Tuning

For several reasons, oscillators need frequency tuning. First, for course tuning associated with the compensation of process variation, aging and the temperature effects, which can change the reactive values of the circuit element [4]. It is possible to design a VCO with a wide tuning range using single tuning band as shown in Fig 3(a) by employing MOS devices as varactors. This implementation however‚ is not suited for monolithic integration due to high VCO Sensitivity and tuning nonlinearity. Broadband VCO implementation with sub bands as shown in Fig 3(b) is considered here for integration purposes for lower VCO sensitivity and improved tuning linearity. Generally, we can vary frequency by changing the reactive values of the element. The capacitances of active devices can be changed by varying the gate and/or

V C C

C R C R

L R L R

149 978-1-4244-6609-2/10/$26.00 ©2010 IEEE

Page 2: [IEEE 2010 IEEE International Conference on Semiconductor Electronics (ICSE) - Malacca, Malaysia (2010.06.28-2010.06.30)] 2010 IEEE International Conference on Semiconductor Electronics

ICSE Proc. 2010, Melaka, Malaysia drain voltage. Broadband VCO operation with sub bands can be implemented with one of following approaches: 1) Switching in or out discrete amounts of capacitance or inductance from the LC tank. 2) Switching between LC tanks, which are separately optimized and tuned for different frequency bands. 3) Switching between VCOs, which are optimized for different frequency bands.

Fig.3: (a) single continuous tuning curve (b) Tuning curve divided in to Sub-

Boun [5]

Switching capacitance or inductor inside the LC tank is preferred solution for fully integrated VCO because it requires only one LC-tank with digitally controllable components [5]. B. Capacitance Switching

Switching a capacitance to extend tuning range is first proposed by Kral. In CMOS technology‚ n-type MOS transistors are used to build an RF switch.The capacitive tuning ratio can be defined by:

max.

min.

v

vv C

Ct =

Where Cvmax and Cvmin denote the maximum and minimum values of CV, respectively. The tuning range can be estimated based on the resonance frequency of the resonator loop.

RR

LOCL

1=ω

The tuning range can be calculated by:

max.min. .1

.1

VRVRLO

CLCL−=∆ω

).(1

).(1

max.min. tVRtVRLO CCLCCL +

−+

=∆ω

Generally, we can identify parasitic capacitance Ct with fixed value connected rather in parallel or in series whit the varactor resulting in For the cross-coupled topology depicted in Fig 4, where all major parasitic are more or less parallel, the first equation holds, for many topologies [4].

III. PHASE NOISE

Phase noise is one of the most important factors that affect performance of VCO. Ideal oscillator spectrum is an impulse; however, the fact is there are all sorts of circuit noise sources. Circuit noise sources can be divided into device noise and interference noise. Device noise includes thermal noise and flicker noise, while outside interference mainly refers to the substrate noise and power supply noise. VCO device noise is mainly from the series parasitic resistance of the on chip. The thermal noise has

2

1f

characteristic phase noise at relatively large frequency offsets, while the flicker noise of the device has

3

1f

characteristic phase noise at nearer frequency offsets. The people have conducted the massive research to the

oscillator noise, Leeson model; the Razavi model and the Hajimiri model are three quite famous noises models. Because the Razavi model is aims at the non- inductance oscillator to propose, therefore this article mainly discusses the Leeson model and the Hajimiri model to the phase noise analysis [6].

Fig. 4: a cross couple VCO with parasitic capacitor [4]

IV. CIRCUIT DESIGN

The design of a 5 GHz VCO in CMOS process presents

many difficulties. Among the structures of the VCO, the NMOS cross-coupled pair, the PMOS cross-coupled pair and the complementary MOS cross-coupled pair with either NMOS or PMOS tail current could be chosen.

The core circuit of the VCO is shown in Fig 5. Two optimized spiral inductors L1 and L2 are used in series in a

(5)

(b)

(a)

150

(4)

(3)

(2)

differential configuration. The NMOS and PMOS transistors M1 and M2 are coupled in a positive feedback to provide a negative resistance. In addition, the P-MOS used in the cross-connected pair helps to reduce phase noise due to less flicker

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ICSE Proc. 2010, Melaka, Malaysia noise. The resistor Rs controls the DC current as well as the peak dynamic current of the VCO.

Hajimiri’s phase model form insists that better phase noise can be achieved by getting more symmetric waveform. Therefore, by the selection of a source resistor Rs, the VCO operates in the current limited mode, and phase noise can be improved [7]. The choice of the inductor value plays an important role in phase noise performance of an LC tank VCO. Further improvement of the switching speed is achieved by the high AC impedance from source to Vcc Created by an inductor Ls, resonating at 2×fVCO with the parasitic capacitance at this node. We have used tail inductors (LTail) to attenuate the effect of harmonics at the output node as well as to lower the voltage headroom [8].

The inductors (L1, L2) are 2.5 turns with 2.39nH inductance and quality factor of 13.9 at 5-GHz. The equivalent circuit of the inductor is shown in Fig.6. Both the quality factor and inductance of the inductor versus frequency are shown in Fig.7 and Fig 8, respectively.

Fig. 5: The equivalent circuit of the VCO core.

Fig .6: The equivalent circuit of the inductor.

Fig .7: The inductance of the inductor.

Fig .8: The Quality factor of the inductor used in the VCO

A. The Capacitor Array

Achieving a large Cmax/Cmin ratio while having a small VCO gain can be solved by using an array of switched capacitors as shown in Fig. 9.

Fig. 9: The switched capacitor array.

The switched capacitors are used as band selectors or as coarse tuning. For fine-tuning, a varactor is used. The switches consist of NMOS transistors due to their higher transconductance, but there is a tradeoff with the transistor size, between loss and capacitive load. This translates into either reduced power consumption or an increased tuning range.

For small losses, the drain source resistance (RDS(ON)) should be reduced by maximizing the transconductance. Thus, a wide transistor with minimum gate length and a large overdrive (Vgs-Vt) should be used. For a small capacitive load, the Cgs and Cgd have to be minimized, requiring a narrow transistor with minimum gate length. The capacitor array is shown in Fig. 10

Fig. 10: the capacitor array.

The capacitors on both sides of drain and source are used for band switching, but they also act as coupling capacitors isolating the biasing voltage from the negative resistance. The drain and source are biased via resistors. When the switch is on, the biasing is set to 0V and the gate to 1.8 V. This maximizes the overdrive resulting in a reduced RDS(ON). When the switch is off the bias is set to 1.8 V and the gate is at 0V. This reduces the voltage dependent Cgs and Cgd capacitance by 20%. The increased overdrive makes it possible to use smaller transistors, which reduce the capacitive load without increasing the losses [9].

V. SIMULATION RESULTS

4B it C o a rs e & F in e T u n in g

V D D

V D D

B 3 B 2 B 1 B 0

V b ia s

V c tr l

L 2L 1

L sR s

M 1M 2

M 3

M 4

W

4W

2W 2C

C

4C4C

2C

C

B0

B1

B2

4R

2R

R

4R

2R

R

151

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ICSE Proc. 2010, Melaka, Malaysia

The VCO is designed with a 0.18um 1P6M CMOS

process. The simulation results are given in Table I. The power consumption is about 3.6mW at 1.8V supply voltage. The phase noise performance presented in Fig. 9. The VCO achieves a phase noise of-115.8dBc/Hz at 1-MHz offset of the carrier. The oscillator is tunable from 4.1GHz to 5.24GHz (24% tuning range) with the Vctrl (tuning voltage) from 0V to 1.8V.To compare the performance of various VCO’s, a common approach is to use a figure of merit (FOM):

FOM normalizes the phase noise to offset frequency, oscillation frequency and power consumption PVCO.

This results in a FOM of -194.1 dBc/Hz for this design. In Table II, we compared our VCO and other published low-power based on the power Consumption.

Fig.11: Oscillation frequency variation as a function of control voltage

Fig .12: Phase noise at 5-GHz

TABLE I: Simulation results of VCO

TABLE II: Comparison of performance of low power VCO

* 0.35µm SiGe BiCMOS. ** 0.35µm BiCMOS.

VI. CONCLUSIONS

A low power and low phase noise differential LC-tank

VCO is designed. The VCO has N- and P-MOS cross-connected pair. The VCO is optimized for 5GHz WLAN application (IEEE 802.11a) by adjusting the tuning range. This work achieves a phase noise of -115.8 dBc/Hz at 1-MHz offset while consuming 2mA current for the VCO. The VCO frequency can be tuned from 4.1 to 5.24 GHz.

REFERENCES

[1] J.C. Rudell, J.-J. Ou, T. B. Cho, G. Chien, F. Brianti, J. A. Weldon, P. R. Gray,“A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications,” IEEE J. Solid-State Circuits, vol. 32, no. 12, pp. 2071-2088, Dec. 1997.

[2] J. Craninckx and M. Steyaert, “A 1.8-GHz CMOS low-phase-noise voltage controlled oscillator with prescaler,” IEEE J. Solid-State Circuits, vol. 30, no. 12,pp. 1474-1482, Dec. 1995.

[3] Zhipeng zhu, “Low Phase Noise Voltage Controlled oscillator Design” Ph.D. dissertation, Univ Texas , Arlington 2005. [4] F.Ellinger, “radio frequency integrated circuits and technologies”, New York: Springer 2007. [5] A.Aktas, “CMOS Plls And Vcos For 4G Wireless” New York: Springer

2004. [6] Yin Xu , Zheying Li “A CMOS LC VCO In 0.5µm Process” 978-1-

4244-1706-3/08/ 2008 IEEE. [7] S. Yun, S. Shin, H, Chol, S. Lee, "A InW Current-Resue CMOS Differential LC-VCO with Low Phase Moise," IEEE International Solid-State Circuits Conf., pp. 540- 542, Feb. 2005. [8] Ting Wu, Un-Ku Moon, Kartikeya Mayaram”Dependence of LC

VCOOscillation Frequency on Bias Current”IEEE, ISCAS 2006 [9] Le Wang, Parag Upadhyaya, Pinping Sun, Yang Zhang Yi-Jan Emery

Chen' DongHo Jeong Deukhyoun Heo “A 5.3GHZ LOW-PHASE-NOISE LC VCO WITH HARMONIC FILTERING RESISTOR”IEEE ISCAS 2006

[10] S.Kurachi, T.Yoshimasu, N.Itoh, K. Yonemura”5-GHz Band Highly Linear VCO IC with a Novel Resonant Circuit”IEEE,2007

[11] Yijoo Shin, Taewon Kim, Sangwoo Kim, Sungkwon Jang, and Bokki Kim “ A Low Phase Noise Fully Integrated CMOS LC VCO Using a Large Gate Length pMOS Current Source and Bias Filtering Technique for 5-GHz WLAN “1-4244-1449-0/07 ,IEEE 2007

[12] Giuseppe De Astis,David Cordeau, Jean-Marie Paillot, Memb, Lucian Dascalescu “A 5-GHz Fully Integrated Full PMOS Low-Phase-Noise LC VCO"IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 10, OCTOBER 2005

[13] KaChun Kwok and Howard C. Luong, “Ultra-Low-Voltage High Performance CMOS VCOs Using Transformer Feedback” IEEE

JOURNALOF SOLID-STATE CIRCUITS, VOL. 40, NO. 3, MARCH 2005

VCO @5GHz Supply Voltage 1.8 Current Consumption 2mA Phase Noise@1MHZ -115.8dBc/Hz Tuning range 24% FOM -194.1

Ref Tech (µm)

Freq (GHz)

PN(dBc/Hz)@1

MHz

TR (%)

PDC

(mW) FOM

[10] 0.35* 5 -116 8.8 10.2 -190.3 [11] 0.18 3.8 -119 8.4 5.8 -183.1

[12] 0.35**

5 -117 7 17 -180

[13] 0.18 5 -116.1 5 5.71 -193 This

Work 0.18 5 -115.8 24 3.6 -194.1

)log(20])[log(10)( 0

ω

ωω

∆−+∆= mWPLFOM VCO

(6)

152