I. II. III & IV. MOS V.ocw.sogang.ac.kr/rfile/2011/course10-spt/7시험공정... · 2011-12-29 ·...
Transcript of I. II. III & IV. MOS V.ocw.sogang.ac.kr/rfile/2011/course10-spt/7시험공정... · 2011-12-29 ·...
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W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes
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시험 공정
I. 측정에 사용되는 용어 소개
II. 바이폴라 변수 측정
III & IV. MOS 변수 측정
V. 프로브 스테이션
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I. 측정에 사용되는 용어 소개
1. Testing 1) in-situ test : 4 point probe, C-V
• 4 point probe (test wafer) • C-V measurement (test wafer) • thickness monitor (test wafer, direct) • critical dimension measurement (direct)
2) wafer test • DC parameter test (test pattern) • AC functional test (test pattern, chip)
3) test equipment : 정기검사 • manual test • automatic test
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2. Test pattern, chip and wafer
1) test pattern 구성 :
production chip 을 구성하는 모든 개별소자 및 회로
2) test chip과 production chip 의 구성비:
초기에는 1:1로 구성하고 yield가 올라감에
따라 production chip의 비율을 높이고, 생산 단계에서는
5개의 test chip을 UR(upper right), UL(upper left),
C(center), LR(lower right), LL(lower left)에 두는
것이 보통이다.
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3. 측정에 사용되는 용어
<용어의 정의>
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1) 정밀도 (precision) 2) 정확도 (accuracy) 3) 오차 (error)
• systematic error: 이론, 기구, 개인, 고정적 fluctuation. • random error: 기구조작, 눈금 읽는 오차, 불규칙한 동요 • 측정치= 대표값(X) ± 표준편차( )
<신뢰도 및 신뢰도 구간 ( 는 표준편차임)>
X±2.26 X±0.70 10
X±1.96 X±0.67 ∞
X±12.71 X±1.00 2 95% 50% -
confidence level sample
sσ
sσ
sσsσsσ
sσ
sσ
sσ
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4) 표준화 및 보정 1, 2차 검사기관, 표준연구소, 국제표준기구
5) 범위(range) 정밀도에 관계
6) 분해능(resolution) 잡음, 정확도에 관계
7) 잡음(noise) S/N ratio
8) 대역폭(bandwidth) 측정기구의 주파수 응답
9) 환경적 요인 온도, 습도, 전자장, 충격, 진동, 위치, 기계적인 안정성(마찰 등)
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II. Bipolar Parameter 측정
1. Diode / Bipolar parameter 1) 생성 전류, 확산 전류, 누설 전류, 광전류 2) Zener breakdown, avalanche breakdown 3) current gain 4) sheet resistance 5) collector resistance
2. pn 접합의 전류 1) diode 방정식
(1) 생성전류
( )1eWAτnqI 2kTqv
j0
ig −−=
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(2) 확산전류
q : 전자의 전하량 (1.6×10-19 C) ni : 진성 캐리어 농도 (1.45×1010 /3) τo : 역방향 바이어스가 걸린 공핍층 내에서의 캐리어의
유효 수명 W: 공핍층 폭 Ln(Lp): 전자(정공)의 확산길이 Dn(Dp): 전자(정공)의 확산계수 Aj : pn 접합의 횡단면 면적 V: 외부에 걸어준 전압, k : 볼츠만 상수 T: 온도 (K), kT/q : 25.9 mV (25에서) NA: acceptor의 농도, ND: donor의 농도
( ) ( )1enNL
DNL
DqA1eII kTqv2
iAn
n
Dp
pj
kTqvsd −
+=−=
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<planar pn 접합의 구조>
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<(1) pn 접합의 I-V 특성>
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<(2) pn 접합의 I-V 특성>
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(3) 역방향 누설 전류
<역방향 누설 전류 특성> <광 전류 특성>
310i
kT221.12316i
jnA
2i
ndj0
ig
cm/1045.1neT109.3n
ALN
nqDI,WAnqI
×=
×=
=τ
=
− kT/15.1332 eT10150 −× 또는,
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(4) 트랜지스터의 누설 전류
<트랜지스터의 누설 전류 측정 회로와 전류-전압 특성>
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2) 5-diode behavior of a transistor
<트랜지스터의 다섯 가지 다이오드 형태>
(a) (b) (c)
(d) (e)
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3) pn 접합의 순방향 전류 특성
<실리콘 pn 접합에서의 순방향 전류 특성>
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<순방향 I-V 특성과 측정 회로>
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4) pn접합의 파괴 전압 (1) Zener breakdown : 불순물 농도가 높을 때 ( >1018/cm3 ) field > 100 V/µm (2) avalanche breakdown : impact ionization
( ) ( )
junctionabruptforqN2EBV
6n2BVV1
1nnM
a
2S
nR0
F
ε=
<<−
==
여기서 M: multification factor, E: field BV: breakdown voltage
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<전형적인 pn 접합의 파괴 전압 및 측정 회로>
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<역방향 파괴 특성>
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3. 트랜지스터의 전류
<npn planar트랜지스터 구조 및 기호>
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<IC-VCE 특성 및 측정 회로>
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4. 트랜지스터의 전류 이득 1) 공통베이스 전류 이득 (α)
2) 공통이미터 전류 이득 (β)
FBE
C hII
==α
α−α
===β1
hII
FEV,IB
C
CEC
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<pnp 트랜지스터의 공통 이미터 전류와 전류 이득> <VEB와 IB, IC의 관계>
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<hFE 시험을 위한 전형적인 회로> <베이스 접지형 시험 회로>
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5. 면저항 1) 4-point probe 2) test pattern 이용 RS=(V/I)(1/면의 수) ( L >> t일 경우 )
<베이스 면저항 측정 패턴 (a)과 측정방법 (b)>
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3) Van der Pauw 저항 ( ) fRRR
IVR
IVR S 2
53.4 21
43
212
21
431
+===
−
−
−
−
보정 factor f = 1 : 대칭인 경우 f ≠ 1 : 비대칭인 경우
(Ω/)
<Van der Pauw 측정법>
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6. 포화상태에서의 collector 저항 측정
signallargefor
In)(saturatioVRR
IIn)(saturatioVRIRI
CB,IIC
CESCSE
CE
CESCCSEE
=+
≈=+
signalsmallfor
ΔIΔVRR
BIC
CESCSE =+
<VCE와 IC관계를 이용한 이미터와 콜렉터 저항 측정>
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<포화 저항 측정을 위한 VCE-IC특성 곡선 및 측정회로>
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1. 개요 1) n-Channel MOSFET / p- Channel MOSFET
2) manual 측정 / automatic 측정
3) parameters : VT, K, W, L, gm, M, BV, IL
4) NMOS 구조와 기호
<NMOS구조>
III & IV. MOS 변수 측정
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2. 전류방정식 1) 불포화 영역의 전류
( ) ( )[ ]
( )[ ]2DSDSTGSDS
'
ox
oxn'
2DSDSTGS
ox
oxn2DSDSTGSoxnDS
VVVV2KILWKK,
2TεμK
VVVV2LW
2TεμV
21VVV
LWCμI
−−=
==
−−=
−−=
<불포화 영역에서의 I-V 특성 곡선>
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2) 포화영역의 전류
( )2TGSDSTGSDS VVKIVVV −=−=
<포화 영역에서의 (a) I-V곡선과 (b) 채널 핀치-오프(pinch-off)>
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LW
T2K
ox
oxnεµ=
ox
oxn
T2, εµ
LW
: 공정 변수, : 설계 변수
<MOS 트랜지스터에서의 채널 형성>
3) 이득상수(gain):K
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( )( )
2
GS1GS2
DS1DS2
2TGS2DS2
2TGS1DS1
VVII
K
VVKI
VVKI
−−
=
−=
−= (1) 포화영역에서의 이득상수
<포화 영역에서의 K의 측정>
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< 채널 길이의 설계상의 길이와 공정후의 길이>
jmaskeff XLL 2−=
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( )ADSDSDS
DS
DSGS
VVVI
K
VV
µ9.42
6221049∆
=
∆−
=
∆∆
=
=
−
<포화 영역에서의 특성>
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<VDS=VGS 에서의 전류>
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( )( )( )( )( ) ( )[ ]
( )1GS2GSDS
1DS2DS'
DS1GS2GS'
1DS2DS
2DSDST2GS
'2DS
2DSDST1GS
'1DS
TGSDS
VVV2II
LWK
VVV2LWKII
VVVV2LWKI
VVVV2LWKI
VVV
−−
=
−=−
−−=
−−=
−⟨
(2) 불포화 영역에서의 이득상수
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<불포화 영역에서의 K 측정>
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( ) WL
0.8ΔIK
0.8II
680.22II
LWKK DS'DS1DS2DS1DS2' =
−=
−××−
==
< 불포화 영역에서의 K 측정 회로>
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I-V 곡선에서
( )( )
( )( ) 1II
VVIIV
VVKI
VVKI
1DS2DS
2GS1GS1DS2DST
2T2GS2DS
2T1GS1DS
−
−⋅=
−⋅=
−⋅=
1DS2DS I4I =
2GS1GST VV2V −=
으로 잡으면
3. 문턱전압 (VT)
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[그림 3-13] 문턱 전압의 측정
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<Plots of versus VD showing the effects of a bias VS-VB between the source and the bulk. The observed shift in threshold is predicted by Muller & Kamins, p 361. >
DI
0VBS ≠
BSS
2TSG
2TGSDS
VV)VVV(K)VV(KI
=
−−=−=
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( )1GS2GS
1DS2DSmsatDTG
'm
satDDSoxnVGS
DSm
VVIIg),VV(VV
LWK2g
)VV(VLWC|
VIg
DS
−−
=⟩−=
⟨µ=∆∆
=
<게이트 전압에 따른 I-V 특성>
4. Transconductance (gm )
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< gm측정을 위한 회로도>
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( )
BBB
T
BBBox
asiTT
'TT
22VVM
22VC
qN2VVVV
φ−φ+∆
=
φ−φ+ε
=∆−=∆
V3.0,V5V BB =φ= 일때 59.1VM T∆
=
<기판 효과 (M)>
5. Body effect ( M )
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<측면 확산 (∆L)>
6. Lateral diffusion and encroachment 1) 측면 확산
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<측면 확산 길이 측정>
( )[ ]LLL2,
I1constL
VVVV2LWKI
MDS
2DSDSTGS
'DS
−=∆=
−−=
L 측정
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2) 산화 잠식
<필드 산화막에 의한 잠식(새부리)>
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<산화잠식의 측정>
WconstIDS ⋅=
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<커브 트레이서를 이용한 ΔW의 결정>
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<접합 파괴의 원리> <펀치 쓰루>
7. 파괴전압 1) junction breakdown
2) punch-through breakdown
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3) breakdown voltage 측정
<역방향 파괴 전압 (a) 과 측정 회로 (b)>
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<누설 전류 특성 (a) 와 측정 회로 (b)>
4) 누설 전류 측정
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V. Probe Station
1. 구조와 탐침 1) 구조
<프로브 스테이션의 기본 구성 요소
<프로브 스테이션의 측면도>
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2) 탐침의 접촉
< 탐침과 웨이퍼의 접촉>
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<압력이 없을 때 접촉> <압력을 가하여 만든 양호한 접촉>
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<과다 압력으로 파괴된 모양>
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<양호한 접촉과 미끄러진 접촉의 흔적>
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3) 탐침의 세척
<프로브 팁의 세척 과정>
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4) planarity check ( probe card )
<평면성 조사 회로>
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5) 탐침 접촉 저항
<탐침 접촉 저항 측정>
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<압력에 대한 텅스텐 프로브의 접촉 저항>
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6) 힘의 크기에 따른 탐침의 변위
<예비 힘이 가해졌을 때의 힘에 따른 탐침 끝의 변위>