GiaotrinhVerilogHDL_v19

Gio trnh ngn ng Verilog HDL

I HC QUC GIA THNH PH H CH MINHTRNG I HC CNG NGH THNG TIN--------------oOo--------------

Gio trnhNGN NG M T PHN CNG VERILOGBin son:TS. V c Lung

ThS. Lm c Khi

Ks. Phan nh Duy2012Li ni uNgy nay, khi mch thit k vi hng triu cng logic c tch hp trong mt con Chip th vic thit k mch v i dy kt ni bng tay tr nn bt kh thi, chnh t l do mt khi nim ngn ng c mc tru tng cao dng m t thit k phn cng c ra i, chnh l Verilog. Cng vi s ra i ca ngn ng m t phn cng Verilog l hng lot cc cng c EDA (Electronic Design Automation) v CAD (Computer Aided Design) gip cho nhng k s thit k phn cng to nn nhng con Chip c tch hp rt cao, tc siu vit v chc nng a dng.

Gio trnh Ngn ng m t phn cng Verilog nhm gip sinh vin trang b kin thc v thit k vi mch. Gio trnh tp trung vo mng thit k cc mch s vi mch t hp v mch tun t. Gio trnh cng gii thiu v cc bc cn thc hin trong qu trnh thit k vi mch t vic m t thit k, kim tra, phn tch cho n tng hp phn cng ca thit k.

Gio trnh Ngn ng m t phn cng Verilog dng cho sinh vin chuyn ngnh K thut my tnh v sinh vin cc khi in t. tip nhn kin thc d dng, sinh vin cn trang b trc kin thc v thit k s v h thng s.

Gio trnh ny c bin dch v tng hp t kinh nghim nghin cu ging dy ca tc gi v ba ngun ti liu chnh: IEEE Standard for Verilog Hardware Description Language, 2006; Verilog Digital System Design, Second Edition, McGraw-Hill; The Complete Verilog Book, Vivek Sagdeo, Sun Micro System, Inc.Nhm cung cp mt lung kin thc mch lc, gio trnh c chia ra lm 9 chng:

Chng 1: Dn nhp thit k h thng s vi Verilog. Chng ny s gii thiu lch s pht trin ca ngn ng m t phn cng Verilog, bn cnh mt qui trnh thit k vi mch s dng ngn ng m t phn cng Verilog cng c trnh by c th y. Chng 2: Trnh by cc t kha c s dng trong mi trng m t thit k bi Verilog. Chng 3: Trnh by cc loi d liu c s dng trong thit k mch bi Verilog, gm hai loi d liu chnh l loi d liu net v loi d liu bin. Chng 4: Trnh by cc ton t cng nh cc dng biu thc c h tr bi Verilog. Chng 5: Gii thiu cu trc ca mt thit k, phng thc s dng thit k con. Chng 6: Trnh by phng php thit k s dng m hnh cu trc, trong phng thc ny, module thit k c xy dng bng cch gi cc module thit k nh hn v kt ni chng li. Chng 7: Trnh by phng thc thit k s dng m hnh RTL bi php gn ni tip v m hnh hnh vi s dng ngn ng c tnh tru tng cao tng t nh ngn ng lp trnh. Phn thit k my trng thi s dng m hnh hnh vi cng c nu ra trong chng ny. Chng 8: Trnh by phng php thit k v s dng tc v v hm.

Chng 9: Gii thiu cc phng php kim tra chc nng ca thit k.Do thi gian cng nh khi lng trnh by gio trnh khng cho php tc gi i su hn v mi kha cnh ca thit k vi mch nh phn tch nh thi, tng hp phn cng, ... c c nhng kin thc ny, c gi c th tham kho trong cc ti liu tham kho m gio trnh ny cung cp.

Mc d nhm tc gi c gng bin son k lng tuy nhin cng kh trnh khi nhng thiu st. Nhm tc gi mong nhn c nhng ng gp mang tnh xy dng t qu c gi nhm chnh sa gio trnh hon thin hn.Nhm tc gi

Contents

2Li ni u

101Chng 1. Dn nhp thit k h thng s vi Verilog

101.1Qui trnh thit k s

121.1.1Dn nhp thit k

131.1.2Testbench trong Verilog

131.1.3nh gi thit k

131.1.3.1M phng

151.1.3.2K thut chn kim tra (assertion)

161.1.3.3Kim tra thng thng

161.1.4Bin dch v tng hp thit k

171.1.4.1Phn tch

171.1.4.2To phn cng

171.1.4.3Ti u logic

181.1.4.4Binding

181.1.4.5Sp xp cell v i dy kt ni

191.1.5M phng sau khi tng hp thit k

201.1.6Phn tch thi gian

201.1.7To linh kin phn cng

201.2Ngn ng m t phn cng Verilog (Verilog HDL)

201.2.1Qu trnh pht trin Verilog

211.2.2Nhng c tnh ca Verilog

211.2.2.1Mc chuyn mch

211.2.2.2Mc cng

221.2.2.3 tr hon gia pin n pin

221.2.2.4M t Bus

221.2.2.5Mc hnh vi

221.2.2.6Nhng tin ch h thng

221.2.2.7PLI

221.2.3S lc v Verilog

231.3Tng kt

231.4Bi tp

252Chng 2. Qui c v t kha

252.1Khong trng

252.2Ch thch

252.3Ton t

252.4S hc

262.4.1Hng s nguyn

292.4.2Hng s thc

302.4.3S o

302.5Chui

302.5.1.1Khai bo bin chui

302.5.1.2X l chui

312.5.1.3Nhng k t c bit trong chui

312.6nh danh, t kha v tn h thng

322.6.1nh danh vi k t

322.6.2Tc v h thng v hm h thng

332.7Bi tp

703Chng 3. Loi d liu trong Verilog

703.1Khi qut

703.2Nhng h thng gi tr

713.3Khai bo loi d liu

713.3.1Gii thiu

723.4Khai bo loi d liu net

723.4.1Gii thiu

733.4.2Wire v Tri

753.4.3Wired net

753.4.3.1Wand v triand Nets

763.4.3.2Wor v Tri or

763.4.4Tri reg net

773.4.5Tri 0 v Tri 1 Nets

773.4.6Supply0 v Supply1 Nets

783.4.7Thi gian tr hon trn net

793.5Khai bo loi d liu bin - reg

793.6Khai bo port

793.6.1Gii thiu

793.6.2input

803.6.3output

803.6.4inout

803.7Khai bo mng v phn t nh mt v hai chiu.

803.7.1Gii thiu

813.7.2Mng net

813.7.3Mng thanh ghi

823.7.4Mng phn t nh

833.8Khai bo loi d liu bin

833.8.1Gii thiu

833.8.2Integer

833.8.3Time

843.8.4S thc (real) v thi gian thc (realtime)

853.9Khai bo tham s

853.9.1Gii thiu

853.9.2Tham s module (module parameter)

853.9.2.1Parameter

853.9.2.1.1Gii thiu

863.9.2.1.2Thay i gi tr ca tham s khai bo parameter

863.9.2.1.2.1Pht biu defparam

873.9.2.1.2.2Php gn gi tr tham s khi gi instance ca module

923.9.2.1.3S ph thuc tham s

923.9.2.2Tham s cc b (local parameter)

923.9.3Tham s c t (specify parameter)

943.10Bi tp

954Chng 4. Ton t, Ton hng v Biu thc

954.1Biu thc gi tr hng s

964.2Ton t

964.2.1Ton t vi ton hng s thc

974.2.2Ton t u tin

984.2.3S dng s nguyn trong biu thc

994.2.4Th t tnh ton trong biu thc

994.2.5Ton t s hc (+, -, *, /, %, **, +, -)

1014.2.6Biu thc s hc vi tp thanh ghi (regs) v s nguyn (integer)

1024.2.7Ton t quan h (>, =, >, >, =, Ton t dch (shift)

2. Bin d liu khng c khai bo rng ca bin, vic tnh ton c thc hin dng chun nh dng IEEE floating point.3. Bin d liu c gi tr mc nh l 0.Thi gian thc (realtime) c khai bo v s dng tng t nh s thc (real), chng c th hon i cho nhau.

V d 3.21real float;realtime rtime;

3.9 Khai bo tham s

3.9.1 Gii thiu

Trong Verilog HDL, loi d liu tham s (parameter) khng thuc loi d liu bin (reg, integer, time, real, realtime) cng nh loi d liu net (wire, tri, wand, wor,...). D liu tham s khng phi l bin m chng l hng s. C hai loi tham s trong Verilog l: Tham s module (module parameter): parameter v localparam. Tham s c t (specify parameter): specparam.C hai loi tham s trn u c php khai bo rng. Mc nh, parameter v specparam s c rng cha gi tr ca hng s, ngoi tr khi tham s c khai bo rng. Vic khai bo trng tn gia net, bin hay tham s l khng c php.3.9.2 Tham s module (module parameter)

Tham s module c hai loi khai bo: parameter v localparam (local parameter).

3.9.2.1 Parameter3.9.2.1.1 Gii thiu

Gi tr ca khai bo parameter trong mt module c th c thay i t bn ngoi module bng pht biu defparam hoc pht biu gi th hin (instance) ca module . Thng thng khai bo parameter c dng m t nh thi hoc rng ca bin.

V d 3.22parameter msb = 1;

// nh ngha tham s msb c gi tr hng s l 1parameter e = 43, f =789; // nh ngha hai hng sparameter r = 46.7;

// khai bo r l mt hng s thc

parameter byte_size = 9,

byte_mask = byte_size - 6;parameter average_delay = (r + f) / 2;

parameter signed [3:0] mux_selector = 0;

parameter real r1 = 3.6e19;parameter p1 = 13'h7e;parameter [31:0] dec_const = 1'b1; // gi tr c i sang 32 bit

parameter newconst = 3'h4;

// ng l tham s ny c rng [2:0]

parameter newconst = 4;

// ng l tham s ny c rng ti thiu l 32 bit.

3.9.2.1.2 Thay i gi tr ca tham s khai bo parameterMt tham s module c th c m t loi d liu v m t rng. S tc ng ca gi tr tham s mi khi n ln gi tr ca tham s c khai bo ban u trong module, vi m t loi d liu v m t rng s tun theo nhng qui lut sau:

Mt khai bo tham s m khng m t loi d liu v rng, s c loi d liu v rng mc nh ca gi tr cui cng c gn vo tham s . Mt khai bo tham s m khng m t loi d liu m ch m t rng, th rng ca tham s s khng i, cn loi d liu s l unsigned khi gi tr mi c ln. Mt khai bo tham s m ch m t loi d liu m khng m t rng, th loi d liu ca tham s s khng i, cn rng s c gi tr cha gi tr mi c ln. Mt khai bo tham s va m t loi d liu l c du, va m t c rng, th loi d liu v rng ca tham s cng s khng i khi gi tr mi c ln.Trong Verilog c hai cch thay i gi tr ca tham s c khai bo bi parameter: Mt l pht biu defparam, vi pht biu ny n s cho php gn gi tr mi vo tham s trong module bng cch dng tn gi mt cch phn cp.

Hai l php gn gi tr tham s khi gi instance ca module , bng cch ny s cho php thay i gi tr tham s trong cng mt dng vi vic gi instance ca module .

3.9.2.1.2.1 Pht biu defparamS dng pht biu defparam, gi tr tham s c th c thay i bn trong instance ca module thng qua vic s dng tn phn cp ca tham s. Tuy nhin, pht biu defparam c m t trong mt instance hoc mt dy cc instance th s khng lm thay i gi tr tham s trong nhng instance khc ca cng mt module.Biu thc bn phi ca php gn defparam l biu thc hng s ch bao gm s v nhng tham s tham chiu c khai bo trc trong cng module vi pht biu defparam.Pht biu defparam c bit hu dng v ta c th nhm tt c cc php gn thay i gi tr cc tham s ca cc module khc nhau ch trong mt module.Trong trng hp c nhiu pht biu defparam cho mt tham s duy nht th gi tr tham s s ly gi tr ca pht biu defparam sau cng. Nu pht biu defparam ca mt tham s c khai bo trong nhiu file khc nhau th gi tr ca tham s s khng c xc nh.

V d 3.23module top;reg clk;reg [0:4] in1; reg [0:9] in2; wire [0:4] o1; wire [0:9] o2;vdff m1 (o1, in1, clk);vdff m2 (o2, in2, clk);endmodulemodule vdff (out, in, clk);parameter size = 1, delay = 1;// hai tham s theo th tinput [0:size-1] in;input clk;output [0:size-1] out; reg [0:size-1] out; always @(posedge clk)# delay out = in;endmodule module annotate;defparam top.m1.size = 5,

// thay i tham s size ca m1top.m1.delay = 10, // thay i tham s delay ca m1top.m2.size = 10,

// thay i tham s size ca m2top.m2.delay = 20; // thay i tham s delay ca m2endmodule

Trong V d 3.22, module annotate c pht biu defparam, gi tr t pht biu ny s ln nhng gi tr tham s size v delay trong instance m1 v m2 trong module top. Hai module top v annotate u c xem nh module top-level.3.9.2.1.2.2 Php gn gi tr tham s khi gi instance ca moduleTrong Verilog c mt phng php khc dng gn gi tr n mt tham s bn trong instance ca mt module, l s dng mt trong hai dng ca php gn gi tr tham s trong instance ca module. Mt l php gn theo th t danh sch tham s, hai l php gn bi tn. Hai dng php gn ny khng th t ln ln vi nhau m chng ch c th l mt trong hai dng cho ton b instance ca module.Vic gn gi tr tham s instance ca module theo th t danh sch tham s, tng t nh vic gn gi tr tr hon cho nhng cng ca instance; cn vic gn gi tr tham s instance ca module theo tn tham s, th tng t nh vic kt ni port ca module bi tn. N gn nhng gi tr tham s cho nhng instance c th m trong module ca nhng instance ny nh ngha nhng tham s trn.Mt tham s m c khai bo trong mt block, mt tc v hay mt hm ch c th khai bo li mt cch trc tip dng pht biu defparam. Tuy nhin, nu gi tr tham s ny ph thuc vo mt tham s th hai, th vic nh ngha li gi tr tham s th hai cng s cp nht gi tr ca tham s th nht.Sau y ta xt chi tit hai php gn tham s ny.

1. Php gn gi tr tham s theo th t danh sch tham sTh t ca nhng php gn trong php gn gi tr tham s theo th t danh sch tham s instance ca module, s theo th t tham s lc khai bo bn trong module. N khng cn thit phi gn gi tr cho tt c cc tham s c bn trong module khi dng phng php ny. Tuy nhin, ta khng th nhy qua mt tham s, do gn nhng gi tr cho mt phn nhng tham s trong tt c cc tham s khai bo trong module, th nhng php gn thay th gi tr ca mt phn nhng tham s , s ng trc nhng khai bo ca nhng tham s cn li. Mt phng php khc l phi gn gi tr cho tt c cc tham s nhng dng gi tr mc nh (cng c gi tr nh c gn trong khai bo tham s trong nh ngha module) cho cc tham s m khng cn c gi tr mi.Xt V d 3.24, trong v d ny nhng tham s bn trong instance ca nhng module mod_a, mod_c, v mod_d c thay i trong khi gi instance.

V d 3.24module tb1;wire [9:0] out_a, out_d; wire [4:0] out_b, out_c; reg [9:0] in_a, in_d;reg [4:0] in_b, in_c;reg clk;/* Bn instance ca module vdff vi php gn gi tr tham s theo th t danh sch tham s*/// mod_a c hai gi tr tham s mi size=10 v delay=15 vdff #(10,15) mod_a (.out(out_a), .in(in_a), .clk(clk));// mod_b c gi tr tham s mc nh l (size=5, delay=1) vdff mod_b (.out(out_b), .in(in_b), .clk(clk)); // mod_c c mt gi tr tham s mc nh l size=5 v mt gi tr mi l delay=12vdff #( 5,12) mod_c (.out(out_c), .in(in_c), .clk(clk));*/ thay i gi tr ca tham s delay, ta cng cn phi m t gi tr mc nh ca tham s size*//* mod_d c mt gi tr tham s mi l size=10, v gi tr tham s delay vn gi gi tr mc nh ca n./*

vdff #(10) mod_d (.out(out_d), .in(in_d), .clk(clk));endmodulemodule vdff (out, in, clk);

parameter size=5, delay=1; // tham s vi gi tr mc nhoutput [size-1:0] out;input [size-1:0] in;input clk;reg [size-1:0] out;always @(posedge clk)#delay out = in;endmodule

Nhng gi tr ca tham s cc b (localparam) khng th b ln, do chng khng c xem nh l mt phn th t ca danh sch cho php gn gi tr tham s. Trong V d 3.25, addr_width s c gn gi tr 12, v data_width s c gn gi tr 16, mem_size s khng c gn gi tr mt cch tng minh do th t danh sch, nhng n s c gi tr 4096 do biu thc khai bo ca n.

V d 3.25module my_mem (addr, data);

parameter addr_width = 16;//th t tham s th nht

localparam mem_size = 1 >= < , >=, Ton t dch (shift)

4.2.2 Ton t u tin

Th t u tin ca cc ton t trong Verilog c m t trong Bng 4.4

Bng 4.4 Th t u tin ca ton t+ - ! ~ & ~& | ~| ^ ~^ ^~(ton t mt ngi) u tin cao nht

** u tin cao nh

* / % u tin gim dn t cao xung thp

> >

< >=

== != === !==

&(ton t 2 ngi)

^ ^~ ~^(ton t 2 ngi)

|(ton t 2 ngi)

&&

||

?: u tin thp nh

{} {{}} u tin thp nht

Cc ton t trong cng mt dng trong Bng 4.4 c th t u tin nh nhau. Cc dng c sp xp theo th t tng dn u tin. V d cc ton t *, /, v % c cng u tin v u tin ca n cao hn ton t + v -.Tt c cc ton t s c thc hin t tri sang phi, ngoi tr ton t iu kin (?:), n c thc hin t phi sang tri. S kt hp ton t theo th t i vi cc ton t c cng u tin. V vy, trong v d ny B s cng vi A v sau ly tng A+B tr cho C:A+B-CKhi ton t c u tin khc nhau, th ton t c u tin cao s thc hin trc. Trong v d tip theo, B s chia cho C (ton t chia c u tin cao hn), v sau kt qu s c cng thm A:A+B/CDu ngoc c th s dng thay i u tin ca ton t, v d sau A s cng vi B ri sau ly tng chia cho C:(A+B)/C // khng ging vi A+B/C

4.2.3 S dng s nguyn trong biu thc

S nguyn c th s dng nh mt ton hng trong biu thc. Mt s nguyn c th biu din nh l:

Mt s nguyn khng du, khng c s (v d: 12,). Mt s nguyn khng du, c c s (v d: d12, sd12,). Mt s nguyn c du, c c s (v d: 16d12,16sd12,).S nguyn c hiu l c du nu gia du nhy n ' v k t m t c s c thm k t s hoc S.

Mt gi tr ph nh (c du tr trc) ca mt s nguyn khng ch r c s (v d: -12), s c nh gi khc vi mt s nguyn ch r c s (v d: -'d12) nh sau:

Mt gi tr ph nh ca s nguyn, khng ch r c s, s c nh gi nh l mt s khng du gm hai phn: du v gi tr. V d:integer IntA = -12;// phn du l '-', phn gi tr l 12 => l s m 12

// biu din trong Verilog l: 100 ...000 1100 (32bit)

Mt gi tr ph nh ca s nguyn khng du, c c s (v d: -4'd12) s c nh gi nh l mt gi tr khng du. V d:integer IntA = -'d 12;// l s khng du, c gi tr -12=>l s b 2 (32bit) ca 12

= 111111 0100(32bit)=231+230+..+25+24+ 4 = 232-12 =4294967284

V d 4.1 ch ra 4 cch vit biu thc "-12 chia 3". Ch rng c hai gi tr "-12" v "-'d12" c nh gi l ging nhau v 2 thnh phn bit, nhng trong biu thc "-'d12" khng cn c nh danh nh l mt s ph nh c du.

V d 4.1integer IntA;

IntA = -12 / 3;

// kt qu l -4.

IntA = -'d 12 / 3;

// kt qu l 1431655761.

IntA = -'sd 12 / 3;

// s c du m 12 (1000000 1100-32bit)=>kt qu l -4.

IntA = -4'sd 12 / 3; // 4'sd12 l mt s c du 4-bit bng 1100 = -4,

// vy (-4'sd12)= -(-4) = 4 => kt qu l 1.

4.2.4 Th t tnh ton trong biu thc

Ton t phi thc hin theo cc quy tc kt hp trong khi nh gi mt biu thc nh c miu t trong Mc 4.2.2. Tuy nhin, nu kt qu cui cng ca biu thc c th c pht hin sm hn, th ton b biu thc khng cn c nh gi ht. iu ny gi l ngn mch (short-circuiting) mt nh gi biu thc, vic ngn mch nh gi mt biu thc xy ra khi trong biu thc dng cc ton t n (&, |, ) thay v ton t i (&&, ||).V d 4.2Reg regA, regB, regC, result;

Result = regA&(regB|regC)

Nu gi tr ca regA l 0 th kt qu ca biu thc c pht hin l 0 m khng cn tnh ton gi tr ca biu thc con (regB|regC).4.2.5 Ton t s hc (+, -, *, /, %, **, +, -) Ton t hai ngi c a ra trong Bng 4.5

Bng 4.5 Ton t hai ngia+ba cng b

a-ba tr b

a*ba nhn b

a/ba chia b

a%ba chia b ly d

a**ba ly tha b

Php chia: Trong php chia s nguyn, cn phn tch phn s khi mu s l s 0. i vi php chia v php chia ly phn nguyn (/), nu ton hng th 2 l 0 th kt qu ca ton b biu thc phi l x. Trong php chia ly phn d (%), v d y%z, cho ra kt qu l phn d khi ly y chia cho z, v vy khi z = 0 th kt qu chnh l y, khi kt qu ca php chia ly d c gn bng ton hng u tin.Bng 4.6 Ton t chiaBiu thcKt quCh thch

10%3110 chia 3 d 1

12%3012 chia 3 khng d

-10%3-1Du ca kt qu l du ca ton hng u tin

11%-32Du ca kt qu l du ca ton hng u tin

Php ly tha: Nu mt trong hai ton hng i vi ton t ly tha l s thc, th kt qu cng l s thc. Kt qu ca ton t ly tha l khng xc nh nu ton hng th nht l 0 v ton hng th hai khng dng, hoc nu ton hng th nht l s m v ton hng th hai khng l mt s nguyn. Nu c hai ton hng ca ton t ly tha l s thc th cc loi kt qu c th hin trong phn 4.5.1v 4.6.1. Kt qu l bx nu ton hng th nht l 0 v ton hng th hai l mt s m. Kt qu l 1 nu ton hng th 2 l 0. Trong tt c cc trng hp, ton hng th hai ca ton t ly tha phi c xem l na xc thc.Nhng iu ny s c minh ha trong Bng 4.7. v v d trong Bng 4.8.Bng 4.7 Ton t ly thaTon hng 1(op1)Ton hng 2 (op2)m 1

dngop1**op2op2 l chn ->-1

op2 l l ->101op1**op2

011111

m0op2 l chn ->-1

op2 l l ->1bx10

Bng 4.8 Ton t chia ly d v ly tha-4d12%31-4d12 c gi tr l 1

3**293*3

2**382*2*2

2**01Bt k s no ly tha 0 cng bng 1

2.0**-3sb10.52.0 l s thc, nn kt qu cng l s thc

2**-3sb102**-1=1/2, c phn nguyn l s 0

0**-1bx0 ly tha s m l mt s khng xc nh

9**0.53.0Kt qu l mt s thc

9.0**(1/2)1.0 kt qu l 0

-3.0**2.09.0Kt qu l mt s thc

Ton t s hc mt ngi: Ton t ny c quyn u tin cao hn i vi ton t nh phn, ton t mt ngi c a ra trong Bng 4.7

Bng 4.7 Ton t s hc mt ngi+mTon t mt ngi cng m

-mTon t mt ngi tr m

i vi ton t s hc, nu bt k ton hng no c gi tr bit l khng xc nh X v tr khng cao Z th kt qu chung ca biu thc phi l X.4.2.6 Biu thc s hc vi tp thanh ghi (regs) v s nguyn (integer)

Mt gi tr c gn cho mt bin reg hoc net c xem nh l mt gi tr khng du, nu khng, bin reg hoc net phi c khai bo r rng l c du. Mt gi tr c gn cho mt bin integer, real hoc realtime, c xem nh l mt gi tr c du. Mt gi tr c gn cho bin time c xem nh l mt gi tr khng du. Gi tr c du s s dng mt biu din hai thnh phn, ngoi tr khi chng c gn cho bin real v realtime th gi tr s s dng biu din du chm ng. S chuyn i gia gi tr c du v khng du s gi nguyn s biu din, ch thay i s th hin.Bng 4.9 a ra cch gii thch mi loi d liu trong ton t s hc:Bng 4.9 Loi d liu trong ton t s hcLoi d liuGii thch

net khng duKhng du

net c duC du, b 2

reg khng duKhng du

reg c duC du, b 2

integerC du, b 2

timeKhng du

real, realtimeC du, du chm ng

Theo V d 4.3 s cho thy nhiu cch khc nhau chia tr 12 chia 3- s dng d liu loi integer v reg trong biu thc.

V d 4.3integer intA;reg [15:0] regA;reg signed [15:0] regS;intA = -4'd12; // kt qu ca biu thc l -4,regA = intA / 3; // intA l d liu loi integer, regA bng 65532regA = -4'd12; // regA bng 65524intA = regA / 3; // Kt qu ca biu thc 21841,

// regA l d liu loi regintA = -4'd12 / 3; // kt qu ca biu thc l 1431655761.

// -4'd12 thc t l mt d liu loi reg 32-bit regA = -12 / 3; // kt qu ca biu thc l -4,

//-12 thc t l mt d liu loi integer.regS = -12 / 3;

// kt qu ca biu thc l -4, regS l mt reg c duregS = -4'sd12 / 3; // kt qu ca biu thc l 1. -4'sd12 l 4.

// Theo lut chia s nguyn ly phn d 4/3==1.

4.2.7 Ton t quan h (>, =, >: s in vo v tr bit trng s 0 nu kt qu l loi khng du, ngc li, nu kt qu l loi c du, n s in vo v tr bit trng, gi tr bit c ngha nht ca ton hng bn tri. Nu ton hng bn phi c dng gi tr x hoc z, th kt qu s khng xc nh (x). Ton hng bn phi lun lun c xem nh l mt s khng du v khng c nh hng n du ca kt qu. Du ca kt qu c xc nh bng ton hng bn tri v s d ca biu thc nh m t trong Mc 4.6.1.

V d 4.6V d 1: Trong v d ny, thanh ghi result c gn gi tr nh phn 0100, do dch gi tr nh phn 0001 sang tri hai v tr v in s 0 vo v tr trng:

module shift;

reg [3:0] start, result;

initial begin

start = 1;

result = (start >= < > >> > 1;

// s thc thi ng

Xt v d tip theo:

V d 4.19module bitlength();

reg [3:0] a,b,c; // a, b, c l 4 bit

reg [6:0] d;

// d l 7 bit

initial begin

a = 9; b = 8; c = 1;

$display("answer = %b", c ? (a&b) : d);// v c=1 nn (a&b) c chn

end endmoduleCu lnh $display s hin th:

answer = 0001000// 7 bit

Bng cch t n, biu thc a&b c chiu di l 4 bit, nhng bi v trong ni dung ca biu thc iu kin, n s s dng di bit ln nht (Bng 4.2.2), vy nn biu thc a&b s c di l 7, l di ca d.

4.5.3 V d minh ha v biu thc t xc nh

V d 4.20reg [3:0] a; reg [5:0] b; reg [15:0] c; initial begin

a = 4'hF;

b = 6'hA;

$display("a*b=%h", a*b); // Kch thc ca biu thc t xc nh => bng 6

c = {a**b}; // biu thc a**b l t xc nh trong ton t kt ni {}

$display("a**b=%h", c);

c = a**b; // Kch thc ca biu thc xc nh bi c

$display("c=%h", c);end

Kt qu m phng ca v d ny:

a*b=16 // 'h96 b ct b cn 'h16 v kch thc ca biu thc l 6a**b=1 // kch thc ca biu thc 4 bit (kch thc ca a)

c=ac61 // kch thc ca biu thc 16 bit (kch thc ca c)

4.6 Biu thc c du

iu khin du ca mt biu l rt quan trng to ra mt kt qu ph hp. Thm vo , tun theo cc lut trong cc mc t Mc 4.6.1 ti Mc 4.6.4, hai chc nng h thng s s dng iu khin theo cc loi khun kh trong biu thc: $signed() v $usnigned(). Cc hm ny s tnh ton cc biu thc u vo v tr v mt gi tr c cng kch c. Gi tr ca biu thc u vo v c nh ngha bi cc hm:

$signed

tr v mt gi tr c du

$unsigned tr v mt gi tr khng du

V d 4.21reg [7:0] regA, regB;reg signed [7:0] regS;regA = $unsigned(-4);

// regA = 8'b11111100

regB = $unsigned(-4'sd4); // regB = 8'b00001100

regS = $signed (4'b1100); // regS = -4

4.6.1 Qui nh cho nhng loi biu thc

Cc lut cho vic xc nh kt qu loi cho mt biu thc:

Loi biu thc ch ph thuc vo ton hng. N khng ph thuc vo v bn tri. S thp phn l c du. S c s l khng c du, ngoi tr trng hp c thm k hiu s c s dng trong c s ch nh (nh l 4sd12). Kt qu ca bit-select l khng du, bt chp ton hng. Kt qu ca part-select l khng du, bt chp ton hng, thm ch nu part-select ch nh ton b vector. V d:reg [15:0] a;

reg signed [7:0] b;

initial

a = b[7:0]; // b[7:0] l khng du

Ku qu ca ton t kt ni l khng du, bt chp ton hng. Kt qu ca ton t so snh (1,0) l khng du, bt chp ton hng. Chuyn i t s thc sang s nguyn bng loi cng bc l c u. Du v kch c ca ton hng t xc nh, c xc nh bi t ton hng v c lp vi yu cu ca biu thc. i vi ton hng khng t xc nh, p dng cc lut sau: Nu bt k ton hng no l s thc, kt qu l s thc. Nu bt k ton hng no l khng du, kt qu l khng du, bt chp ton t. Nu tt c ton hng no l c du, kt qu l c du, bt chp ton t, ngoi tr trng hp c ch r theo cch khc.4.6.2 Nhng bc nh gi mt biu thc

Cc bc tnh ton mt biu thc:

Xc nh kch c ca biu thc da trn cc chun v lut xc nh kch c ca biu thc bn trn. Xc nh du ca biu thc s dng cc lut Mc 4.6 Truyn li cc loi v kch thc ca biu thc (hoc t xc nh biu thc con tr xung ton hng) xc nh theo ng cnh ca biu thc. Ni chung, ton hng xc nh theo ng cnh ca mt ton t s ging loi v kch thc ca kt qu ton t. Tuy nhin, c 2 ngoi l: Nu kt qu ca ton t l s thc v nu n c ton hng xc nh theo ng cnh m khng phi s thc, th ton hng s i x nh th nu n l t xc nh, th n s chuyn i sang s thc trc khi ton t c p dng. Ton t quan h v ton t bng c ton hng, m khng hon ton l t xc nh hoc khng hon ton l xc nh theo ng cnh. Ton hng s nh hng ln nhau nh l nu chng l ton hng xc nh theo ng cnh, vi loi v kch thc ca kt qu (kch thc ln nht ca 2 ton hng) xc nh theo chng. Tuy nhin, loi kt qu thc s s lun l 1 bit khng du. Loi v kch thc ca ton hng s c lp vi phn cn li ca biu thc v ngc li.

Khi truyn t ti mt ton hng n gin nh c nh ngha Mc 5.2 th ton hng s chuyn i truyn t loi v kch thc. Nu mt ton hng c m rng th n s ch m rng du nu loi truyn t l c du.

4.6.3 Nhng bc nh gi mt php gn

Cc bc tnh ton mt php gn: Xc nh kch thc ca phn bn phi bng chun v lut xc nh kch thc ca php gn. Nu cn, m rng kch thc ca ton t bn phi, thc hin m rng bit du nu v ch nu phn bn phi ca ton t l c du.

4.6.4 Tnh ton nhng biu thc ca hai s c du X v Z

Nu mt ton hng c du b thay i kch thc ti mt kch thc c du ln hn v gi tr ca bit du l x, th gi tr ca kt qu s in thm Xs. Nu bit du l c gi tr l z, th gi tr ca kt qu s in thm Zs. Nu gi tr du ca bt k bit no l x hoc z, th ton t khng hp logic bt k, s c gi gi tr ca kt qu s l z v loi ph hp vi loi ca biu thc.4.7 Nhng php gn v php rt gn

Nu chiu rng ca biu thc bn phi ln hn chiu rng ca biu thc bn tri trong php gn, th MSBs ca biu thc bn phi s lun lun b loi b ph hp vi kch thc ca biu thc bn tri. Qu trnh thc hin khng yu cu cnh bo hoc bo co bt k li no lin quan n kch thc ca php gn khng ph hp hoc b ct ngn. Ct ngn bit du ca biu thc c du s thay i du ca kt qu.

V d 4.22V d 1:

reg [5:0] a;

reg signed [4:0] b;

initial begin

a = 8'hff; // sau khi gn, a = 6'h3f

b = 8'hff; // sau khi gn, b = 5'h1f

endV d 2:

reg [0:5] a;

reg signed [0:4] b, c;

initial begin

a = 8'sh8f; // sau khi gn, a = 6'h0f

b = 8'sh8f; // sau khi gn, b = 5'h0f

c = -113; // sau khi gn, c = 15

// 1000_1111 = (-'h71 = -113) b ct ngn cn ('h0F = 15)

end

V d 3:

reg [7:0] a;

reg signed [7:0] b;

reg signed [5:0] c, d;

initial begin

a = 8'hff;

c = a;

// sau khi gn, c = 6'h3f b = -113;

d = b;

// sau khi gn, d = 6'h0f

end

4.8 Bi tp

1. Nu cc ton t thng dng v u tin ca chng?2. Nu th t tnh ton trong mt biu thc logic?3. Cch s dng s nguyn trong biu thc?4. C bao nhiu loi ton hng trong Verilog? M t c th tng loi?5. Cc lut xc nh du cho kt qu ca mt biu thc?6. Cc bc nh gi tr ca mt biu thc?7. Cho a, b, c, d, e c khai bo nh sau:

reg [7:0] a, b; reg [8:0]c; reg [15:0] d; nh gi tr ca cc biu thc sau: a = 255; b = 255; c = a + b; c = 9'b0 + a + b; d={a,b}; c = &b;

5 Chng 5.Cu trc phn cp v module5.1 Cu trc phn cp

Ngn ng m t phn cng Verilog h tr cu trc phn cp bng cch cho php module c nhng trong module khc, module cp cao hn to th hin ca module cp thp hn v giao tip vi chng thng qua cc u vo, u ra v u vo-ra 2 chiu. Cc cng vo ra c th l v hng hoc l vector.Cu trc phn cp gip ngi thit k chia mt h thng thit k ra thnh cc module nh hn d thit k v kim sot lung d liu trong qu trnh thit k.Nh mt v d cho h thng module phn cp, hy xem xt mt h thng bao gm cc bng mch in (PCBs).

5.2 Module5.2.1 Khai bo moduleTrong mc ny cung cp c php thng thng cho mt nh ngha module v c php cho vic ci t module, cng vi mt v d v nh ngha module v ci t module.

Mt nh ngha module c bao gia bi hai t kha module v endmodule. Cc nh danh km theo sau t kha module s l tn nh ngha ca module; danh sch cc ty chn ca tham s c nh ngha, s ch r mt danh sch theo th t cc tham s ca module; danh sch cc ty chn ca cng hoc khai bo cng c nh ngha, s ch r mt danh sch theo th t cc cng ca module. Th t c s dng trong nh ngha danh sch cc tham s v trong danh sch cng, c th c ngha trong vic ci t cc module. Cc nh danh trong danh sch ny s khai bo li trong cc cu lnh input, output, v inout trong nh ngha module. Khai bo cng trong danh sch khai bo cng s khng khai bo li trong thn module. Cc mc ca module nh ngha ci to thnh module, v chng bao gm nhiu loi khai bo v nh ngha khc nhau, nhiu trong s c gii thiu.T kha macromodule c th dng thay th t kha module nh ngha mt module. Mt qu trnh thc thi c th chn gii quyt module c nh ngha bt u vi th kha macromodule khc nhau. C php khai bo module c cho trong c php 5-1:C php 5-1module_declaration ::=

{attribute_instance} module_keyword

module_identifier [module_parameter_port_list ]

list_of_ports ; { module_item }

endmodule

|{ attribute_instance } module_keyword

module_identifier [module_parameter_port_list ]

[ list_of_port_declarations ] ; { non_port_module_item }

endmodulemodule_keyword ::= module | macromodulemodule_parameter_port_list ::= (From A.1.3

# ( parameter_declaration { , parameter_declaration } )

list_of_ports ::= ( port { , port } )

list_of_port_declarations ::= ( port_declaration { , port_declaration } ) | ( ) port ::= [ port_expression ] | . port_identifier ( [ port_expression ] ) port_expression ::= port_reference | { port_reference { , port_reference } } port_reference ::= port_identifier [ [ constant_range_expression ] ]

port_declaration ::= {attribute_instance} inout_declaration

| {attribute_instance} input_declaration

| {attribute_instance} output_declaration module_item ::= (From A.1.4)

port_declaration ;

| non_port_module_item module_or_generate_item ::={ attribute_instance } module_or_generate_item_declaration

| { attribute_instance } local_parameter_declaration ;

| { attribute_instance } parameter_override

| { attribute_instance } continuous_assign

| { attribute_instance } gate_instantiation

| { attribute_instance } udp_instantiation

| { attribute_instance } module_instantiation

| { attribute_instance } initial_construct

| { attribute_instance } always_construct

| { attribute_instance } loop_generate_construct

| { attribute_instance } conditional_generate_construct module_or_generate_item_declaration ::= net _declaration

| reg_declaration

| integer_declaration

| real_declaration

| time_declaration

| realtime_declaration

| event_declaration

| genvar_declaration

| task_declaration

| function_declaration non_port_module_item ::=module_or_generate_item

|generate_region

| specify_block

| { attribute_instance } parameter_declaration ;

| { attribute_instance } specparam_declaration parameter_override ::= defparam list_of_defparam_assignments ;

V d 5.1 nh dng ca mt module chunmodule tn_module (danh sch cc cng, nu c);

Khai bo port: input, output, inout;

Khai bo tham s: parameter

Khai bo cc loi d liu (d liu net, d liu bin, v d: wire, reg, integer)

Gi v gn c tnh (instantiate) module con (sub-module)

Pht biu gn s dng m hnh RTL (assign)

Pht biu gn qui trnh (always, initial)

Khai bo hm v tc v

endmodule (Khai bo kt thc module)

5.2.2 Module mc cao nht

Module mc cao nht (top-module) l module bao gm trong vn bn gc, nhng n hu nh khng c mt cu lnh ci t no trong bt k mt module no khc. iu ny p dng c khi module ci t to ra trong khi to m khng phi t n ci t. Mt m hnh phi c t nht mt module mc cao nht.

5.2.3 Gi v gn c tnh mt module (instantiate)

Vic gi v gn c tnh module cho php mt module gi v gn c tnh mt module khc ra s dng. Cc module khng c nh ngha lng nhau. Ni cch khc, mt module c nh ngha s khng cha m t thit k ca mt module khc trong cp t kha module-endmodule. Mt module c nh ngha lng trong mt module khc bng cch gi v gn c tnh ca module ra s dng. Mt cu lnh gi v gn c tnh module s to ra mt hoc nhiu bn sao ca module c nh ngha.V d, mt module b m phi ci t module D_flip_flop to ra nhiu th hin ca D-flip-flop. C php 5-2 a ra c php chi tit cho vic gi v gn c tnh module.

C php 5-2module_instantiation ::= (From A.4.1)

module_identifier [ parameter_value_assignment ]

module_instance { , module_instance } ;

parameter_value_assignment ::=

# ( list_of_parameter_assignments )

list_of_parameter_assignments ::=

ordered_parameter_assignment { , ordered_parameter_assignment }

| named_parameter_assignment { , named_parameter_assignment }

ordered_parameter_assignment ::=

expression named_parameter_assignment ::=

. parameter_identifier ( [ mintypmax_expression ] )

module_instance ::=

name_of_module_instance ( [ list_of_port_connections ] )

name_of_module_instance ::=

module_instance_identifier [ range ]

list_of_port_connections ::=

ordered_port_connection { , ordered_port_connection }

| named_port_connection { , named_port_connection }

ordered_port_connection ::=

{ attribute_instance } [ expression ]

named_port_connection ::=

{ attribute_instance } . port_identifier ( [ expression ] )

Vic gi v gn c tnh module c th cha mt lot cc c im k thut. N cho php mt mng cc th hin c to ra. C php v ng ngha ca cc mng, th hin nh ngha cho cc cng v cc cng c bn p dng tt cho cc module. Mt hoc nhiu th hin ca module (bn sao nguyn bn ca module) c th a ra trong mt cu lnh gi v gn c tnh module ring l.

Danh sch cc cng kt ni s cung cp ch cho module c nh ngha vi cng. Cc du ngoc n lun lun cn thit. Khi mt danh sch cc cng kt ni, c a ra s dng theo thc t phng thc cc cng kt ni, phn t u tin trong danh sch s kt ni vi cng u tin trong khai bo cng trong module, phn t th 2 kt ni vi cng th 2 v c nh th. Mc 5.2.4.9 s tho lun r hn v cc lut kt ni cng vi cng.Mt kt ni c th tham kho n gin ti mt bin hoc mt nh danh net, mt biu thc, hoc mt khong trng. Mt biu thc c th s dng cung cp mt gi tr, ti mt cng vo ca module. Mt cng kt ni trng s trnh by tnh hung ni m cng khng kt ni.Khi kt ni mt cng bng tn, mt cng cha c kt ni s ch ra bng cch b n ra trong danh sch, hoc khng cung cp biu thc bn trong u ngoc (v d portname()).

V d 5.2V d 1: V d ny minh ha mt mch (module cp thp) c iu khin bi mt dng sng n gin (module cp cao hn) ni m mch c ci t bn trong module dng sng:

//module cp thp: module m t mt mch flip-flop nandmodule ffnand (q, qbar, preset, clear);output q, qbar;

//khai bo 2 net u ra cho mchinput preset, clear;// khai bo 2 net u vo cho mch// khai bo cng nand 2 u vo v cc kt ni vi chngnand g1 (q, qbar, preset), g2 (qbar, q, clear);endmodule// module cp cao: dng sng m t cho flip-flop nandmodule ffnand_wave;wire out1, out2;//u ra t mchreg in1, in2;

//bin iu khin mchparameter d = 10;// th hin ca mch ffnand, tn l "ff", v c t u ra ca cc kt ni IO bn trong ffnand ff(out1, out2, in1, in2);// nh ngh dng sng m phng mch

initial begin#d in1 = 0; in2 = 1;#d in1 = 1;#d in2 = 0;#d in2 = 1;end endmoduleV d 2: V d ny to ra 2 th hin ca module flip-flop ffnand c nh ngha trong v d 1. N kt ni ch vi u ra q vo mt th hin v ch mt u ra qbar vo mt th hin khc.

// dng sng m t kim tra nand flip-flop, khng c cng u ramodule ffnand_wave;reg in1,in2;//bin iu khin mchparameter d=10;// to hai bn sao ca mch ff nand// ff1 c qbar khng kt ni, ff2 c q khng kt ni ffnand ff1(out1,,in1,in2),ff2(.qbar(out2), .clear(in2), .preset(in1), .q());// nh ngh dng sng m phng mchinitial begin#din1=0;in2=1;#din1=1;#din2=0;#din2=1;end

endmodule

5.2.4 Khai bo portCng cung cp mt phng tin kt ni cc m t phn cng bao gm module v cc phn cng nguyn thy. V d, module A c th khi to module B, s dng cc cng kt ni ph hp ti module A. Tn cc cng ny c th khc vi tn ca cc dy ni ni v cc bin c ch ra trong nh ngha module B.5.2.4.1 nh ngha portC php cho cc cng v danh sch cng c a ra trong C php 5-3C php 5-3list_of_ports ::= (From A.1.3)

( port { , port } )

list_of_port_declarations ::=

( port_declaration { , port_declaration } )

| ( )

port ::=

[ port_expression ]

| . port_identifier ( [ port_expression ] )

port_expression ::=

port_reference

| { port_reference { , port_reference } }

port_reference ::=

port_identifier [ [ constant_range_expression ] ]

port_declaration ::=

{attribute_instance} inout_declaration

| {attribute_instance} input_declaration

| {attribute_instance} output_declaration

5.2.4.2 Lit k portCng tham kho cho mi cng, trong danh sch cc cng bn trn ca mi khai bo module c th l 1 trong s: Mt nh danh n gin hoc nh danh b b qua (khai bo nhng khng dng). Mt bit-select ca mt vector khai bo trong module Mt part- select ca mt vector khai bo trong module Mt ton t kt ni ca bt k phn no trong 3 loi trn.Biu thc cng l ty chn bi v cng c th c nh ngha m khng cn bt k kt ni no trong module. Khi mt cng c nh ngha, th khng c cng no khc c nh ngha cng tn.C hai loi cng module, loi u tin ch l cng biu thc, l loi cng ngm; loi th hai l loi cng trc tip. Cng biu thc bao gm khai bo cc nh danh bn trong thn module nh miu t trong Mc 5.2.4.3, v cng trc tip s dng kt ni vi cng ca module th hin bng tn nh trong Mc 5.2.4.4. Tn cng kt ni s khng s dng cho cng ngm nh m s s dng tn cng biu thc, nu cng biu thc khng l mt nh danh n gin hoc l nh danh b b qua.

5.2.4.3 Khai bo port trong thn moduleMi cng nh danh trong mt cng biu thc, trong danh sch ca cc cng trong khai bo module, cng s khai bo trong thn ca module nh mt trong cc khai bo: input, output hoc inout (cng hai chiu). c th thm vo khai bo cc loi d liu khc cho cc cng t th v d reg hoc wire.C php cho vic khai bo cng a ra trong C php 5-4:C php 5-4inout_declaration ::=

inout [ net _type ] [ signed ] [ range ] list_of_port_identifiers input_declaration ::=

input [ net _type ] [ signed ] [ range ] list_of_port_identifiers output_declaration ::=

output [ net _type ] [ signed ] [ range ]

list_of_port_identifiers

| output reg [ signed ] [ range ]

list_of_variable_port_identifiers

| output output_variable_type

list_of_variable_port_identifiers

list_of_port_identifiers ::= (From A.2.3)

port_identifier { , port_identifier }

V d:

module test (a, b, c, d, e, f, g, h); // du ng ngoc v chm phy

input [7:0] a;

// ngn cch nhau bi du chm phy

input signed [7:0] b, c, d;// nhiu cng cng chia s mt thuc tnh khai bo

output [7:0] e;

// mi thuc tnh phi c 1 khai bo.

output reg signed [7:0] f, g;

output signed [7:0] h;endmodule

Nu khai bo mt cng bao gm mt net hoc loi bin khc, th cng c th khai bo li trong khai bo net hoc bin. Nu mt net hoc bin khai bo nh l mt vector, th c t phm vi gia hai khai bo cng phi ging ht nhau.

5.2.4.4 Khai bo port u moduley l mt c php ch ra cc cng trong module thay th c php Mc 5.2.4.3, nhm gim ti t nht vic sao chp d liu.Mi khai bo cng cung cp thng tin y v cng, hng cng, rng, net, hoc cc loi bin v nhng m t y khc v port nh c du hoc khng du. C php tng t cho khai bo u vo, u vo-ra v u ra cng c s dng phn u ca module, theo cch khai bo cng, ngoi ra danh sch khai bo port l bao gm phn u ca module ch khng phi tch bit (ngay sau du ; cui phn u module).V d 5.3: Trong v d sau, module tn test c a ra trong v d trc c khai bo li nh sau:module test (

input [7:0] a,

// ngn cch nhau bi du phy

input signed [7:0] b, c, d,//nhiu cng cng chia s mt thuc tnh khai bo

output [7:0] e,

// mi thuc tnh phi c 1 khai bo.

output reg signed [7:0] f, g,

output signed [7:0] h

) ;//Du ng ngoc v chm phy

// Khng hp l nu c bt k khai bo cng no trong phn thn moduleendmodule

Cc loi cng tham chiu ca khai bo cng module, s khng hon thnh s dng cch thc danh sch khai bo cng ca khai bo module. Cng nh khai bo cng s dng trong danh sch khai bo cng s ch nh danh n gin hoc nh danh trng. Chng s khng c bit-select, part-select hoc ton t kt ni, hoc khng c cc cng phn chia, hoc khng c tn cng.Thit k t do c th s dng ln ln cc c php khai bo cng trong khai bo module.5.2.4.5 Kt ni cc port ca module c gi bng danh sch th t

Mt phng php lm cho cc kt ni gia cc biu thc cng, c lit k trong th hin ca module, v cng khai bo bn trong th hin module, l theo th t danh sch. Ngha l biu thc cng lit k trong th hin ca module, s kt ni ti cng v tr cng trong danh sch cng khi khai bo module con.V d 5.4 minh ha mt module mc cao nht (topmod) ci t module th 2 (mobB). Module mobB c cng kt ni theo th t danh sch. Kt ni thc hin nh l: Cng wa trong modB nh ngha kt ni ti bit-select v[0] trong module topmod. Cng wb kt ni ti v[3].

Cng c kt ni ti w. Cng d kt ni ti v[4].Trong nh ngha mobB, cng wa v wb c khai bo l cng vo ra trong khi cng c v d c khai bo l cng vo.

V d 5.4module topmod;

wire [4:0] v;

wire a,b,c,w;

modB b1 (v[0], v[3], w, v[4]);endmodulemodule modB (wa, wb, c, d);

inout wa, wb;

input c, d;

tranif1 g1 (wa, wb, cinvert);

not #(2, 6)n1 (cinvert, int);

and #(6, 5)g2 (int, c, d);endmodule

Trong sut qu trnh m phng ca th hin b1 ca modB, cng and g2 hot ng u tin cung cp mt gi tr int. Gi tr ba trng thi qua cng not n1 cung cp u ra cinvert, sau cho hot ng cng tranif g1.

5.2.4.6 Kt ni cc port ca module c gi bng tn

Cch th 2 kt ni cc cng ca module bao gm lin kt r rng hai tn ca mi bn trong kt ni: khai bo tn cng t khai bo module ti biu thc, tc l tn s dng trong khai bo module, theo sau bng tn s dng trong th hin ca module. Tn ghp ny sau c t trong danh sch kt ni ca module. Tn cng s l tn ch ra trong khai bo module. Tn cng khng th l bit-select, part-select hoc ton t kt ni ca cc cng. Nu khai bo cng ca module l ngm nh, biu thc cng phi l biu thc n gin hoc l biu thc trng, m s c s dng nh tn cng. Nu khai bo cng ca module l r rng, tn r rng s c s dng nh tn cng.Biu thc cng c th l mt biu thc hp l bt k. Biu thc cng l ty chn v vy trong ci t module c th bo co s tn ti ca cng m khng kt ni vi bt k ci g. Cc du ngoc n vn phi yu cu c.Hai loi kt ni cng ca module khng c ln ln, kt ni ti cng c th ca th hin module s hoc tt c theo th t hoc tt c theo tn.

V d 5.5V d 1: Trong v d ny, ci t module kt ni ti tn hiu topA v topB ti cng In1 v

Out, nh ngha trong module ALPHA. C mt cng cung cp bi module ALPHA khng c s dng, tn l In2. C th c cc cng khng c s dng c cp trong ci t ny.

ALPHA instance1 (.Out(topB),.In1(topA),.In2()); V d 2: V d ny nh ngha module modB v topmod, v sau topmod ci t modB s dng kt ni cng theo tn.

module topmod; wire [4:0] v; wire a,b,c,w;modB b1 (.wb(v[3]),.wa(v[0]),.d(v[4]),.c(w)); //khng cn thep th tendmodulemodule modB(wa, wb, c, d);inout wa, wb;input c, d;tranif1 g1(wa, wb, cinvert); not #(6, 2)n1(cinvert, int); and #(5, 6)g2(int, c, d); endmoduleBi v kt ni l theo tn nn th t ca cc cng khai bo c th o v tr.

Nhiu kt ni cng ca th hin module l khng cho php, v d bn di l khng hp l

V d 3: v d cho thy kt ni cng khng hp l:

module test (a, b, c, d, e, f, g);

input [7:0] a;

input signed [7:0] b, c, d;

output [7:0] e;

output reg signed [7:0] f, g;

endmodule

module demo(input i, output o, inout e);

test false (.i (a), .i (b), // khng hp l khi kt ni u vo 2 ln.

.o (c), .o (d), // khng hp l khi kt ni u ra 2 ln.

.e (e), .e (f)); // khng hp l khi kt ni u vo-ra 2 ln.

endmodule

5.2.4.7 S thc trong kt ni portLoi d liu s thc khng kt ni trc tip vi cng. N s kt ni gin tip, nh v d bn di. Hm h thng $realtobits v $bitstoreal s c s dng kt ni qua cc bit trn m hnh cng ca module.

V d 5.6// kt ni s thc vi cng s dng hm h thng $realtobitsmodule driver (net _r); output net _r; real r;wire [64:1] net _r = $realtobits(r);endmodule// kt ni s thc vi cng s dng hm h thng $bitstorealmodule receiver (net _r);input net _r;wire [64:1] net _r;real r;

initial

assign r = $bitstoreal(net _r);endmodule

5.2.4.8 Kt ni nhng port khng tng t nhau

Mt cng ca mt module c th c xem nh l cung cp mt lin kt hoc mt kt ni gia hai biu tng (dy ni, thanh ghi, biu thc, ), mt biu tng ci t bn trong module v mt ci t bn ngoi module.Kim tra kt ni cng theo lut m t trong Mc 5.2.4.9 s thy rng, biu tng nhn gi tr t mt cng (biu tng input ca module ni v output ca module ngoi) s c cu trc biu thc net. Cc biu tng khc cung cp gi tr c th l mt biu thc bt k.Mt cng c khai bo l mt u vo (u ra) nhng s dng nh l u ra (u vo) hoc u vo-ra c th c cng ch vo ra. Nu khng cng ch s c cnh bo xut hin.

5.2.4.9 Nhng qui nh khi kt ni portCc lut kt ni cng trong phn ny s chi phi cch khai bo cng ca module v cch chng kt ni vi nhau: Lut 1: Mt cng vo hoc cng vo ra phi l mt net. Lut 2: Mi cng kt ni s l php gn lin tc ca ngun ti cui cng, ni m mt biu tng kt ni l tn hiu ngun v nhng ci khc l tn hiu chm. Mt php gn l php gn lin tc t ngun ti cui cng cho u vo hoc u ra. Php gn l khng mnh gim kt ni bn dn cho cng inout. Ch dy ni hoc biu thc c cu trc dy ni s n trong php gn. Mt biu thc cu trc dy dn l mt biu thc cng trong ton hng l:

Mt net v hng. Mt vector net. Mt hng s bit-select ca mt vector net. Mt part-select ca mt vector net. Mt ton t kt ni ca biu thc cu trc net. Theo cc biu tng bn ngoi s khng kt ni ti u ra hoc u vo ra ca module: Bin. Biu thc khc vi nhng iu sau:1. Mt net v hng2. Mt vector net.3. Mt hng s bit-select ca mt vector net.4. Mt part-select ca mt vector net.5. Mt ton t kt ni ca biu thc trong danh sch trn.

Lut 3: Nu net hai bn ca cng l loi net wire, mt cnh bo s xy ra n net khng gp li vo trong mt net n nh m t trong Mc 5.2.4.10.5.2.4.10 Loi net to ra t vic kt ni port khng tng t nhauKhi cc loi net khc nhau kt ni vi nhau thng qua mt module, th cc net ca tt c cc cng phi a v cho ging loi vi nhau. Kt qu loi net c xc nh theo bng 5-1. Trong bng ny, net ngoi ngha l net ch ra trong th hin ca module, net ni ngha l net ch ra trong module nh ngha. Net m loi ca n c s dng gi l dominating net. Net m loi ca n b thay i gi l dominated net. N c quyn hp cc dominating v dominatr net vo trong mt net n, loi ny c loi nh l mt dominating net. Kt qu ca net gi l simulated net v dominated net gi l collapsed net.Loi simulated net s thc hin delay ch ra dominating net. Nu dominating net l loi trireg, bt k gi tr mnh no ch ra cho trireg s p dng cho simulated net. Bng 5.1 T hp gia net ni v net ngoiNet niNet ngoi

wire, triextextextextextextextextext

wand,

triandintextext

warnext

warnext

warnext

warnext

warnextext

wor,

triorintext

warnextext

warnext

warnext

warnext

warnextext

triregintext

warnext

warnextextextext

warnextext

tri0intext

warnext

warnintextext

warnext

warnextext

tri1intext

warnext

warnintext

warnextext

warnextext

uwireintint

warnint

warnint

warnint

warnint

warnextextext

supply0intintintintintintintextext

warn

supply1intintintintintintintext

warnext

T kha:

ext: s dng net ngoi int: s dng net ni warn: xut hin cnh bo Lut gii quyt loi net Khi 2 net kt ni vi nhau bi cc cng khc loi nhau, kt qu l mt net n c th l mt trong:

Loi dominating net nu mt trong hai net l dominating net, hoc Loi ca net ngoi ti moduleKhi loi dominatin net khng tn ti, loi net ngoi s c s dng.

Bng loi net Bng 5.1 ch ra loi net b gi bi loi net theo lut gii quyt net. Simulated net s theo loi net ch ra trong bng v tr hon k thut ca net. Nu simulated net c chn l trireg, bt k mnh gi tr no ch ra cho trireg s p dng cho simulated net.5.2.4.11 Kt ni nhng gi tr c du thng qua (port)

Thuc tnh du khng c thng qua trong cu trc phn cp. Trong th t c loi c du qua cu trc phn cp, t kha signed phi c s dng trong khai bo i tng mt cp khc trong cu trc phn cp. Bt k biu thc no trong mt cng s c xem nh l bt k biu thc no khc trong php gn. N s c loi, k c, nh gi v gi tr kt qu gn ti i tng bn khc ca cng s dng ging lut nh mt php gn.

5.3 Bi tp

1. M hnh cu trc phn cp trong Verilog l g?2. Cc cch khai bo, gi v gn c tnh cho mt module?3. Cc cch khai bo port?4. Cc cch kt ni port?5. Nhng quy lut khi kt ni port?

6 Chng 6.M hnh thit k cu trc (Structural model)

6.1 Gii thiu

M hnh thit k cu trc m t cc h thng di dng cc cng linh kin hay cc khi linh kin c kt ni li vi nhau thc hin c nhng chc nng mong mun. M hnh thit k cu trc c m t mt cch trc quan h thng thit k s, do n thc s gn ging vi m t vt l phn cng ca h thng.Ngi thit k thng s dng m hnh thit k cu trc cho nhng module nh cn ti u v timing, din tch, v s dng m hnh ny th phn cng thit k sau khi tng hp ra mch s ging vi m t thit k trn Verilog. Tuy nhin, i vi mt h thng ln th vic s dng m hnh cu trc l khng kh thi, bi v s cng knh ca n khi ghp hng ngn hng vn cng c bn li vi nhau, cng nh tiu tn thi gian rt ln cho vic chy m phng kim tra thit k.6.2 Nhng linh kin c bn

6.2.1 Cng and, nand, or, nor, xor, xnorSu cng logic ny c mt u ra v mt hoc nhiu u vo. Tham s u tin trong danh sch cc tham s s kt ni vi u ra ca cng logic, cc tham s khc kt ni ti u vo. Khai bo th hin ca mt cng logic c bn nhiu u vo loi ny s bt u vi mt trong nhng t kha sau:and

nand

or

nor

xor

xnor

c t tr hon s l 0, 1 hoc 2 tr hon. Nu c t tr hon bao gm 2 tr hon, tr hon u s xc nh u ra tr hon cnh ln, tr hon th hai s xc nh u ra tr hon cnh xung, v trong thi gian nh hn 2 tr hon s thit lp u ra l x. Nu ch c mt tr hon c a ra th s tr hon c cnh ln v cnh xung. Nu khng c c t tr hon th s khng c tr hon thng qua cng.Bng s tht ca cc cng ny th hin kt qu ca cng 2 gi tr u vo:

Bng 6.1 Bng s tht ca cc cng logicand01xznand01xz

0000001111

101xx110xx

x0xxxx1xxx

z0xxxz1xxx

or01xzxor01xz

001xx001xx

11111110xx

xx1xxxxxxx

zx1xxzxxxx

nor01xzxnor01xz

010xx010xx

10000101xx

xx0xxxxxxx

zx0xxzxxxx

Cc phin bn ca su cng logic ny c nhiu hn 2 u vo s m rng t nhin theo bng trn, nhng s lng u vo nh hng ti tr hon truyn.

V d 6.1V d ny khai bo mt cng and 2 u vo:

and a1 (out, in1, in2);

Trong u vo l in1, in2. u ra l out, th hin tn l a1.

6.2.2 Cng buf v notHai cng logic ny c mt u vo v mt hoc nhiu u ra. Tham s cui cng trong danh sch cc tham s s kt ni vi u vo ca cng logic, cc tham s khc kt ni ti u ra. Khai bo th hin ca mt cng logic nhiu u ra loi ny s bt u vi mt trong nhng t kha sau:buf

not

c t tr hon s l 0, 1 hoc 2 tr hon. Nu c t tr hon bao gm 2 tr hon, tr hon u s xc nh u ra tr hon cnh ln, tr hon th hai s xc nh u ra tr hon cnh xung, v nh hn 2 tr hon s thit lp u ra l x. Nu ch c mt tr hon c a ra th s tr hon c cnh ln v cnh xung. Nu khng c c t tr hon th s khng c tr hon thng qua cng.Bng s tht ca cc cng ny th hin kt qu ca cng 1 u vo v mt u ra:

Bng 6.2 Bng s tht ca cng buffer v cng notbufnot

u vou rau vou ra

0001

1110

xxxz

zzzx

V d 6.2V d sau khai bo mt cng buf 2 u ra:

buf b1 (out1, out2, in);u vo l in, u ra l out1, out2, tn th hin l b1

6.2.3 Cng ba trng thi bufif1, bufif0, notif1, v notif0y l bn cng logic thuc loi ba trng thi iu khin. Bn cnh cc gi tr logic 0 v 1, u ra cng ny c th l gi tr z. Bn cng logic ny s c mt u ra v mt u vo d liu, mt u vo iu khin. Tham s th nht trong danh sch tham s kt ni vi u ra, tham s th hai kt ni vi u vo, tham s th ba kt ni vi u vo iu khin.Khai bo th hin ca mt cng logic ba trng thi s bt u vi mt trong cc t kha sau:

bufif0

bufif1

notif1

notif0

c t tr hon s l 0, 1, 2 hoc 3 tr hon. Nu c t tr hon bao gm 3 tr hon, tr hon u s xc nh u ra tr hon cnh ln, tr hon th hai s xc nh u ra tr hon cnh xung, tr hon th ba s xc nh tr hon s chuyn tip ti gi tr z v nh nht trong 3 tr hon s xc nh tr hon ca chuyn tip ti x. Nu c t tr hon bao gm 2 tr hon, tr hon u s xc nh u ra tr hon cnh ln, tr hon th hai s xc nh u ra tr hon cnh xung, v nh hn trong 3 tr hon s xc nh tr hon ca chuyn tip ti x v z. Nu ch c mt tr hon c a ra th n ch ti tr hon tt c cc chuyn tip u ra. Nu khng c c t tr hon th s khng c tr hon thng qua cng.Mt vi t hp ca gi tr d liu u vo v gi tr iu khin u vo c th gy ra cng c hai gi tr u ra, m khng c tham kho no cho mt trong hai gi tr (xem Mc 7.10.2). Bng logic cho cc cng ny bao gm hai k hiu biu din cho kt qu khng xc nh. K hiu L s ch ra mt kt qu c gi tr 0 hoc z. Gi tr H ch ra kt qu c gi tr 1 hoc z. Tr hon trn s chuyn tip ti H hoc L s xem nh ging vi tr hon chuyn tip ti gi tr x. Bng 6.3 Bng s tht ca cc cng ba trng thibufif0CONTROLbufif1CONTROL

01xz01xz

INPUT00zLLINPUT0z0LL

11zHH1z1HH

xxzxxxxzxx

zxzxxzxzxx

notif0CONTROLnotif1CONTROL

01xz01xz

INPUT01zLLINPUT0z1LL

10zHH1z0HH

xxzxxxxzxx

zxzxxzxzxx

V d 6.3V d sau khai bo mt th hin ca cng bufif1:

bufif1 bf1 (outw, inw, controlw);Trong u ra l outw, u vo l inw, u vo iu khin l controlw, th hin tn l bf1

6.2.4 Cng tc MOS

Khai bo th hin ca mt cng tc MOS s bt u vi mt trong cc t kha sau:

cmos

nmos

pmos

rcmos

rnmos

rpmos

Cng tc cmos v rcmos c m t trong Mc 6.2.6.T kha pmos vit tt cho transistor P-type matal-oxide semiconductor (PMOS) v t kha nmos l vit tt cho transistor N-type matal-oxide semiconductor (NMOS). Transistor PMOS v NMOS c tr khng tng i thp gia cc ngun v cc mng khi chng dn. T kha rpmos l vit tt ca transistor in tr PMOS v t kha rnmos l vit tt ca transistor in tr NMOS. Transistor in tr PMOS v NMOS c tr khng cao hn nhiu gia cc ngun v cc mng khi chng dn so vi transistor PMOS v NMOS thng. Thit b ti trong mch MOS tnh l v d ca transistor rpmos v rnmos. Bn cng tc l knh dn mt chiu cho d liu tng t nh cng bufif.c t tr hon s l 0, 1, 2 hoc 3 tr hon. Nu c t tr hon bao gm 3 tr hon, tr hon u s xc nh u ra tr hon cnh ln, tr hon th hai s xc nh u ra tr hon cnh xung, tr hon th ba s xc nh tr hon s chuyn tip ti gi tr z v nh nht trong 3 tr hon s xc nh tr hon ca chuyn tip ti x. Nu c t tr hon bao gm 2 tr hon, tr hon u s xc nh u ra tr hon cnh ln, tr hon th hai s xc nh u ra tr hon cnh xung, v nh hn trong 2 tr hon s xc nh tr hon ca chuyn tip ti x v z. Nu ch c mt tr hon c a ra th n ch ti tr hon tt c cc chuyn tip u ra. Nu khng c c t tr hon th s khng c tr hon thng qua cng.Mt vi t hp ca gi tr d liu u vo v gi tr iu khin u vo c th gy ra cng tc c hai gi tr u ra, m khng c tham kho no cho mt trong hai gi tr. Bng logic cho cc cng ny bao gm hai k hiu biu din cho kt qu khng st nh. K hiu L s ch ra mt kt qu c gi tr 0 hoc z. Gi tr H ch ra kt qu c gi tr 1 hoc z. Tr hon trn s chuyn tip ti H hoc L s xem nh ging vi tr hon chuyn tip ti gi tr x.Bn cng logic ny s c mt u ra v mt u vo d liu, mt u vo iu khin. Tham s th nht trong danh sch tham s kt ni vi u ra, tham s th hai kt ni vi u vo, tham s th ba kt ni vi u vo iu khin.Cng tt nmos v pmos s cho qua tn hiu t u vo v thng ti u ra ca chng vi mt thay i v mnh tn hin trong mt trng hp, tho lun Mc 7.11. Cng tt rnmos v rpmos s gim mnh tnh hin truyn qua chng, tho lun trong Mc 7.12.

Bng 6.4 Th hin bng logic ca cng truynpmosrpmosCONTROLcmosrcmosCONTROL

01xz01xz

INPUT00zLLINPUT0z0LL

11zHH1z1HH

xxzxxxzxxx

zzzzzzzzzz

V d 6.4V d ny khai bo mt cng tc pmos:

pmos p1 (out, data, control);Trong u ra l out, u vo l data, u iu khin l control v tn th hin l p1.

6.2.5 Cng tc truyn hai chiu

Khai bo th hin ca cng tc truyn hai chiu s bt u vi mt trong cc t kha sau:

tran

tranif1

tranif0

rtran

rtranif1 rtranif0

Cng thc truyn hai chiu s khng tr hon tn hiu truyn qua chng. Khi thit b tranif0, tranif1, rtranif0 hoc rtranif1 l tt, chng s chn tn hiu; v khi chng m th chng s cho tn hiu i qua. Thit b tran v rtran khng th tt v chng lun lun cho tn hiu qua chng.c t tr hon cho cc thit b tranif1, tranif0, rtranif1, v rtranif0 l 0, 1 hoc 2 tr hon. Nu c t tr hon bao gm 2 tr hon, tr hon u s xc nh u ra tr hon m, tr hon th hai s xc nh u ra tr hon ng, v nh hn trong 2 tr hon s xc nh tr hon ca chuyn tip ti x v z. Nu ch c mt tr hon c a ra th n c t cho c tr hon m v ng. Nu khng c c t tr hon th s khng c tr hon ng v m cho cng tc truyn hai chiu. Cng tc truyn hai chiu tran v rtran s khng chp nhn c t tr hon.

Cc thit b tranif1, tranif0, rtranif1 v rtranif0 c 3 tham s trong danh sch vo ra. Hai tham s u s l hai thit b u cui hai chiu iu khin tn hiu ti v i t thit b, v u cui th 3 s kt ni vi u vo iu khin. Thit b tran v rtran s c danh sch cc cng gm hai cng hai chiu. C hai u cui hai chiu s iu khin truyn v iu kin tn hiu ti v i t thit b, cho php tn hin qua theo mi hng t thit b. Thit b u cui hai chiu c tt c 6 thit b ch kt ni vi nhng net v hng hoc bit-select ca nhng vector net.Thit b tran, tranif0 v tranif1 cho qua tn hiu vi thay i v mnh ch trong trng hp m t Mc 6.11. Thit b rtran, rtranif1, rtranif0 s lm gim mnh ca tn hiu qua chng theo lut tho lun trong phn 6.12

V d 6.5V d sau m t khai bo mt th hin tranif1:

tranif1 t1 (inout1,inout2,control);Thit b u cui hai chiu l inout1 v inout2, u vo iu khin l control, tn th hin l t1.

6.2.6 Cng tc CMOSKhai bo th hin ca mt cng tc CMOS bt u vi mt trong nhng t kha sau:cmos

rcmos

c t tr hon s l 0, 1, 2 hoc 3 tr hon. Nu c t tr hon bao gm 3 tr hon, tr hon u s xc nh u ra tr hon cnh ln, tr hon th hai s xc nh u ra tr hon cnh xung, tr hon th ba s xc nh tr hon s chuyn tip ti gi tr z, v nh nht trong 3 tr hon s xc nh tr hon ca chuyn tip ti x. Tr hon trong qu trnh chuyn tip ti gi tr H hoc L ging nh tr hon trong chuyn tip ti x. Nu c t tr hon bao gm 2 tr hon, tr hon u s xc nh u ra tr hon cnh ln, tr hon th hai s xc nh u ra tr hon cnh xung, v nh hn trong 2 tr hon s xc nh tr hon ca chuyn tip ti x v z. Nu ch c mt tr hon c a ra th n ch ti tr hon tt c cc chuyn tip u ra. Nu khng c c t tr hon th s khng c tr hon thng qua cng.

Cng tc cmos v rcmos c mt u vo d liu, mt u ra d liu v hai u vo iu khin. Trong danh sch cc cng vo ra, cng vo ra u tin kt ni ti u ra d liu, cng vo ra th hai kt ni ti u vo d liu, cng vo ra th 3 kt ni ti knh n ca u vo iu khin, v cng vo ra cui cng kt ni ti knh p ca u vo iu khin.Cng cmos s cho qua tn hiu vi thay i mnh ch trong mt trng hp, m t Mc 6.2.11. Cng rcmos lm gim mnh ca tn hiu qua n theo lut m t Mc 6.2.12.Cng tc cmos xem nh l t hp ca cng tc pmos v cng tc nmos. Cng tc rcmos xem nh l t hp ca cng tc rpmos v cng tc rnmos. Cng tc t hp trong cu hnh ny s chia s d liu u vo v u ra trn cng vo ra nhng chng phn bit nhau v u vo iu khin.V d 6.6S tng ng mt cng cmos ghp i t mt cng nmos v mt cng pmos c a ra trong v d sau:

cmos (w, datain, ncontrol, pcontrol);tng ng vi :

nmos (w, datain, ncontrol);

pmos (w, datain, pcontrol);

Hnh 6.1 Cng truyn CMOS6.2.7 Ngun pullup v pulldown

Khai bo th hin ca mt ngun pullup v pulldown bt u bng mt trong cc t kha:

pullup

pulldown

Ngun pullup t gi tr logic 1 ln net kt ni ti danh sch cc cng. Ngun pulldown t gi tr 0 ln net kt ni vi danh sch cc cng.Tn hin m ngun t ln nhng net c mnh pull trong s thiu c t mnh. Nu c mt c t mnh 1 trn ngun pullup hoc mnh 0 trn ngun pulldown, tn hiu s c c t mnh. c t mnh 0 trn ngun pullup v c t mnh 1 trn ngun pulldown. Khng c c t tr hon cho ngun

V d 6.7V d khai bo hai th hin ngun pullup:

pullup (strong1) p1 (net a), p2 (net b);Trong v d ny, th hin p1 iu khin net a v th hin p2 iu khin net b vi mnh strong

6.2.8 M hnh mnh logic

Ngn ng Verilog cung cp cho m hnh chnh xc ca tn hiu tranh chp, cng truyn hai chiu, thit b MOS in tr, MOS ng, chia s thay i, v nhng cu hnh mng khc ph thuc k thut bng cch cho php tn hiu net v hng c gi tr khng y v c nhiu cp mnh khc nhau hoc t hp cc cp mnh. M hnh logic nhiu cp mnh gii quyt t hp tn hiu trong cc gi tr bit v khng bit biu din cho hnh vi ca phn cng thc hin chnh xc hn.Chi tit v mnh s c hai yu t:

mnh phn 0 ca gi tr net, gi l strength0, thit k nh mt trong cc t kha sau:

supply0

strong0 pull0

weak0

highz0

mnh phn 1 ca gi tr net, gi l strength1, thit k nh mt trong cc t kha sau:

supply1 strong1

pull1

weak1

highz1

T hp (highz0, highz1) v (highz1, highz0) l khng hp l.

Mc d phn ny c t mnh, n hu ch xem xt mnh nh mt thuc tnh nm gi cc vng ca mt chui lin tc trong th t d on kt qu ca tn hiu t hp.Bng 6.5 chng minh s lin tc ca mnh. Ct bn tri l danh sch cc t kha s dng trong c t mnh. Ct bn phi l mc mnh tng quan.

Bng 6.5 mnh ca net Tn mnhCp mnh

supply07

strong06

pull05

large04

weak03

medium02

small01

highz00

highz10

small11

medium12

weak13

large14

pull15

strong16

supply17

Trong Bng 6.5 c bn mnh iu khinsupply

strong

pull

weak

Tn hiu vi mnh iu khin s truyn t u ra cng v u ra ca php gn lin tc.

Trong Bng 6.5 c ba mnh thay i do lu tr

large

medium

small

Tn hiu vi mng thay i do lu tr s hnh thnh trong loi net triregC th ngh rng mnh ca tn hiu trong Bng 6.5 nh v tr trn thc t l trong Hnh 6.2.strength0strength1

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Hnh 6.2 mnh cc mc logic 0 v 1Tho lun v t hp tn hiu sau phn ny dng hnh v tng t nh Hnh 6.2

Nu gi tr tn hiu ca mt net l bit, tt c mnh ca n s nm trong mt trong hai phn: phn strength0 ca thc t l trn Hnh 6.2 hoc phn stregth1. Nu gi tr ca mt net l khng bit, n s c cp mnh cu trong phn strength1 v strength0. Mt net vi gi tr z c cp mnh trong mt phn con ca thc t l.

6.2.9 mnh v gi tr ca nhng tn hiu kt hp

Thm vo trong gi tr ca tn hiu, mt net c th hoc l c mnh nhiu cp khng r rng hoc l mnh r rng bao gm mt hay nhiu cp . Khi t hp tn hiu, mi mnh v gi tr s xc nh mnh v gi tr ca tn hiu kt qu tun theo cc khi nim trong phn 6.2.9.1ti 6.2.9.4.

6.2.9.1 S kt hp gia nhng tn hiu c mnh r rng

Phn ny gii quyt vi cc tn hiu t hp m mi tn hiu c mt gi tr r rng v c mt mc mnh.Nu hai hoc nhiu hn cc tn hiu c mnh khng bng nhau t hp trong mt cu hnh dy dn net, mnh ca tn hiu s l mnh tri hn trong tt c v xc nh kt qu. T hp ca hai hoc nhiu hn cc tn tn hiu c gi tr ging nhau s c kt qu ging vi gi tr c mnh ln nht trong tt c. T hp tn hiu ng nht mnh v gi tr s cho kt qu ging vi tn hiu .T hp ca cc tn hiu c gi tr khng ging nhau v c mnh ging nhau s c th c mt trong ba kt qu. Hai kt qu xy ra trn dy dn logic, kt qu th ba xy ra trong trng hp trng. Dy dn logic s tho lun trong 6.2.9.4. Kt qu trong s vng mt ca dy dn logic c tho lun trong ch ca Hnh 6.4.

V d: Trong Hnh 6.3, nhng con s trong du ngoc n ch ra quan h v mnh ca tn hiu. T hp ca mt pull1 v mt strong0 kt qu l mt strong0, v n mnh hn trong 2 tn hiu.

Hnh 6.3 Kt qu ca vic iu khin net bi hai mch khc nhau6.2.9.2 mnh khng r rng: ngun v s kt hp

Mt s phn loi tn hiu s l mnh khng r rng:

Tn hiu vi gi tr xc nh v nhiu cp mnh. Tnh hiu vi mt gi tr x, trong cc cp mnh bao gm c hai phn strength1 v strength0 ca thc mnh trong Hnh 6.2. Tn hiu vi mt gi tr L, trong cc cp mnh bao gm tr khng cao gia nhp vi cp mnh trong phn strength0 trong thc o mnh trong Hnh 6.2. Tn hiu vi mt gi tr H, trong cc cp mnh bao gm tr khng cao gia nhp vi cp mnh trong phn strength1 trong thc o mnh trong Hnh 6.2.

Nhiu cu hnh c th to ra cc tn hiu vi mnh khng r rng. Khi hai tn hiu bng nhau v mnh v ngc nhau v gi tr kt hp, kt qu s l gi tr x, cng vi cp mnh ca c hai tn hiu v cc cp mnh nh hn.

V d: Trong Hnh 6.4 ch ra mt t hp ca tn hiu weak vi gi tr 1 v tn hiu weak vi gi tr 0 cho ra mt tn hiu c mnh weak v c gi tr l x.

Hnh 6.4 Hai tn hiu c mnh bng nhau cng iu khin mt net u ra ca tn hiu (WeX) c m t trong Hnh 6.5:strength0strength1

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Hnh 6.5 u ra ca tn c mnh nm trong mt trong cc gi tr thuc dy trnMt tn hiu c mnh khng r rng c th c gi tr l mt dy cc gi tr c th. V d mnh ca u ra t mt cng iu khin ba trng thi vi u vo iu khin l khng xc nh nh Hnh 6.6:

Hnh 6.6 Cng ba trng thi vi tn hiu iu khin khng xc nhu ra ca bufif1 trong Hnh 6.6l mt strong H, dy gi tr u ra c m t trong Hnh 6.7.strength0strength1

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Hnh 6.7 Tn hiu ng ra ca bufif1 c mnh nm trong khong nh trn hnhu ra ca bufif0 trong Hnh 6.6 l mt strong L, dy gi tr u ra c m t trong Hnh 6.8.strength0strength1

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Hnh 6.8 Tn hiu ng ra ca bufif0 c mnh nm trong khong nh trn hnhT hp ca hai tnh hiu c mnh khng r rng s cho ra kt qu l mt tn hiu c mnh khng r rng. Kt qu ca tn hiu s c mt dy cc cp mnh m bao gm cc cp mnh ca cc thnh phn tn hiu. T hp u ra t 2 cng iu khin 3 trng thi vi u vo iu khin khng xc nh c m t trong Hnh 6.9, l mt v d.

Hnh 6.9 T hp hai ng ra c mnh khng xc nhTrong Hnh 6.9, t hp tn hiu c mnh khng r rng cho ra mt dy bao gm cc mc cao nht v thp nht ca tn hiu v tt c cc mnh gia chng, nh m t trong Hnh 6.10.strength0strength1

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Hnh 6.10 mnh ca ng ra trn hnh 6.9Kt qu l mt gi tr x bi v phm vi ca n gm gi tr 1 v 0. S 3 5, i trc gi tr x, l t hp ca hai s. S th nht l s 3, tng ng vi mc strength0 cao nht cho kt qu. S th hai l 5, tng ng vi cp strength1 cao nht cho kt qu.Mng chuyn mch c th to ra mt phm vi mnh ca cc gi tr ging nhau, nh l tnh hiu ca mt cu hnh t cao xung thp nh Hnh 6.11.

Hnh 6.11 Mng chuyn mchTrong Hnh 6.11, t hp cao ca mt thanh ghi, mt cng iu khin bng mt thanh ghi c gi tr khng xc nh, v mt pullup to ra mt tn hiu c gi tr 1 v phm vi mnh 651 m t trong Hnh 6.12.strength0strength1

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Hnh 6.12 mnh ng ra ca net 651Trong Hnh 6.11, t hp thp ca mt pulldown, mt cng iu khin bi mt thanh ghi c gi tr khng xc nh, v mt cng and cho ra mt tn hiu c gi tr 0 v phm vi mnh 530 m t trong Hnh 6.13.

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Hnh 6.13 mnh ng ra ca net 530Khi tn hiu ca cu hnh t cao xung thp trong Hnh 6.11 t hp, kt qu l mt gi tr khng xc nh vi phm vi (56x) xc nh bi gi tr

u v cui l hai tn hiu trong Hnh 6.14.strength0strength1

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Hnh 6.14 mnh ng ra ca net 56xTrong Hnh 6.11, thay th pulldown trong cu hnh thp bng mt supply0 s thay i phm vi ca kt qu ti phm vi (StX) m t trong Hnh 6.15.Phm vi trong Hnh 6.15 l strong x bi v n l khng xc nh v cc cc ca c hai thnh phn l strong. Cc cc ca u ra ca cu hnh thp l strong bi v pmos thp gim mnh ca tn hiu supply0. M hnh ha tnh nng ny tho lun trong phn 6.2.10.strength0strength1

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Hnh 6.15 mnh ng ra ca net 56x khi thay th pulldown bi supply0Cng logic to ra kt qu vi mnh khng r rng cng ging nh iu khin ba trng thi. Nh trong trng hp trong Hnh 6.16. Cng andN1 khai bo vi mnh highz0, v N2 khai bo vi mnh weak0.

Hnh 6.16 Ng ra to bi cc cng logic c tn hiu iu khin khng r rngHnh 6.16, thanh ghi b c gi tr khng xc nh; v vy u vo ca cng and pha trn l strong x, cng and pha trn c c t mnh bao gm highz0. Tn hiu t cng and pha trn l mt strong H bao gm cc gi tr m t trong Hnh 6.17.strength0strength1

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Hnh 6.17 mnh ca tn hiu ng ra StHHiz0 trong phn ca kt qu bi v c t mnh cho cng trong cu hi xc inh mnh cho u ra vi gi tr 0. c t mnh khc ngoi tr khng cao cho gi tr 0 kt qu u ra trong mt u ra cng c gi tr x. u ra ca cng and bn di l weak 0 nh m t trong Hnh 6.18. strength0strength1

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Hnh 6.18 mnh ca tn hiu ng ra We0Khi tn hiu t hp, kt qu c phm vi (36x) nh m t trong Hnh 6.19

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Hnh 6.19 mnh ca tn hiu ng ra 36xHnh 6.19 trnh by t hp ca mt tn hiu c mnh khng r rng v mt tn hiu c mnh r rng. T hp ny l ch ca phn 6.2.9.3.

6.2.9.3 Tn hiu c mnh khng r rng v tn hiu c mnh r rng

T hp ca mt tn hiu c mnh r rng v gi tr xc nh vi mt tn hiu c mnh khng r rng c trnh bi trong mt vi trng hp c th. hiu mt tp cc lut qun l loi t hp, n cn thit xem xt cc cp mnh ca tn hiu c mnh khng r rng rin mi n v quan h vi tn hiu c mnh r rng. Khi tn hiu c gi tr xc nh v c mnh r rng kt hp vi mt thnh phn tn hiu khng r rng, s theo cc lut sau:

Cc cp mnh ca tn hiu c mnh khng r rng ln hn cp mnh ca tn hiu c mnh r rng s vn c trong kt qu. Cc cp mnh ca tn hiu c mnh khng r rng nh hn cp mnh ca tn hiu c mnh r rng s bin mt khi kt qu, ch ca lut c. Nu cc hot ng ca cc lut a v lut b cho ra kt qu cc cp mnh gin on v tnh hiu ngc nhau v gi tr, tn hiu gin on s l mt phn ca kt qu.

Cc hnh sau m t mt vi ng dng ca cc lut.Trong Hnh 6.20, cc cp mnh ca tn hiu c mnh khng r rng nh hn hoc bng cp mnh ca tn hiu c mnh r rng, bin mt khi kt qu, theo lut b.Trong Hnh 6.21, lut a, lut b v lut c c p dng. Cc cp mnh ca tn hiu c mnh khng r rng m c gi tr i ngc v mnh thp hn mnh ca tn hiu c mnh r rng khng xut hin trong kt qu. Cc cp mnh ca tn hiu c mnh khng r rng thp hn mnh ca tn hiu c mnh r rng, v c gi tr ging nhau khng xut hin trong kt qu. Cc cp mnh ca tn hiu c mnh r rng c mnh cao hn cc cc ca tn hiu c mnh khng r rng nh ngha phm vi ca kt qu.strength0strength1

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T hp ca hai tn hiu bn trn cho ra tn hiu kt qu bn di:

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Hnh 6.20 mnh ng ra tun theo lut bstrength0strength1

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T hp ca hai tn hiu bn trn cho ra tn hiu kt qu bn di:strength0strength1

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Hnh 6.21 mnh ng ra tun theo lut a, b v cTrong Hnh 6.22, lut a v lut b c p dng. Cc cp mnh ca tn hiu c mnh khng r rng m c gi tr i ngc v mnh thp hn mnh ca tn hiu c mnh r rng khng xut hin trong kt qu. Cc cp mnh ca tn hiu c mnh r rng c mnh cao hn cc cc ca tn hiu c mnh khng r rng nh ngha phm vi ca kt qu.

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T hp ca hai tn hiu bn trn cho ra tn hiu kt qu bn di:strength0strength1

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Hnh 6.22 mnh ng ra tun theo lut a, bTrong Hnh 6.23, lut a, lut b v lut c c p dng. Cc cc ln ca mnh ca tn hiu c mnh khng r rng ln hn cp mnh ca tn hiu c mnh r rng. Kt qu l mt phm vi c nh ngha bi mnh ln nht trong phm vi mnh ca tn hiu c mnh khng r rng v cp mnh ca tn hiu c mnh r rng.strength0strength1

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T hp ca hai tn hiu bn trn cho ra tn hiu kt qu bn di:strength0strength1

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Hnh 6.23 mnh ng ra tun theo lut a, b v c6.2.9.4 Loi wired logic net Cc loi net triand, wand, trior v wor s gii quyt xung t khi c nhiu iu khin c cng mt mnh. Loi net s gii quyt gi tr tn hiu bng cch xem tn hiu nh u vo ca hm logic.

V d:Xem xt t hp ca hai tn hiu c mnh r rng trong Hnh 6.24.strength0strength1

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Hnh 6.24 Ng ra t hp bi tn hiu ng vo c mnh r rngT hp ca tn hiu trong Hnh 6.24, s dng dy dn logic and, cho ra mt kt qu vi gi tr ging vi k qu to ra bi cng and vi gi tr ca hai tn hiu u vo. T hp ca tn hiu s dng dy dn logic or to ra kt qu vi gi tr ging vi kt qu c to ra bi cng or vi gi tr ca hai tn hiu u vo. mnh ca kt qu ging vi mnh ca t hp tn hiu trong c hai trng hp. Nu gi tr ca tn hiu bn trn thay i c hai tn hiu trong Hnh 6.24 thnh gi tr 1, th kt qu ca c hai loi logic l 1.Khi tn hiu c mnh khng r rng t hp trong dy dn logic, n cn phi xem xt cc kt qu ca tt c cc t hp ca mi cp mnh trong tn hiu u vi mi cp mnh trong tn hiu th 2, nh

trong Hnh 6.25.strength0strength1

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Signal1

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Signal2

T hp cc cp mnh cho cng and theo hnh di y:Signal1Signal2Kt qu

mnhGi tr mnhGi tr mnhGi tr

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T hp cc cp mnh cho cng or theo hnh di y:

Signal1Signal2Kt qu

mnhGi tr mnhGi tr mnhGi tr

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Hnh 6.25 T hp cc mc logic c mnh khc nhau6.2.10 S suy gim mnh bng nhng linh kin khng tr

Cc cng tc nmos, pmos v cmos s cho qua mnh t d liu u vo ti d liu u ra, ngoi tr mnh ca supply s gim xung mnh strong.Cc cng tc tran, tranif0, tranif1 s khng nh hng ti mnh tn hiu qua cc cng u cui hai chiu, ngoi tr mnh supply s gim xung mnh strong.

6.2.11 S suy gim mnh bng nhng linh kin tr

Cc thit b rnmos, rpmos, rtran, rtranif1, rtranif0 s gim mnh ca tn hiu i qua chng theo Bng 6.6

Bng 6.6 mnh nhng linh kin tr mnh u vo mnh gim

SupplydrivePulldrive

StrongdrivePulldrive

PulldriveWeak drive

LargecapacitorMediumcapacitor

Weak driveMediumcapacitor

MediumcapacitorSmallcapacitor

SmallcapacitorSmallcapacitor

HighimpedanceHighimpedance

6.2.12 mnh ca loi net Cc loi net tri0, tri1, supply0 v supply1 s to ra tn hiu vi cc cp mnh c th. Khai bo mt trireg c th c t mt trong hai cp mnh khc cp mnh mc nh.

6.2.12.1 mnh ca net tri0, tri1

Loi net tri0 m hnh mt mng kt ni ti mt thit b in tr ko xung. Trong s vng mt ca mt ngun , nh vy tn hiu c gi tr 0 v mnh pull.Loi net tri1 m hnh mt mng kt ni ti mt thit b in tr ko xung. Trong s vng mt ngun , nh vy tn hiu c gi tr 1 v mnh pull.

6.2.12.2 mnh ca triregLoi net trireg m hnh mt nt lu tr thay i. mnh ca kt qu t mt net trireg m n thay i trng thi lu tr ( l, mt iu khin thay i net v sau i n tr khng cao) s l mt trong ba trng mnh: large, medium, hoc small. c t mnh kt ni vi mt net trireg c th s c t bi ngi dng nh ngha net. Mt nh l medium. C php ca c t ny c m t trong 3.4.1( thay i mnh).

6.2.12.3 mnh ca net supply0, supply1Loi net supply0 m hnh mt kt ni vi t. Loi net supply0 m hnh mt kt ni ti ngun cung cp. Loi net supply0 v supply1 l cc supply iu khin mnh.

6.2.13 tr hon cng (gate) v net Tr hon cng v net cung cp mt phng tin m t chnh xc hn tr hon thng qua mt mch. Tr hon cng c t tr hon truyn tn hiu t bt k u vo no ca cng ti u ra cng. Ti a ba gi tr trn mt u ra trnh din bi tr hon cnh tng, cnh gim, v tt c t nh thy t 6.2.1 ti 6.2.8.Tr hon net tham kho thi gian ly c t bt k iu khin no trn net thay i gi tr theo thi gian khi gi tr ca net cp nht v truyn qua hn na. Ti a c ba gi tr trn net c th c t.C cng v net, mt nh tr hon s l 0 khi khng c c t tr hon c a ra. Khi mt gi tr tr hon c a ra, th gi tr ny s s dng cho tt c cc tr hon truyn chnh xc cho cng hoc net. Khi hai tr hon c a ra, tr hon th nht s c t cho tr hon cnh ln, v tr hon th hai c t cho tr hon cnh xung. Tr hon khi tn hiu thay i ti tr khng cao hoc khng xc nh s thp hn hai gi tr tr hon ny.Ba c t tr hon :

Tr hon th nht tham kho ti chuyn tip ti gi tr 1 (tr hon cnh ln). Tr hon th hai tham kho ti chuyn tip ti gi tr 0 (tr hon cnh xung). Tr hon th ba tham kho ti chuyn tip ti gi tr tr khng cao.Khi mt gi tr thay i ti gi tr khng xc nh, tr hon s l nh nht trong ba tr hon. mnh ca tn hiu u vo s khng nh hng ti tr hon truyn t u vo ti u ra.Bng 6.7 tng hp tr hon truyn t - ti c la chn c t 2 v 3 tr hon.

Bng 6.7 tr hon trn net T gi tr:Ti gi tr:Tr hon nu c

2 tr hon3 tr hon

01d1d1

0xmin(d1,d2)min(d1,d2,d3)

0zmin(d1,d2)d3

10d2d2

1xmin(d1,d2)min(d1,d2,d3)

1zmin(d1,d2)d3

x0d2d2

x1d1d1

xzmin(d1,d2)d3

z0d2d2

z1d1d1

zxmin(d1,d2)min(d1,d2,d3)

V d 6.8V d 1: V d ny c t mt, hai v ba tr hon:

and #(10) a1 (out, in1, in2);

// ch c mt tr hon

and #(10,12) a2 (out, in1, in2);

// tr hon cnh ln v cnh xung

bufif0 #(10,12,11) b3 (out, in, ctrl);// tr hon cnh ln, cnh xung, v tt

V d 2: V d ny c t mt module mch lt n gin vi ba trng thi u ra, ni tr hon ring c a ra cho tng cng. Tr hon truyn t u vo ti u ra ca mt module s c tch ly, v n ph thuc vo phn tn hiu i qua mng.

module tri_latch (qout, nqout, clock, data, enable);output qout, nqout;input clock, data, enable;tri qout, nqout;not #5 n1 (ndata,data);nand #(3,5) n2 (wa,data,clock), n3 (wb,ndata,clock);nand #(12,15) n4 (q,nq,wa),n5 (nq,q,wb);bufif1 #(3,7,13) q_drive(qout,q,enable), nq_drive(nqout,nq,enable);endmodule

6.2.14 tr hon min:typ:max

C php cho tr hon trn mt cng nguyn thy (bao gm UPD), net v lnh gn lin tc s cho php ba gi tr tr hon cho cnh ln, cnh xung v tc. Gi tr ti a, trung bnh v ti thiu ca mi gi tr tr hon s c t nh l cc biu thc cch nhau bi du hai chm (:). Chng khng yu cu qua h (v d: min