Fuel Cell 10 kW Inverter System

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2003 International Future Energy Challenge Competition Final Report A 10KW Fuel Cell Inverter System Submitted by Seoul National University of Technology Student Team Faculty Advisor Dr. Sewan Choi May 18, 2003

description

Low cost inverter system

Transcript of Fuel Cell 10 kW Inverter System

  • 2003 International Future Energy Challenge Competition

    Final Report

    A 10KW Fuel Cell Inverter System

    Submitted by

    Seoul National University of Technology

    Student Team

    Faculty Advisor

    Dr. Sewan Choi

    May 18, 2003

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    TABLE OF CONTENTS

    1. Introduction 2 2. Management 3

    2.1 Team Organization 3 2.2 Education Impact 4

    2.3 Project time line 5 2.4 Project Budget 5 3. Topology Evaluation 6 3.1 Two Topologies 6 3.2 Power Component Design 8 3.3 Cost Evaluation 9 3.4 Efficiency Evaluation 12 4. Design Rationale 14 4.1 Front end DC-DC Converter 14 4.2 Inverter 21 4.3 Bi-directional DC-DC Converter 28

    4.4 System Interface 35 4.5 Heat Sink and Packaging 37

    5. Simulation 41 6. Experimental Result 43 7. Performance Evaluation 46 8. Bill of materials 47 9. Cost Analysis 47 10. Conclusion 49 11. Reference 50

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    List of Figures

    Fig. 2.1 SNUT student team Organization Chart 4 Fig. 3.1 Proposed power circuit topologies 7 Fig. 4.1 Block diagram of the SNUT fuel cell inverters systems 14 Fig. 4.2 Circuit diagram of front end DC-DC converters 15 Fig. 4.3 Main waveforms of the front end DC-DC converters 15 Fig. 4.4 Control block diagram for front end DC-DC converters 20 Fig. 4.5 Circuit diagram of the inverter 21 Fig. 4.6 Equivalent circuit for a LC output filter 24 Fig. 4.7 Equivalent circuit for a non-linear load 25 Fig. 4.8 Control method of balancing the capacitor voltages 27 Fig. 4.9 Bi-directional DC-DC converter 29 Fig. 4.10 Control block diagram for the bi-directional

    DC-DC converter 30

    Fig. 4.11 Inductor voltage & current waveforms 31 Fig. 4.12 Display of RS-232 36 Fig. 4.13 Thermal equivalent circuit 39 Fig. 4.14 Heat sink for front-end DC-DC converter 40 Fig. 4.15 Heat sink for inverter and bi-directional converter 41 Fig. 5.1 Simulated waveforms 42 Fig. 6.1 Experimental waveforms (4.4kW load) 44 Fig. 6.2 Experimental waveforms ( 2KW 2.7KW ) 45 Fig. 6.3 Photograph of the SNUT fuel cell Inverter 46

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    List of Tables

    Table 2.1 Project budget 6 Table 3.1 System parameters for power circuit design 9 Table 3.2 Component ratings of Scheme I 10 Table 3.3 Component ratings of Scheme II 11 Table 3.4 Cost estimates 12 Table 3.5 Power loss estimates 13 Table 4.1 47054-EC Magnetic data 19 Table 4.2 Voltage and current ratings of the switch 34 Table 4.3 Power dissipation in the device used 40 Table 4.4 Thermal characteristics for the heat sink design 40 Table 7.1 Experimental performance (no load to 4.4kW load) 47 Table 8.1 Bill of Materials 48 Table 9.1 Cost spread sheet for front end DC-DC converter 48 Table 9.2 Cost spread sheet for inverter 49 Table 9.3 Cost spread sheet for bi-directional converter 49

    Appendices

    Appendix 51

    A.1 : Schematic for the sensing board

    A.2 : Schematic for the sensing and protection

    A.3 : DSP board

    A.4 : Inverter gate driver

    B : Project time line

    C : Transformer core selection by area product distribution

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    SNUT Fuel Cell Inverter Team

    Student Members

    Minsoo Jang Min Koo

    Jaehyuck Jung Sangmin Jung

    Taehoon Kim Jinwook Oh

    Hyunjung Kim Namki Lee

    Jinhee Lee Joonseo Lee

    Jinsang Jo Kangsuk Lee

    Minkook Kim Byungsoo Nho

    Seungjoo Cheon

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    Summary

    The objective of the 2003 Future Energy Challenge competition is to develop a low cost

    10kW power processing unit for a fuel cell system. The SNUT team, which is composed of

    senior undergraduate students, graduate students and faculty advisors, has been launched for the

    competition.

    This report discusses the power circuit topologies for the SNUT inverter system by evaluating

    the topologies in a practical way. After researching several topologies a topology is chosen and

    the component ratings are designed along with through analysis on the chosen topology. The

    simulation is performed to verify the design and control of the proposed topology. A hardware

    prototype capable of supplying 10kW load was built and tested in the laboratory of SNUT.

    Experimental performances on some design items are compared to minimum target

    requirements of the inverter system. The cost analysis is done based on the spreadsheets

    evaluation forms provided in the 2003 FEC workshop. Some conclusions are made to meet the

    minimum target requirement in the final competition.

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    1. Introduction

    The environmental concern is now the driving force for alternative energy. Fuel cell power

    generation systems are expected to see increasing practical use due to the several advantages

    over conventional generation systems. These advantages include 1) low environmental pollution

    2) highly efficient power generation 3) diversity of fuels(natural gas, LPG, methanol and

    naphta) 4 ) reusability of exhaust heat 5) modularity and 6) faster installation [1]. Fuel cells are

    generally characterized by the type of electrolyte that they use. Solid oxide fuel cells (SOFC)

    have grown in recognition as a viable high temperature fuel cell technology. The most striking

    quality of SOFCs is that the electrolyte is in solid state and is not a liquid electrolyte. The high

    operating temperature up to 1000C allows internal reforming, promotes rapid kinetics with

    non-precious materials and produces high quality byproduct heat for cogeneration or for use in a

    bottoming cycle. A number of different fuels can be used from pure hydrogen to methane and

    carbon monoxide. The major advantage of SOFC lies in its efficiencies raging from 55 to 60%

    [2].

    In general, the function of a power conditioning system in a fuel cell generation system is to

    convert the DC output power from the fuel cell to regulated AC power. There may be two stages

    of power converters. A DC-DC converter converts the low voltage DC output from the fuel cell

    to a level at which an inverter can safely operate. The inverter is used to invert the DC output

    from the DC-DC converter to a suitable AC voltage. The power conditioning unit that basically

    consists of an inverter is required to have the following characteristics: 1) allowable for wide

    output voltage regulation of fuel cell 2) controllability of output voltage 3) available for isolated

    operation and line parallel operation 4) fast reactive power dispatch 5) low output harmonics 6)

    high efficiency and 7) suitable for high power system [3]. Fuel cell production costs are

    currently decreasing and have nearly achieved energy costs that are competitive with local

    utility rates. The inverter cost must also decrease while at the same time increasing efficiency,

    reliability, and power quality levels. The cost reduction of the power processing unit will enable

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    the fuel cell systems to penetrate rapidly into the utility market.

    The objective of the Fuel Cell Inverter Challenge is to develop a 10kW low-cost power

    processing systems that support the commercialization of a SOFC power generation system to

    provide non-utility and ultra-clean residential electricity. The target cost of the stand-alone

    10kW power processing unit will be less than $40/kW in high volume. Further, emphasis will

    also be placed on high energy efficiency as this has direct impact of size and cost of the SOFC

    system and overall system fuel efficiency. Another key objective of this competition is to

    promote design education in the undergraduate curriculum at Seoul National University of

    Technology in conjunction with faculties and industry experts in the power electronics and

    energy conversion area.

    2. Management

    2.1 Team Organization

    The Seoul National University of Technology (SNUT) has formed a multi-disciplinary team

    consisting of nine undergraduate and six graduate(master) students and three faculty advisors.

    The undergraduate students from Department of Control and Instrumentation Engineering(CIE),

    Department of Electrical Engineering(EE), and Department of Mechanical Design(MD) have

    been selected by public notice in our university. The students are divided into six sub-teams (1)

    Inverter and DSP (2) Front-end DC-DC converter (3) Bi-directional DC-DC converter and

    Battery control (4) Sensors and Protection (5) System integration and Interface (6) Heat sink

    and Packaging. The current organizational chart is shown in Fig. 2.1. This interdisciplinary

    approach will allow the team to address thermal management, packaging and case issues.

    Dr. Sewan Choi, professor in the power electronics area, served as the lead Faculty Advisor

    for the team. Other faculty advisors to this project include: Dr. Kiyong Kim with expertise in

    control systems and Dr. Youngseog Kim, professor in the mechanical design area, with expertise

    in heat sink design and packaging.

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    Inverter & DSP Minsoo Jang (CIE, G) Jinwook Oh (CIE, UG)

    Front-end DC-DC converter Jinhee Lee (CIE, G)

    Namki Lee (CIE, UG)

    Bi-directional DC-DC converter and Battery control Jaehyuck Jung (CIE, G)

    Jinsang Jo (CIE, G) Kangsuk Lee (EE, UG)

    Faculty Advisors

    Dr. Sewan Choi (CIE)

    Dr. Kiyong Kim (CIE)

    Dr. Youngseog Kim (MD)

    Sensors and Protection Hyunjung Kim (CIE, G) Taehoon Kim (CIE, G)

    System integration and Interface Min Koo (CIE, UG)

    Sangmin Jung (CIE, UG) Joonseo Lee (CIE, UG)

    Heat sink and Packaging Minkook Kim (CIE, UG) Byungsoo Nho (MD, UG)

    Seungjoo Cheon (CIE, UG)

    Fig. 2.1 SNUT team Organization Chart

    2.2 Educational Impact

    The undergraduate students in most departments in our university are required to take Design

    Project Courses. For example, the students in the Department of Control and Instrumentation

    Engineering must take Design Project I(CIE322) and Design Project II(CIE415) through the fall

    semester of junior year and the spring semester of senior year. Throughout the courses, the

    undergraduate students choose their own topic, do some research on the topic, design and build

    the hardware prototype. In the department of CIE, as a mandatory graduation requirement, all

    the senior students should submit a written report, present what they have worked on with

    working prototype and be judged by the committee from faculty members. The students have

    to take all the courses necessary to complete the project. The 2003 Future Energy Challenge

    provided a good topic for the undergraduate students to participate in the competition. All the

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    undergraduate students on the team will receive credits in Design Project courses(CIE322 and

    CIE415).

    The SNUT team has been holding weekly meetings with all of its members to discuss the

    project. We have had a series of technical seminars mostly by ourselves to get the practical

    background on design of the fuel cell power processing system. Each of graduate student led the

    seminar on some specific topic. Some experts from industries had been sometimes invited to

    give students a practical knowledge.

    These kinds of efforts have been shown to be successful in attracting students. In fact, in the

    spring semester of 2003 two student members, Jinhee Lee and Jinsang Jo, joined the graduate

    program in power electronics of SNUT and continue participating this 2003 FEC competition.

    In the spring semester of 2004 four student members will apply for the graduate program in

    power electronics.

    2.3 Project Timeline

    The project time line for the SNUT team is sown in Appendix B. The team plans to

    construct the prototype in two steps ; the preliminary prototype by the mid of November 2002

    and the final prototype by the end of February 2003. In November 2002, the team submitted the

    written report and presented working prototype as a graduation requirement. The preliminary

    prototype was evaluated by peer reviews from faculty advisors and industry experts. The team

    incorporated feedback from reviewers and any design changes to final prototype.

    2.4 Project Budget

    The project budget for the SNUT Future Energy Challenge team is shown in Table 2.1. The

    budget only takes into account parts for the power processing system and travel for fundraising

    and the competition excluding any labor and equipment. The undergraduate students take part in

    the competition as a choice of topic for the Design Project course and the graduation

    requirement. Also, the department of CIE, SNUT already has laboratory facilities equipped with

    many power electronics instruments and equipments.

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    Table 2.1 Project budget for the SNUT Future Energy Challenge team

    Classification Amount

    Power Device (IGBT, MOSFET, DIODE) $ 2,000

    Battery $ 700

    DSP Evaluation $ 500

    PCB $ 1,500

    Sensors $ 700

    Inductors $ 800

    Capacitors $ 500

    Transformer $ 2,000

    Analog & Digital Ics $ 1,000

    Parts

    Cable, bus bar and case $ 2,000

    Company Presentations $ 1,000

    Work shop $ 5,000 Travel

    Final Competition $ 10,000

    Copies $ 300 Miscellaneous

    Lab supplies $ 500

    Sub Total $ 28,000

    Support from our university and industries is essential to the teams successful project

    performance not only for financial sponsorship, but also for industrial experience. The SNUT

    team faculty advisors and students have been trying to secure the necessary funding for this

    project from the school, industries including national laboratories. The SNUT team secured the

    sponsorship and commitment from the school and some industries, and has been trying solicit

    additional support for the proposed project.

    3. Topology Evaluation

    3.1 Two Topologies

    The SNUT team decided to use the low voltage (48V) battery, which is supposed to be

    provided at the competition test site, as a secondary energy storage to supply transient loads.

    The SNUT team considered two types of power circuit topologies for the SOFC power

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    processing system : Scheme I shown in Fig. 3.1(a) and Scheme II shown in Fig. 3.1(b). In

    Scheme I, as shown in Fig. 3.1(a), the DC voltage from the fuel cell, 29VDC nominal, is first

    boosted to 48V via a non-isolated boost converter. The 48V battery bank in the fuel cell system

    is connected to the 48V DC link so that power flow to and from the battery is controlled by the

    current control of the boost converter. The 48VDC from the boost converter is then converted to

    400VDC via an isolated high frequency DC-DC converter. The high frequency DC-DC converter

    could be push-pull, half-bridge or full-bridge types. The full-bridge type is considered suitable

    for 10KW of high frequency DC-DC conversion.

    Battery48V

    C1

    T1

    D4

    D2S6 S7

    C2

    C3

    S9S8

    L2

    C4

    L3

    D5

    Fuel Cell22 ~ 41V

    S1

    L1D1

    L4

    C5

    L5

    A

    N

    D3S2 S3

    S4 S5

    B

    120Vac60HZ

    120Vac60HZ

    240Vac60HZ

    +

    -

    Vdc400v

    (a) Scheme I

    L5

    L4

    120Vac60HZ

    120Vac60HZ

    120Vac60HZ

    A

    B

    N

    +

    -

    Vdc400V

    T2

    S10S9Battery48V

    L3

    S7 S8

    S6S5

    T1

    C inL2

    L1

    C2

    C1

    D5 D6

    D8D7

    D4D3

    D1 D2

    S4S3

    S2S1

    Fuel Cell22 ~ 41 V

    C3

    C4

    S14S13

    S12S11

    (b) Scheme II

    Fig. 3.1 Proposed power circuit topologies

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    The DC-DC conversion stage includes a transformer isolation for safety, protection and to

    meet the stringent FCC Class-A standards. The 400V DC-DC converter output is then converted

    to 120V/240V, 50/60 Hz, single-phase AC by means of a PWM inverter stage. An output L-C

    filter stage is employed to reduce the ripple component and draw a low THD AC waveform.

    Fig.3.1(b) shows an alternative power circuit configuration (Scheme II) for the SOFC inverter

    system. The DC voltage from the fuel cell , 29VDC nominal, is first converted to 400VDC via an

    isolated high frequency DC-DC converter. The high frequency DC-DC converter could be push-

    pull, half-bridge or full-bridge types. The full-bridge type with two diode bridges connected

    in series at the secondary was chosen as a 5KW of front-end DC-DC conversion. The DC-

    DC conversion stage also includes a transformer isolation for safety, protection and to meet the

    stringent FCC Class-A standards as well. The 48V battery bank in the fuel cell system is

    connected to the 400V DC link via a bi-directional DC-DC converter which is also operated at

    high frequency. The low voltage(48VDC) battery side and the high voltage(400VDC) dc link side

    of the bi-directional DC-DC converter could be current-source full-bridge type and voltage-

    source full-bridge type, respectively, or vice versa. A current-sourced push-pull type using

    MOSFETs and a voltage-sourced full-bridge type using IGBTs were chosen at the battery

    side and the dc link side, respectively. The 400V DC-DC converter output is then converted to

    120V/240V, 50/60 Hz, single-phase AC by means of a PWM inverter stage. An output L-C filter

    stage is employed to reduce the ripple component and draw a low THD AC waveform.

    The common topology chosen for both of the schemes to provide the split phase output

    was two half-bridge inverters. Both of the topologies have thoroughly been examined from

    cost and efficiency standpoint, and one of them was adopted for this project.

    3.2 Power Component Design

    In this section power components of the two schemes are designed so that the designed

    values are used to compare cost and efficiency of the two schemes. The output displacement

    factor is assumed to be unity for design of the fuel cell power processing system rated at

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    10KW. Table 3.1 shows some system parameters for power circuit design of the two

    schemes.

    Table 3.2 and 3.3 list the designed ratings of the power components in the two schemes

    using system parameters in Table 3.1. Based on the designed values, actual devices were

    selected from some manufactures. Appropriate safety margins were considered for actual

    device selection. The design procedure and device selection presented here is not unique,

    but they could be used to relatively compare both of the schemes from cost and efficiency

    standpoint.

    3.3 Cost Evaluation

    In this section the two schemes are compared each other from a cost standpoint. The

    spreadsheets evaluation forms presented at the 2003 FEC workshop is used to perform

    relative cost estimates. Cost factors have been obtained based on the designed vales, shown

    in Table 3.2 and 3.3, without safety margin. The resulting cost estimates of the two schemes

    is shown in Table 3.4. It can be noticed from Table 3.4 that power switches, capacitors,

    transformers employed in both schemes did not give much difference in cost. However, the cost

    of the inductor in the non-isolate boost converter section of Scheme I is significant due to its

    high current capacity. Therefore, it can be concluded that Scheme II is superior to Scheme I in

    cost.

    Table 3.1 System parameters for power circuit design of the two schemes.

    Scheme I Scheme II

    Non-isolated Boost

    Isolated DC-DC

    Inverter Front-endDC-DC

    Inverter Bi-directional

    DC-DC Switching frequency

    40kHz 20kHz 20kHz 25kHz 20kHz 20kHz

    Input voltage

    22 ~ 41V 42 ~ 57.6V 400V 22 ~ 41V 400V 42 ~ 57.6V

    Output voltage

    42 ~ 57.6V 400V 60Hz 120VAC(Split phase)

    400V 60Hz 120VAC (Split phase)

    400V

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    Table 3.2 Component ratings of Scheme I

    Section Component Designed value Actual device Selection

    Vpeak (V) 57.6 MOSFET (S1) Irms (A) 214.4

    APT APT10M07JVR

    (100V, 225A, 7m)

    Vpeak (V) 57.6 Diode (D1) Irms (A) 266.2

    IXYS DSEI2x161-12P

    (1200V, 2X128A, trr = 35ns)

    Inductance 50 uH Inductor (L1) Irms (A) 272.5

    MAGNETICS 43208 (EI)

    Capacitance 3300uF

    Non -isolated

    Boost

    Capacitor (C1) Vpeak (V) 77.7

    Samwha SZ2A338M35100

    (100V, 3300uF, ESR 0.08)

    Vpeak (V) 57.6 MOSFET (S2, S3, S4, S5) Irms (A) 336.66

    IXYS IXFN340N07

    (70V, 340A, 4m)

    Vrms (V) 47.3 Transformer (T1) Irms (A) 389.8

    MAGNETICS 49925 (U)

    Vpeak (V) 410 Diode (D2 ~ D9) Irms (A) 13.75

    IXYS DESI 30-10A

    (1000V, 30A, trr = 50ns)

    Inductance 100 uH Inductor (L2, L3) Ipeak (A) 27.3

    Chang-sung CH270125E (Toroid)

    Capacitance 5000 uF

    Isolated DC-DC

    Capacitor (C2, C3) Vpeak (V) 210

    Samwha GF2G688M76160

    (400V, 6800uF, ESR 0.04)

    Vpeak (V) 420 IGBT (S6, S7, S8, S9) Irms (A) 50

    TOSHIBA MG50Q2YS50

    (600V, 50A, VCE(sat) 2.7V)

    Inductance 93 uH Inductor (L4, L5) Irms (A) 42A

    Chang-sung CH572060E (Toroid)

    Capacitance 16uF

    Inverter

    Capacitor (C4, C5) Vpeak (V) 170V

    Digital Tech

    (250V, 15uF, ESR 0.04)

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    Table 3.3 Component ratings of Scheme II

    Section Component Designed value Actual Device Selection

    Vpeak (V) 41 MOSFET (S1, S2, S3, S4)

    Irms (A) 177.4

    IXYS IXFN340N07

    (70V, 340A, 4m)

    Vrms (V) 47.3 Transformer (T1)

    Irms (A) 389.8

    MAGNETICS 49925 (U)

    Vpeak (V) 410 Diode (D1 D8)

    Irms (A) 8.8

    IXYS DESI 30-10A

    (1000V, 30A, trr = 50ns)

    Inductance 100 uHInductor (L1, L2)

    Irms (A) 12.6

    Chang-sung CH270125E (Toroid)

    Capacitance 5000 uF

    Front-end DC-DC

    Capacitor (C1, C2)

    Vpeak (V) 210

    Samwha GF2G688M76160

    (400V,6800uF, ESR 0.04)

    Vpeak (V) 420 IGBT (S5, S6, S7, S8)

    Irms (A) 50

    TOSHIBA MG50Q2YS50

    (600V, 50A, VCE(sat) 2.7V)

    Inductance 93 uH Inductor (L3, L4)

    Irms (A) 42A

    Chang-sung CH572060E (Toroid)

    Capacitance 16uF

    Inverter

    Capacitor (C3, C4)

    Vpeak (V) 170V

    Digital Tech

    (250V, 15uF, ESR 0.04)

    Vpeak (V) 140 MOSFET (S9, S10) Irms (A) 77.5

    APT APT20M20JFLL

    (200V, 104A, 20m)

    Vrms (V) 58 Transformer (T2)

    Irms (A) 73.3

    MAGNETICS 49925 (U)

    Inductance 40 uH Inductor (L5)

    Irms (A) 113

    Chang-sung CH572060E (Toroid)

    Vpeak (V) 420

    Bi - Directional

    DC-DC

    IGBT (S11,S12, S13,S14)

    Irms (A) 13.1

    TOSHIBA MG50J2YS50

    (600V, 50A, VCE(sat) 2.7V)

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    Table 3.4 Cost estimates of the two schemes according to FEC 2003 cost spreadsheet

    Scheme I Scheme II Component

    Desig. Qty Cost

    Factor Unit

    Cost ($)ExtendedCost ($)

    Desig. QtyCost

    FactorUnit

    Cost ($) ExtendedCost ($)

    S1 1 12349 10,44 10.44 S1 ~ S4 4 7273.4 7.71 30.85 MOSFET S2 ~ S5 4 22419 14.75 50.01 S9, S10 2 10850 9.64 19.27

    D1 1 15333 3.45 3.45 D1 ~ D8 8 3608 2.38 9.55 Diode

    D2 ~ D5 4 5637 2.57 10.30

    S5 ~ S9 4 21000 8.43 33.7 S5 ~ S8 4 21000 8.45 33.7 IGBT

    S11~S14 4 5502 2.3 9.2

    T1 1 18437 26.55 26.55 T1 1 18437 24.7 24.7 Transformer

    T2 1 4251.4 10.94 10.94

    L1 1 3.69 249.51 249.51 L1, L2 2 0.01 41.8 83.7

    L2, L3 2 0.07 44.5 89 L4, L5 2 0.16 49.81 99.62 Inductor

    L4, L5 2 0.16 49.81 99.62 L5 1 0.5 68.7 68.7

    C1 1 19.92 2.85 2.85 C1, C2 2 220 30.63 61.27

    C2, C3 2 220 30.63 61.26 C4, C5 2 0.46 0.16 0.32 Capacitor

    C4, C5 2 0.46 0.16 0.32

    Total Cost 636.97 451.82

    3.4 Efficiency Evaluation

    In this section, efficiency is compared each other by means of power loss calculation.

    For reasonable efficiency comparison the power loss is calculated based on when the output

    power is 5KW. That is, efficiency is evaluated at the steady-state load condition excluding

    battery operation. As shown in Table 3.2 and 3.3, actual devices from some manufactures

    have been selected with appropriate safety margin based on the designed value. From the

    datasheet of the selected devices, the power loss can be calculated in the following manner.

    The switching loss and conduction loss are considered for power switching devices such as

    diodes, MOSFETs and IGBTs. The core loss and copper loss of the transformer can be

    calculated from the selected core and wire from the manufacture. Only copper loss has been

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    considered for inductor since copper loss dominates when an inductor is operated as a filter

    at high frequency. Capacitor loss is calculated using ESR of the selected capacitor.

    The efficiency of the both schemes can be obtained based on the power loss estimates in

    Table 3.5. The estimated efficiencies are 85.4% for Scheme I and 94.6% for Scheme II,

    respectively. Losses in the diode and the MOSFET in the non-isolate boost converter section of

    Scheme I are significant. The losses in the two switches exceed 50% of the total loss of Scheme

    I. Scheme II is superior to Scheme I in both cost and efficiency. In conclusion, the SNUT team

    decided to choose Scheme II for the power circuit topology.

    Table 3.5 Power loss estimates of the two schemes based on manufactures datasheet

    Scheme I Scheme II Device

    Desig. Loss ExtendedLoss (W)

    Desig. Loss Extended Loss (W)

    Conduction loss 335.6 Conduction loss 13.2 D1

    Switching loss 0.875 D1 ~ D8

    Switching loss 0.012

    Conduction loss 20.62 Diode

    D2 ~ D5 Switching loss 0.024

    Conduction loss 122.1 Conduction loss 63.3 S1

    Switching loss 40.69 S1 ~ S4

    Switching loss 29.8

    Conduction loss 63.3 MOSFET

    S2 ~ S5 Switching loss 29.8

    Conduction loss 36.7 Conduction loss 36.7 IGBT S6 ~S9

    Switching loss 29.4 S5 ~ S8

    Switching loss 29.4

    Core loss 31.84 Core loss 15.9 Transformer T1

    Copper loss 45.77 T1

    Copper loss 24.87

    L1 Copper loss 7.77 L1, L2 Copper loss 0.074

    Core loss 1.65 L2, L3 Copper loss 0.148 L3, L4

    Copper loss 0.007

    Core loss 1.65

    Inductor

    L4, L5 Copper loss 0.007

    C1 Capacitor loss 29.15 C1, C2 Capacitor loss 0.0036

    C2, C3 Capacitor loss 0.15 C3, C4 Capacitor loss 69.2 Capacitor

    C4, C5 Capacitor loss 69.2

    Total Loss 864.8 284.12

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    4. Design rationale

    According to the topology evaluation in Section 3, the SNUT team decided to choose

    Scheme II, shown in Fig. 3.1(b) , for the power circuit topology. The block diagram for the

    SNUT fuel cell inverter system is shown in Fig. 4.1. The inverter system consists of a front

    end DC-DC converter, a DC-AC inverter and a bi-directional DC-DC converter. Both the

    fuel cell current control and the dc link voltage control are performed for the front end DC-

    DC converter to improve dynamic performance of the system during a transient state.

    The bi-directional DC-DC converter is operated to charge or discharge the battery according

    to the current reference and the mode of operation determined by the DSP. The two PWM

    controllers are employed for charge and discharge modes of operation, respectively.

    Fuel Cell

    22~41V

    Front-endDC-DC Inverter

    Battery

    48V

    Bi-directionalDC-DC

    DSP320LF2407UCC 3895

    UCC 3895&

    UCC 3825

    IBatt

    VBatt

    Vo

    IoIdc

    IFCVFC

    Vdc

    IBatt

    +

    -VBatt

    VFC-

    +IFC Idc

    Vdc-

    +Io

    +- VoLoad

    120V/240V60HZ

    AC output

    400V

    Fig. 4.1 Block diagram of the SNUT fuel cell inverter system

    4.1 Front end DC-DC converter

    A Front end DC-DC converter is required to boost a unregulated fuel cell voltage of 29V

    nominal to a regulated 400V, as shown in Fig. 4.2. The full-bridge type is a topology of

    choice with which a phase-shift PWM technique can be implemented.

  • 15

    Fuel Cell22 ~ 41 V

    S1 S2

    S3 S4

    D2D1

    D3 D4

    D7 D8

    D6D5

    C1

    C2

    L1

    L2C in

    T1

    +

    +

    -

    -

    VL

    +

    -

    Vin

    Vd

    Vdc400V

    +

    -

    +

    - -

    -+

    +

    Vsec1

    Vsec2

    Vpri1

    IL Idc

    Vpri2

    Np : Ns

    Fig. 4.2 Circuit diagram of front end DC-DC converter

    The phase shift control can achieve zero voltage switching, reducing the losses in the

    switch and therefore increasing system efficiency. High frequency transformers are

    employed to allow a low voltage to be boosted to two split 200VDC buses for the DC link to

    the Inverter. The two high frequency transformers connected in parallel supply two separate

    diode bridges connected in series. The reason why two 2.5kW high frequency transformers

    are employed instead of using a 5kW high frequency transformer is to reduce the leakage

    inductances and therefore to reduce the duty loss.

    Fig. 4.3 Main waveforms of the front-end DC-DC converter

  • 16

    The reduce duty loss also reduces turns ratio of the transformer. This reduces the voltage

    rating of diodes in the secondary side and current rating of MOSFETs in the primary side.

    Fig. 4.3 shows the main waveforms of the front-end DC-DC converter.

    From the inductor voltage VL an equation can be written as,

    =

    2)1(

    21

    2)

    21( DTVDTV

    NNV dcdc

    p

    sin (1)

    Therefore, the duty cycle of the proposed front-end DC-DC converter is obtained by,

    ins

    dcp

    VNVN

    D

    =

    4 (2)

    According to eqn.(2), the duty cycle ranges 0.24 to 0.45 to regulate the dc link voltage of

    400V when the fuel cell voltage varies between 22V and 41V.

    4.1.1 Power component design

    The power components of the front end DC-DC converter are designed in this section

    with the following system parameters.

    DC link power Pdc : 5kW

    Switching frequency fs : 25kHz

    Input voltage Vin: 22 ~ 41V

    DC link voltage Vdc : 400V

    Transformer turns ratio Np : Ns = 1 : 10

    The maximum current at the dc link is,

    AVPI

    dc

    dcdc 5.12== (3)

    Filter inductor Design

    During2

    0 DTt

  • 17

    This inductance can be obtained by combining eqns.(2) and (4),

    s

    inp

    s

    fI

    DVNND

    L

    =

    )()21( (5)

    Assuming a permissible ripple current on the inductor to be 50% of the maximum current

    at the dc link or 6.25A peak to peak, the inductance can be calculated using eqn.(5) to be L

    = 100 uH. The peak inductor current can also be calculated as,

    AIII dcpeakL 6.1521

    , =+= (6)

    From Fig. 4.3, the rms value of inductor current can also be calculated as,

    AI rmsL 6.12, =

    Power switch design

    The voltage rating of diodes and MOSFETs are calculated based on the moment at which

    the fuel cell outputs a maximum of 41V at a minimum duty cycle of D = 0.24. The current

    rating of diodes and MOSFETs are calculated based on the moment at which the fuel cell

    draws a maximum current of 275A at a maximum duty cycle of D = 0.45.

    a. Diodes

    When the fuel cell voltage is 41V, the secondary winding voltage becomes 410V,

    therefore, the peak voltage of a rectifier diode is 410V. A safety margin should be

    considered due to the ringing phenomenon at the secondary winding of the high frequency

    transformer. The voltage rating of the diode is determined to be 600V. A ultra-fast recovery

    diode is chosen to lower the switching loss due to the high switching frequency

    operation(25kHz). As the diode always conducts half of a switching cycle, the average

    current rating of the diode can be obtained by,

    AII dcavD 25.621

    , == (7)

    The peak current of the diode is identical to the peak current of the inductor. Then,

    AII peakLpeakD 6.15,, == (8)

  • 18

    A ultra-fast recovery diode with a rating of 600V, 20A was selected from a manufacture.

    b. MOSFETs

    Power MOSFETs were selected as a switching device for the front-end DC-DC converter

    since they should operate under the low voltage and high current condition. The peak

    voltage of a MOSFET is 41V which is the maximum fuel cell voltage. Considering a safety

    margin due to voltage spikes originated from the leakage inductance of the high frequency

    transformer, the device voltage rating over 70V should be acceptable. By multiplying the av

    and peak value of the diode by the turns ratio of the transformer, the av and peak values of

    the MOSFET can be calculated be 125A and 275A, respectively. Considering safety

    margins, MOSFETs with ratings of 70V, 340A were selected from a manufacture.

    Transformer Design

    As mentioned at the above, two 2.5KW high frequency transformers are employed and the

    transformer design for the 2.5KW transformer is described in the following.

    a. Core material

    Ferrite is an ideal core material for transformers and inductors in the frequency range 20 KHz

    to 3MHz, due to the combination of low core cost and core losses. Ferrite core is chosen as a

    material of a high frequency transformer.

    b. Core size

    The power handling capacity of a transformer core can be determined by its area product

    WaAc, where Wa is the available core window area, and Ac is the effective core cross-sectional

    area. The SNUT team would follow the procedure for transformer core size selection provided

    by Magnetics Co [8].

    The area product is given by,

    KfBeCPAW

    s

    dcca

    =

    4108 (9)

    where Pdc is output power, C is current capacity, e is transformer efficiency, B is flux density,

  • 19

    Table 4.1 47054-EC Magnetic data (MAGNETICS Inc.)

    AL values (mH/1000turns)

    Materials Combination 2300

    K (min.)

    2500 R

    (min.)

    3000P

    25%

    5000F

    (min.)

    Ie

    (cm)

    Ae

    (cm2)

    MinimumArea

    (cm2)

    Ve

    (cm3)

    SET NOM.

    Wt.

    (gms)

    WaAc (cm4)

    EER - 2,440 2,650 4,240 23.1 3.39 3.14 78.6 396 34

    fs is switching frequency and K is winding factor. The core type of choice is EER core, then

    AmpcmC /1007.5 23= (10)

    The transformer efficiency is assumed to be 90%. The winding factor is K = 0.3 (primary side

    only). The flux density B is assumed be 4500(gauss). Then, the WaAc product is calculated as,

    447.23 cmAW ca = (11)

    Using the core selection table by area product distribution (refer to Appendix C), the core of

    47054-EC was selected. Magnetic data for the selected core is shown in Table 4.1.

    c. Number of turns

    Once a core is chosen, the calculation of primary and secondary turns and their wire sizes are

    readily accomplished. The number of primary turns is given by [8],

    turnsfAB

    VNs

    Pp 02.62500039.320004

    10414

    10 88=

    =

    = (12)

    Here, Vp is the peak primary voltage is and A is the cross-sectional area of the core, which are

    given in Table 4.1. Considering duty loss of 20% at the secondary winding of the transformer

    originated from the leakage inductance, the final number of turns for primary and secondary

    windings are determined to be,

    Np : Ns = 6 : 90

    d. Wire size

    The wire size of the transformer windings is calculated based on the rms value of the winding

    current. Since the winding current is 2 times larger than the switch current at each side of the

    transformer, the rms vales of the primary and secondary winding currents can be calculated to

  • 20

    be 187A and 12.5A, respectively. Then, at 500 circular mils per rms ampere the required number

    of circular mils is obtained by [9],

    Primary circular mil requirement 500,93500 == rmsI

    Secondary circular mil requirement 900,5500 == rmsI

    Hence, the wire sizes AWG 0 and AWG 12 are selected from AWG table for the primary and

    secondary wires, respectively.

    4.1.2 Control Method

    Fig. 4.4 shows the block diagram for the feedback control of the front end DC-DC

    converter. The first goal of the control is to regulate the dc link voltage. A PI compensator

    is used for the voltage control. A current control is also implemented to improve the

    dynamic characteristic of the system and to reduce current ratings of the power components

    during load transient condition.

    The current reference is restricted by a current limiter whose value is adjusted by a signal

    from the DSP based on the fuel cell current command so that the power drawn from the fuel

    cell does not exceed its capability. A low cost phase shift PWM controller UCC3895 is

    employed for control of the front-end DC-DC converter. The UCC3895 implements control

    of a full-bridge power stage by phase shifting the switching of one half-bridge with respect

    to the other. It allows constant frequency PWM in conjunction with resonant zero-voltage

    switching to provide high efficiency at high frequencies. A useful feature provided by the

    UCC3895 is soft start capability that allows the system to be protected from capacitor

    inrush currents.

    Voltage Controller

    CurrentController

    Front endDC-DC Converter

    Current limiter

    FCCCurrent Command

    Fuel CellDC Power Input

    To InvCurrent

    Ref.

    DC link Voltage

    Fuel Cell Current

    Voltage Ref.

    Fig. 4.4 Control block diagram for front end DC-DC converter

  • 21

    4.1.3 Sensing & Protection

    The front-end DC-DC inverter provides the protection capability of over current, over/under

    voltage and over temperature in the circuit. The UCC3895 provides the capability to detect any

    fault signal through an input pin of the chip and will shut down the chip by disabling all the gate

    signals to the front-end DC-DC converter.

    This shutdown process is accomplished by any one of the following conditions : 1) the dc

    link voltage measured exceeds a threshold voltage of 500V. 2) the fuel cell voltage goes over

    41V or under 22V. 3) the temperature of a bimetal that is mounted on the heat sink of the DC-

    DC converter rises over 80C. 4) the current drawn from the fuel cell exceeds 100% of the

    maximum fuel cell current during longer than 1 minute . A resistive divider followed by an

    isolation amplifier has been used as a voltage sensing circuit. The fuel cell current is sensed

    through a low resistance shunt resistor for over current protection. Fast fuses have been

    used to protect the DC-DC converter itself from being damaged by any fault of the other

    section of the inverter system. The schematic diagram for the sensing circuit is shown in the

    Appendix A.1.

    4.2 DC-AC Inverter

    The DC-to-AC inverter section, shown in Fig. 4.5, is located between the DC-DC converter

    and the load.

    SW3 SW1

    SW2SW4

    C1

    C2Cf Cf

    Lf

    Lf

    400VDC

    ISA Ia

    Ib VabA

    B

    N

    VaVb

    IC1

    Fig. 4.5 Circuit diagram of the inverter

  • 22

    The inverter system consists of two half-bridge inverters, utilizing center tapped dc link

    capacitors followed by output filters. The front-end DC-DC converter maintains equal 200V

    on the dc-link capacitors, and two inverter legs are operated to generate a split single-phase

    120/240Vac, 60Hz output.

    A low cost DSP is implemented to provide the control scheme for the inverter system. A

    digital PI compensator is employed to regulate the output voltage under varying load condition.

    4.2.1 Inverter design

    In this section the ratings of the power components in the inverter system are determined. A

    detailed list of the inverter requirement for our inverter design is,

    - 5kW continuous @ displacement factor 0.7 leading or lagging, 10kW overload for 1 min.

    - Output voltage : 120/240V(split-phase).

    - Output frequency : 60Hz0.1Hz.

    - Output voltage THD : less than 5% when supplying a stand nonlinear test load.

    - Output voltage regulation quality : output voltage tolerance no wider than 6%.

    DC Link Capacitors

    For a worst case, 10KW overload for 1 minute at displacement factor of 0.7 is considered,

    then the output VA becomes,

    VAVAout 142807.010000

    == (13)

    The full load current of each phase is given by,

    AI rmsa 5.59120214280

    , == (14)

    For the sake of simplicity, the output current ia is assumed to consist of only fundamental (Ia,1)

    and third harmonic (Ia,3). Further, assuming Ia,3 = 0.7Ia,1 since this is a typical case of a single

    phase rectifier type nonlinear load [5],

    1,2

    3,2

    1,. 22.1 aaarmsa IIII =+ (15)

    Therefore, the fundamental rms value of each phase output current becomes,

  • 23

    AIa 77.4822.15.59

    1, == (16)

    The most dominant component of the DC-link capacitor current ic1 is the fundamental

    frequency current, the rms value of which equals,

    AII ac 3.2421

    1,1,1 = (17)

    For a permissible voltage ripple 1cV less than 10% or 20V, capacitance can be obtained by,

    FV

    IC

    c

    c

    322220602

    3.24

    1

    1,11 =

    =

    = (18)

    The peak voltage rating of the dc link capacitor C1 becomes,

    VVVV cDCpeakc 21021

    21

    1,1 =+= (19)

    Based on these designed values, an actual device of 250V 3300uF was selected from a

    manufacture.

    Inverter switches

    The av current rating of an inverter switch can be obtained by,

    AI avSA 28, = (20)

    The peak voltage rating of each IGBT is 420V which is the peak dc link voltage.

    Based on these designed values, IGBTs with 600V 50A rating were selected from a manufacture.

    Output filter design

    Assuming the switching frequency fs to be 20kHz, the frequency ratio is,

    3.3331

    ==ffn s (21)

    An equivalent circuit for output filter design is shown in Fig. 4.6. The transfer function Hn for

    the equivalent circuit can be obtained by,

    )( 2,,,

    cLnLcL

    nLc

    in

    nan XXnjZXnX

    ZjXVV

    H+

    == (22)

  • 24

    Vin

    jnXL

    ZL,n-jXcn Va,h

    Ia

    Fig. 4.6 Equivalent circuit for a LC output filter

    The gain of the transfer function at fundamental frequency, H1, approximates unity if

    cL XX (23)

    Va,n : output voltage harmonic

    Vin : input voltage harmonic

    Xc : impedance of capacitor

    XL : impedance of inductor

    ZL,n : impedance of load

    n : harmonic due to the switching

    As the load impedance ZL,n approaches to infinity, that is, at no load condition the gain at

    harmonic frequency,Hn, approximates in the following,

    1

    12

    2

    =

    =

    c

    LcL

    cn

    XXnXXn

    XH (24)

    Therefore, to satisfy THD requirement of less than 5%, only the switching frequency

    component is considered as [5],

    045.01

    12

    c

    L

    XXn

    (25)

    To limit the ripple voltage across the filter capacitor generated from the third harmonic load

    current, an equivalent circuit is considered as shown in Fig. 4.7. The current flowing through the

    filter capacitor is,

  • 25

    jnXL

    Ia,h

    Ic-jXc

    n Va,h

    Fig. 4.7 Equivalent circuit for a non-linear load

    ha

    LC

    Lc I

    jhXh

    jXjhXI ,+

    = (26)

    Then, the voltage across the filter capacitor at a harmonic frequency becomes,

    Va,h : equivalent voltage

    Ih : current at harmonic

    Xc : impedance of capacitor

    XL : impedance of inductor

    h : harmonic due to non-linear load

    ha

    C

    L

    Lha I

    XXh

    jhXV ,2

    ,

    1

    = (27)

    This can further approximate,

    haLha IhXV ,, (28)

    if 12 C

    L

    XXh (29)

    For the third harmonic h = 3,

    1,

    3,

    1,

    3, 3

    a

    aL

    a

    a

    VIX

    VV

    (30)

    The capacitor ripple voltage at the third harmonic frequency is limited to 3% of the fundamental

    output voltage. Then, the impedance of the filter inductor can be determined by,

    ( ) 035.014.34312003.0

    303.0

    3,

    1, =

    =

    a

    aL I

    VX (31)

  • 26

    Then, the filter inductance becomes,

    Hf

    XL Lf 84.92

    602035.0

    2 1=

    == (32)

    From eqns. (25) and (31) the impedance of the capacitor can be obtained by,

    XC = 167.46 (33)

    Then, the filter capacitance becomes,

    FXf

    Cc

    f 16

    21

    1

    =

    = (34)

    Based on these designed values, inductors with 100H and capacitor with 20F were selected

    from a manufacture.

    4.2.2 Inverter control by using a DSP

    The control for the entire SNUT inverter system is done with the Texas Instrument

    TMS320LF2407 DSP [7]. The DSP is a 40MIPS, fixed-point processor. This chip has 16 PWM

    signals, 41 general purpose digital I/O pins, 16 high-speed A/D converter inputs, and a serial

    communication port. By implementing the control via DSP, the proposed inverter system will

    offer increased flexibility and will minimize component cost. The goal of the DSP control is as

    follows: 1) the PWM gating signals for IGBTs in the inverter stage are generated according to

    the modulation index 2) all of the sensing parameters are sent back to the DSP and are

    monitored for control and for fault conditions 3) output voltage regulation is implemented to

    meet THD specifications under varying load conditions 4) communication between the DSP in

    the inverter system and the fuel cell controller are provided through RS485 and two TTL signals

    5) The current reference for the bi-directional DC-DC converter is calculated by comparing the

    fuel cell current command to the output real power, and the resultant reference with

    charge/discharge mode is sent to the bi-directional DC-DC converter.

    4.2.3 Voltage regulation method

    Output voltage tolerance should not be wider than 6% over the full line voltage and

    temperature range, from no-load to full-load. To meet the output voltage tolerance requirement

  • 27

    the AC output voltage is sensed and a closed-loop control is implemented with a digital PI

    compensator in the DSP.

    The AC output voltage sensing circuit consists of a potential transformer (PT), a gain stage, an

    offset stage and a filtering stage. The PT is low in cost and has an isolation. The output of the

    gain stage is sent to the offset stage, which is necessary because the A/D converter in DSP is

    unipolar. The last stage is a high frequency noise filter which is the unity gain, non-inverting 2th

    order Butterworth with cutoff frequency of 5kHz. The output voltage from the sensing circuit is

    fed to the DSP and is subtracted from a sine wave reference. This error signal is applied to a PI

    compensator and then the resultant signal is compared to a triangular wave of 20KHz. A

    sinusoidal PWM signal is generated and sent to the gate drive circuit for IGBTs. All the PI

    compensation and the sinusoidal PWM generation are implemented within the DSP. Thus, the

    DSP will adjust the modulation index to keep the output voltage regulated under unbalanced

    load condition and from no-load to full-load. The circuit diagram for the DSP board and the gate

    driver are shown in the appendix A.3 and A.4.

    4.2.4 Capacitor voltages balancing

    Unbalance in dc-link capacitor voltages causes generation of even harmonics in the inverter

    output voltages. A control method of balancing the capacitor voltages is shown in Fig. 4.8.

    Va.dc LPF

    *Va.dc = 0

    *

    *

    Vb

    Va

    Vb

    Va PWM.A

    PWM.B

    Phase.A offset

    INVP

    -+

    +-

    -+ +-

    Fig. 4.8 Control method of balancing the capacitor voltages.

  • 28

    Suppose output voltage Va has a positive dc offset, which means that the upper capacitor voltage

    is greater than the lower capacitor voltage. The output voltage Va is sensed and passed through a

    low pass filter to obtain a dc component of voltage Va. This causes addition of a positive value

    to the reference output voltage Vb* resulting in a decrease in upper capacitor voltage and an

    increase in lower capacitor voltage.

    4.2.5 Sensing and protection

    The SNUT DC-to-AC inverter provides the protection capability of over-current, short circuit,

    and over temperature in the circuit to prevent damage to the front-end DC-DC converter stage,

    fuel cell and inverter itself. Over-current protection is implement by using a current transformer

    followed by several op-amp stages. If the output current measured ranges between 100% and

    110% of full load current over 1 minute, a signal is sent to the gate drive for shutdown and to

    the DSP to light up the over current fault LED. Also, the DC-to-AC inverter can be protected

    from output short circuit. If the output current measured exceeds a threshold of 110% of full

    load current, a signal is sent to the gate drive for immediate shutdown and to the DSP to light up

    the short circuit fault LED. Temperature protection is implemented by using a bimetal as a

    temperature sensor that is mounted on the heat sink of the inverter. If the temperature of the

    sensor rises over 60C a fan on the heat sink starts to operate. If the temperature of the sensor

    rises over 80C a signal is sent to the gate drive for immediate shutdown and to the DSP to light

    up the over temperature fault LED. The inverter also shuts down for safe operation if the DC

    link voltage goes over 500V or under 300V. The schematic diagram for the sensing circuit is

    shown in the Appendix A.2.

    4.3 Bi-directional DC-DC converter

    4.3.1 Description and Approach

    The fuel cell has a slow response, and therefore power demand from the load and power

    supply from the fuel cell does not coincide during the transient load condition.

  • 29

    Fig. 4.9 Bi-directional DC-DC converter

    Therefore, a secondary energy source is required to match the power difference between the

    fuel cell and the load. The SNUT team decided to connect the 48V lead acid battery pack that

    will be provided at the competition site into the 400V dc link of the SNUT inverter system.

    Therefore, a bi-directional DC-DC converter is employed to charge or discharge the battery.

    High voltage batteries could be directly connected to the 400V dc link without any intermediate

    power converter, but the high voltage battery is relatively expensive and may have the battery

    cell unbalance problem. The power converter topology of choice between the battery and the dc

    link is the high frequency bi-directional DC-DC converter as shown in Fig. 4.9. The current-

    source push-pull converter on the battery side is operated to discharge the battery whereas the

    voltage-source full-bridge converter on the dc link side is operated to charge the battery. The

    push-pull converter employs MOSFETs as switching devices due to its low voltage and high

    current operation whereas the full-bridge converter employs IGBTs due to its high voltage and

    low current operation.

    According to the recently changed battery management policy by FCT, the battery

    management is performed by the fuel cell system.

    The DSP in the inverter system is required to determine current reference for the bi-

    directional DC-DC converter by calculating the difference in real power between the fuel cell

    system and the load.

  • 30

    Fig. 4.10 Control block diagram for the bi-directional DC-DC converter

    Then, the bi-directional DC-DC converter is operated to charge or discharge the battery

    according to the current reference and the mode of operation determined by the DSP. The two

    PWM controllers, UCC3825 and UCC3895, are employed for charge and discharge modes of

    operation, respectively. The control block diagram for the bi-directional DC-DC converter is

    shown in Fig. 4.10. The PI control is implemented for current control of both converters. The

    inductor current is sensed and compared to a reference determined by the DSP, and then the

    error is applied to a PI compensator.

    The PWM controller generates the gating signal for switching devices of a converter. Only

    one of the two converters should be in operation while the other is in idle state. If the current

    drawn from the battery exceeds 120A which is the maximum discharging current, the chip will

    shut down the bi-directional DC-DC converter by disabling all the gate signals. The battery

    voltage is fed to the DSP and is used for the calculation of the charging current reference. When

    the battery is in deep discharge (< 42V) or over charge (>56.7V) states, the DSP will shut down

    the bi-directional DC-DC converter to protect the battery from being damaged.

    Fig. 4.11 shows the inductor voltage and current waveforms for charge and discharge modes,

    respectively. Let us define the turns ratio n2 of the high frequency transformer T2 to be,

    p

    s

    NNn =2 (35)

  • 31

    (a) Charge mode (b) Discharge mode

    Fig. 4.11 Inductor voltage & current waveforms

    During the charge mode, we have

    SbattSdc

    batt TDVDTnVV )

    21()(

    2

    = (36)

    which gives

    2

    2nD

    VV

    dc

    batt = (where, 0 < D < 0.5) (37)

    During the discharge mode, we have

    Sddc

    battSdbatt TDnVVTDV )

    21()(

    2

    = (38)

    which gives

    )21(2

    dbatt

    dc

    Dn

    VV

    = (0 < Dd < 0.5) (39)

    )1(22

    Dn

    VV

    batt

    dc

    = (0.5 < D < 1, where D = 0.5+Dd) (40)

    4.3.2 Power component design

    In this section the power component ratings of the bi-directional DC-DC converter is

    determined. The system parameters for the design are given in the following.

    The switching frequency for both modes are assumed to be 20kHz

  • 32

    Battery voltage Vbatt : 48V nominal ( 42V~56.7V)

    DC link voltage Vdc : 400V nominal ( 380V~420V assuming 10% of ripple)

    Output power at the dc link Pdc = 5000W (max. 1 min.)

    Turns ratio of the high frequency transformer

    It can be seen from Fig. 4.13 that

    02

  • 33

    directional DC-DC converter should be able to supply full power of 5KW at a maximum load of

    10KW. The maximum dc current at the output can be calculated as,

    AVPI

    dc

    dcdc 5.12== (46)

    Ignoring power loss in the bi-directional DC-DC converter, average power on the battery side is

    the same as average power on the dc link side. Then, the average inductor current become,

    )1(22

    DInI dcL

    = (47)

    Then, the average inductor current at a maximum discharge becomes,

    IL = 113.6 (A) when D = 0.67.

    When switches S1 and S2 are turned on during the discharge mode we have (See Fig. 4.14(b)),

    Sd

    Lbatt

    TDi

    LV

    = (48)

    Then, combining eqn. (48) and D=0.5+Dd the ripple current can be determined by,

    batts

    L VfLDi

    =)5.0( (49)

    From eqns. (47) and (49), the rms current rating of the inductor becomes

    AI rmsL 113= (50)

    Therefore, we choose an inductor with the inductance of 39uH and the rms inductor current

    rating of 113A.

    Switch ratings

    Since the maximum battery discharge current is much larger than the maximum battery

    charge current, the switch ratings of the bi-directional DC-DC converter should also be

    determined based on the discharge mode of operation at full load (5KW, 1min.).

    The voltage and current ratings at the worst case are listed in Table 4.2. Actual devices have

    been selected from a manufacture.

  • 34

    Table 4.2 Voltage and current ratings of the switch based on maximum discharge operation

    Devices Current rating Voltage rating Actual device selected

    MOSFETs

    S1,S2

    Ipeak = 119.6A

    Iav = 60A Vpeak = 140V

    200V. 100A

    MOSFETs

    IGBTs

    S3~S6

    Ipeak = 19.93A

    Iav = 9.5A Vpeak = 420V

    600V. 20A

    IGBTs

    Transformer Design

    In order to reduce the leakage inductances of the high frequency transformer two 2.5KW

    transformers are connected in parallel to form a 5KW transformer. The reduced transformer

    leakage inductance s results in reducing the rating of the snubber mounted on the primary side.

    The 2.5KW transformer design is described in the following.

    a. Transformer core material

    Ferrite core is chosen as a material of a high frequency transformer due to its low cost

    and low losses characteristics for transformers and inductors in the frequency range 20 KHz

    to 3MHz.

    b. Transformer core size

    The SNUT team would follow the procedure for transformer core size selection provided by

    Magnetic Inc. [8]. The core type of choice is EER core, then

    AmpcmC /1007.5 23= (51)

    The transformer efficiency is assumed to be 90%. The winding factor is K = 0.3(primary side

    only). The flux density B is assumed be 2000(gauss) and fs = 20KHz.

    Then, from eqn(9) the WaAc product is given by,

    483

    34.293.02000020009.04

    10)1007.5(2500 cmAW ca =

    =

    (52)

    Using the core selection table by area product distribution, a core of 47054-EC(MAGNETICS

    Inc.) was selected. Magnetic data for the selected core is shown in Table 4.1.

    c. number of turns

    The number of primary turns is given by [8],

  • 35

    turnsBAf

    VNs

    Pp 81.252000039.320004

    101404

    10 88=

    =

    = (53)

    From the turns ratio which has been obtained by n2=6, the final number of turns for primary and

    secondary windings are determined to be,

    Np : Ns = 26: 156

    d. wire size

    At a discharge mode of operation at the full load (5KW, 1min.), the rms vales of the primary

    and secondary winding currents are 39.2A and 8.4A, respectively. Then, at 500 circular mils per

    rms ampere the required number of circular mils is obtained by [9],

    Primary circular mil requirement = 600,19500 = rmsI

    Secondary circular mil requirement = 200,4500 = rmsI

    Hence, the wire sizes AWG 7 and AWG 13 are selected from AWG table for the primary and

    secondary wires, respectively.

    4.4 System interface

    4.4.1 Communication interface

    The SNUT team will connect a PC into the inverter system so that the output phase

    voltage, the output phase current, the output power, the frequency of the output voltage and

    some inverter status including faults, etc. could be monitored. All the data monitored are

    also recorded in the PC and updated every two minutes so that inverter status could be

    interpreted after the fault has occurred. The programming language, Visual C++, has been

    used for PC monitoring program.

    4.4.2 Monitoring Function

    Fig. 4.13 shows an example view of the PC monitor display. The explanation on the display

    menu is given in the following.

    Inverter System Status

    Input Voltage : Display actual input voltage of the front-end DC-DC converter.

  • 36

    Fig 4.12 Display of RS-232

    Input Current : Display actual input current of the front-end DC-DC converter.

    Input Power : Display actual input power of the front end DC-DC converter.

    Output Voltage : Display actual output voltage between phases A and B of the inverter.

    Output Current : Display actual output current between phases A and B of the inverter

    Output Power : Display actual output average power between phases A and B of the

    inverter

    OL time : Display actual over load time.

    DC Link Voltage : Display actual dc-link voltage.

    Bi-direction System Status

    D_charge ref. : Display the current reference for battery discharge

    Charge ref. : Display the current reference for battery charge.

    Battery Voltage : Display actual battery voltage.

  • 37

    Inverter Output : Phase A / B

    Frequency : Display actual frequency of the Inverter output voltage.

    Voltage : Display actual inverter output voltage in rms.

    Current : Display actual inverter output current in rms.

    V_mean : Display actual inverter output voltage offset.

    Power_avg : Display actual real power(W) at the inverter output.

    Power_app : Display actual apparent power(VA) at the inverter output.

    P_factor : Display actual power factor at the inverter output.

    Fault Status

    Over Load (5kw for a minute) : Over Load LED

    (when the over load continue for a minute)

    Under Voltage Trip (21V) : Under Voltage Trip LED

    (when the input voltage is under 21V)

    DC Link Fault (higher than 480V) : DC Link Fault LED

    (when the DC-DC converter Output is higher than 480V)

    DC Link Fault (lower than 300V) : DC Link Fault LED

    (when the DC-DC converter Output is lower than 300V)

    Low Battery Fault (lower than 48v) : Low Battery Fault LED

    (when the battery voltage is under than 48V)

    4.5 Heat sink analysis

    4.5.1 Thermal analysis

    The heat generated by electrical loses from the switching devices should be dissipated to

    avoid the performance degradation or failure. The heat sink is a crucial and a costly

    component of the power processing unit. The factors to be considered for designing the heat

    sink are material, weight, size, maximum heat load, surrounding temperature and cost. A

    fan will be employed to increase the rate of convection heat transfer rate of the heat sink

  • 38

    making the size of the heat sink smaller. In this section the design of the heat sink for the

    SNUT inverter system is detailed. The operating parameters such as total power dissipation

    are defined and thermal circuits of the switching devices mounted on the heat sink are

    established and analyzed. The first step is to calculate the power dissipation of a switching

    device according to the equations below.

    MOSFETs

    Switching loss ][21

    )()( offonspeakdcrmsdssw ttfVIP += (54)

    Conduction loss s

    ononDSrmsSWcon t

    tRIP = )()(2 (55)

    Total loss swcon PPP += (56)

    IGBTs

    Switching loss ][21

    )()( offonsrmsCEpeakdcsw ttfIVP += (57)

    Conduction loss s

    onrmsCEsatCEcon t

    tIVP = )()( (58)

    Total loss swcon PPP += (59)

    Then, a thermal equivalent circuit for analyzing thermal characteristic of the heat sink is defined

    as shown in Fig. 4.13 when two kinds of power devices are mounted on a heat sink.

    Given power loss Pl (where, l = 1 or 2) of a switching device, junction to case thermal

    resistance Rjc,l case to heat sink thermal resistance Rch,l ambient temperature Ta, and juntion

    temperature Tj,l heat sink to ambient thermal resistance Rha can be obtained in the following

    procedure.

    The case temperature Tc,l can be given as,

    ljclljlc RPTT ,,, = (60)

  • 39

    Fig. 4.13 Thermal equivalent circuit

    Then, heat sink temperature Th,l can be given as,

    lchllclh RPTT ,,, = (61)

    Then, the total heat sink temperature Th is,

    2,1, hhh TTT += (62)

    Finally, heat sink to ambient thermal resistance Rha is obtained by,

    21 PPTTR ahha +

    = (63)

    4.5.2 Heat sink design

    In this section the heat sink for SNUT inverter system is designed based on the actual devices

    selected in the previous section. The switching loss, the conduction loss and the total power loss

    of MOSFETs and IGBTs in each section are calculated using eqns. (54) to (59) and listed in

    Table 4.3. A heat sink will be used for each section of the converters.

    Now, the ambient temperature Ta, which is the temperature inside the package, is assumed to

    be 40C. The case to heat sink thermal resistance Rch is usually considered to be 0.3C/W if a

    thermal grease is applied between the case and the heat sink. The junction temperature Tj is

    given in the data sheet of the power device. Then, the case temperature Tc, the heat sink

    temperature Th and the heat sink to ambient thermal resistance Rha can be obtained using eqns.

    (60) to (63) Table 4.4 summarizes the thermal characteristics required for the heat sink design.

    Using the heat sink to ambient thermal resistance, the area of the heat sink required can be

  • 40

    calculated or the heat sink can directly be selected from a manufacture by the heat sink to

    ambient thermal resistance obtained. Fig.4.14 to Fig.4.15 shows the heat sinks of each section

    selected based on the heat sink to ambient thermal resistance Rha. A safety margin was

    considered for actual heat sink selection from the manufacture.

    Table 4.3 Power dissipation in the device used

    Section Device Switching loss per unit

    (Psw) Conduction loss per unit

    (Pcon) Total loss per unit

    (P)

    MOSFET 16.7 32.2 48.9 Front-end DC-DC Diode 0.012 13.2 13.21

    Inverter IGBT 70.56 50.4 120.96

    MOSFET 48.3 59.4 107.7 Bi-directional DC-DC IGBT 34.9 5 39.9

    Table 4.4 Thermal characteristics for the heat sink design

    Section Device Q`ty Rjc(C/W) Tj(C) Tc(C) Th(C) Rha(C/W)

    MOSFET 12 0.21 70.26 60 Front-end DC-DC Diode 4 1.25 65.85 49.34

    45.38 0.11

    Inverter IGBT 4 0.22 112.5 85.9

    MOSFET 2 0.18 103.3 80.92 Bi-directional DC-DC

    IGBT 4 0.31 67.54 55.17

    49.7 0.08

    Fig. 4.14 Heat sink for front-end DC-DC converter (Rha=0.09C/W)

  • 41

    Fig. 4.15 Heat sink for inverter and bi-directional (Rha=0.08C/W)

    5. Simulation

    In this section the whole inverter system designed in the previous section is simulated using

    PSIM to validate the proposed design concept. The simulation was done with realistic

    parameters of the selected device if possible. Fig. 5.1 shows the simulated waveforms for a

    worst case of load transient from 5KW to 10KW and back to 5KW again. Fig. 5.1(a) shows the

    inverter current on the dc side demonstrating an increase and a decrease in average value

    according to the load change. Fig. 5.1(b) shows the output current of the front-end DC-DC

    converter. The average value of the current did not change during the transients even if the

    ripple was increased due to the operation of bi-directional DC-DC converter. The dc link

    voltage was well regulated at 400V, as shown in Fig. 5.1(c). Fig. 5.1(d) and (e) shows the

    current waveforms of the dc link side and the battery side of the bi-directional DC-DC converter,

    respectively. This illustrates that for a sudden load change the bi-directional DC-DC converter

    draws an amount of power from the battery, which is difference in power between the fuel cell

    and the load. The output phase voltage was well regulated during the load transient while the

    output current shows an increase and a decrease according to the load change.

  • 42

    Fig. 5.1 Simulated waveforms (5KW 10KW 5KW) (a) inverter current on the dc side, (b) output current of the front-end DC-DC converter, (c) dc link voltage, (d) current waveforms on the dc link side of the bi-directional DC-DC converter, (e) current waveforms of the battery side of the bi-directional DC-DC converter, (f) output phase voltage, (g) output phase current

    (a)

    (b)

    (c)

    (d)

    (e)

    (f)

    (g)

  • 43

    6. Experimental Result

    A 10KW prototype inverter has been built in the laboratory of SNUT, and experimental

    waveforms are presented in this section. A programmable DC power source capable of

    supplying 5KW was used instead of the fuel cell. Four 12V, 80AH batteries are connected in

    series to form a 48V battery. The experimental waveforms for a steady state condition at

    4.4KW load level are shown in Fig. 6.1. Fig. 6.1(a) shows the output phase voltages VAN and

    VBN, respectively. Fig. 6.1(b) shows the output voltage VAB and current with a linear load.

    The experimental waveforms were obtained for a transient discharge mode of operation, that

    is, a load increase from 2kW to 2.7kW. The upper trace in Fig. 6.2(a) shows the output current

    of the front end DC-DC converter whose average value did not change after the transient even if

    the ripple was slightly increased due to operation of bi-directional DC-DC converter. The lower

    trace in Fig. 6.2(a) shows the dc link voltage, which undergoes an overshoot and is stabilized.

    Fig. 6.2(b) shows the inverter current on the dc side indicating an increase in average value

    according to the load increase. Fig.6.2(c) and (d) show the PWM current waveform on the dc

    link side of the bi-directional DC-DC converter and its extended waveform in time scale,

    respectively. Fig. 6.2(e) and (f) show the current waveform on the battery side of the bi-

    directional DC-DC converter and its extended waveform in time scale, respectively. This

    demonstrates that for a sudden load increase the bi-directional DC-DC converter would quickly

    draw an amount of power from the battery, which is difference in power between the fuel cell

    and the load. The upper trace in Fig. 6.2(g) shows the output phase voltage which is well

    regulated during the load increase. The lower trace in Fig. 6.2(g) shows a magnitude increase of

    the output phase current indicating load increase. Fig. 6.2(h) shows the extended waveforms in

    time scale for Fig. 6.2(g).

    Photograph of the SNUT fuel cell inverter system is shown in Fig. 6.3..

  • 44

    (a) output voltages : phase AN and phase BN

    (b) output voltage and current : phase AB

    Fig. 6.1 Experimental waveforms (4.4kW load)

  • 45

    Fig. 6.2 Experimental waveforms ( 2KW 2.7KW ), (a) upper : output current of the front end converter ; lower: dc link voltage, (b) dc side inverter current, (c) output current of the bi-directional converter, (d) extended waveform of (c), (e) battery current, (f) extended waveform of (e), (g) output phase voltage and current, (h) extended waveforms of (g)

    (b) (a)

    (c) (d)

    (e) (f)

    (g) (h)

  • 46

    Fig. 6.3 Photograph of the SNUT fuel cell inverter

    7. Performance evaluation

    The 10kW prototype inverter system was tested from no load to 4.4kW load. Experimental

    performances of some important design items have been obtained and compared to minimum

    target requirement of the inverter system as shown in Table 7.1. The SNUT prototype inverter

    met the minimum target requirements for most of the design items such as frequency regulation,

    THD of the output voltage, output voltage regulation and input current ripple. The SNUT

    prototype demonstrated a good performance, especially in THD of output voltage and output

    voltage regulation. The efficiency of the front end DC-DC converter section was 90% and that

    of the inverter section was 97% resulting in total system efficiency of 88%.

    The SNUT team is trying to increase the efficiency by optimizing design and selection of the

    devices.

  • 47

    Table 7.1 Experimental performance (no load to 4.4kW load)

    Design Item 2003 FEC

    Specification performance SNUT team

    Experimental performance

    Frequency 60Hz 0.1Hz 59.95Hz ~ 60.09Hz

    THD (Output voltage harmonic) 5% Lower than 1.94%

    Regulation 6% -2.4% ~ +0.2% Input current ripple 3% Lower than 2.2%

    Efficiency (measured at 4.4kW load) Higher than 90% Total 88%

    (DC-DC:90%, INV:97%)

    8. Bill of Materials

    A detailed bill of materials for the front end DC-DC converter, the DC-AC inverter, and the

    bi-directional DC-DC converter sections is listed in Table 8.1. We could not find some electrical

    parts such as power switching devices and transformer cores in Korea. Therefore, we sometimes

    had to use parts which has much larger ratings than the designed value.

    9. Cost analysis

    The SNUT team has been placing great emphasis on cost through the whole design process.

    There are many factors to purchasing electrical parts. The cost analysis is based on the

    spreadsheets evaluation forms provided in the 2003 FEC workshop. The result of the cost

    analysis for the front end DC-DC converter, the DC-AC inverter and the bi-directional DC-DC

    converter are shown in Table 9.1 to 9.3, respectively. The cost of the front end DC-DC converter

    was $233.23. The cost of the DC-AC inverter was $150.06. The cost of the bi-directional DC-

    DC converter was $121.1. The total cost of the 10kW SNUT fuel cell inverter system was

    $504.39. The values in the table indicate only preliminary, relative cost estimates, not dollars. A

    detailed bill of material will be developed and provided in the final report for evaluation of

    actual cost of product.

  • 48

    Table 8.1 Bill of materials

    Component (Rating) Manufacturer (Part number) Qty.

    Power switch MOSFETs (100V, 180A) IXYS (IXFN180N10) 12 MOSFETs (200V, 180A ) IXYS (IXFN180N20) 2 IGBTs (600V, 200A ) Fuji (2MBI200N-060) 2 IGBTs (600V, 50A) Toshiba (MG50J2YS50) 2 Diodes (1000V, 2X30A ) IXYS (DESI 2X31-10B) 5

    Inductor MPP core (100uH, 15A) Chang-Sung (CH270125E) 2 MPP core (93uH, 60A) Chang-Sung (CH572060E) 2 MPP core (40uH, 120A) Magnetics (K5528B026) 1

    Transformer Ferrite EE core (2.5kW) ISU ceramics (EE118) 4

    Capacitor Electrolytic (400V, 1000uF) 2 Electrolytic (400V, 3300uF) 2

    Opto-isolated gate driver IC Agilent (HCPL-316J) 14 Control

    DSP controller TI (TMS320LF2407) 1 Unitrode (UCC3895) 2

    PWM controller Unitrode (UC3825) 1

    Amplifier Isolation amplifier Burr-Brown (ISO122) 2 Instrumentation amplifier Burr-Brown (INA126) 2 Differential amplifier Burr-Brown (INA117) 1 Op-amp National (LF353) 20

    Fans (120Vac, 33W) Fulltech (UF15P-12H) 3 Sensor

    Hall current (400A) LEM (HAS 400S) 1 Hall current (200A) LEM (HAS 200S) 3

    Table 9.1 Cost spread sheet for front end DC-DC converter

    VOLT VOLT CUR CUR UNIT EXTENDEDDEVICE QTY DESIG UNIT MEASURE (Vpk) (Vrms) (Avg) (Arms) COST COST

    DIODE 8 D1~D8 410 6.25 2.29 18.34

    MOSFET 4 S1~S4 41 125 6.56 26.24

    CAP (ALUM) 2 C1,2 3222 uF 210 19.78 39.55

    TRANSFORMER 1 T1 47.3 389.8 26.57 26.57

    CHOKE 2 L1, 2 100 UH 12.6 41.40 82.79

    LOSSES 416.8 W 34.73 34.73

    CONTROL 5.00

    TOTAL 233.23

  • 49

    Table 9.2 Cost spread sheet for inverter

    Table 9.3 Cost spread sheet for bi-directional converter

    10. Conclusion

    The objective of this project is to develop a low cost, high efficiency 10kW inverter system

    for a SOFC system. In this report a power circuit topology for the inverter system has been

    chosen after evaluating two possible topologies in a practical way proposed. All the component

    ratings were designed along with thorough analysis on the chosen topology. A hardware

    prototype capable of supplying 10kW load was built and tested at a laboratory of Seoul National

    University of Technology. The SNUT prototype inverter met the minimum target requirements

    and demonstrated a good performance in most of the design items. The SNUT team has been

    trying to increase the efficiency and to decrease the cost by optimizing design and selection of

    the devices. The SNUT team strongly believes the final prototype meet the efficiency and cost

    requirements.

    VOLT VOLT CUR CUR UNIT EXTENDEDDEVICE QTY DESIG UNIT MEASURE (Vpk) (Vrms) (Avg) (Arms) COST COST

    IGBT 2 S1~S4 420 28 4.77 9.53

    CAP (ALUM) 2 C3,4 16 uF 170 0.17 0.33

    CHOKE 2 L3,4 93 UH 60 59.50 119.00

    LOSSES 134.4 W 11.20 11.20

    CONTROL 10.00

    TOTAL 150.06

    VOLT VOLT CUR CUR UNIT EXTENDEDDEVICE QTY DESIG UNIT MEASURE (Vpk) (Vrms) (Avg) (Arms) COST COST

    IGBT 2 S11~S14 420 9.5 1.69 3.38

    MOSFET 2 S9, S10 140 60 8.32 16.65

    CHOKE 1 L5 40 UH 113 69.49 69.49

    TRANSFORMER 1 T2 58 73.3 10.95 10.95

    LOSSES 151.5 W 12.63 12.63

    CONTROL 8.00

    TOTAL 121.10

  • 50

    11. Reference

    [1] R. Anahara, S. Yokokawa and M. Sakurai, Present Status and Future Prospects for Fuel Cell Power

    Systems, Proceedings of the IEEE, vol. 81, no. 3, March 1993, pp.399-407

    [2] A. Emadi and S. Williamson, Status Review of Power Electronic Converters for Fuel Cell

    Applications, Journal of Power Electronics, vol. 1, no. 2, Oct. 2001, pp.133-144

    [3] N. Azli, A. Yatim, DSP-based Online Optimal PWM Multilevel Control for Fuel Cell Power

    Conditioning Systems, IEEE IECON conf. rec, 2001, pp.921-926

    [4] Final Reports from the 2001 Future Energy Challenge, Available: http://www.energychallenge.org

    [5] R. Gopinath, D. Kim, J. H. Hahn, M. Webster, J. Burghardt, S. Campbell, D. Becker, P. N. Enjeti, M.

    Yeary, J. Howze, Development of a Low Cost Fuel Cell Inverter System with DSP Control, Power

    Electronics Specialists Conference, 2002. pesc 02. 2002 IEEE 33rd Annual , Volume: 1 , 2002, pp. 309-

    314

    [6] The 2003 International Future Energy Challenge

    http://www.energychallenge.org/

    [7] Texas Instruments, http://www.ti.com/

    [8] Design application note MAGNETICS. INC.

    [9] A. I. Pressman, Switching Power Supply Design. McGRAW-HILL INTERNATIONAL, 1999.

  • 51

    Appendices

    Appendix A.1 Schematic for the sensing board

    1M

    0.1u

    10n0.1u

    0.1u

    0.1u

    DC-DC converter(15v)

    1

    2

    5

    3

    4Vin

    GND

    Vout(+)

    GND

    Vout(-)0.1u

    200k

    10k

    ISO122

    1

    2

    7

    89

    10

    15

    16

    +Vs1

    -Vs1

    Vout

    GND+Vs2

    -Vs2

    Vin

    GND

    V_Sensing

    0.1u

    0.1u

    INA 126

    7

    3

    8

    2

    6

    54

    1

    V+

    Vin+

    -

    Vin-

    Vo

    GNDV-

    -

    10k

    SMPS(+15V)

    SMPS(+15V)

    0.1u

    0.1u

    10n

    SMPS(-15V)

    Vout DC 400V

    DC-DC(+15V)

    DC-DC(-15V)1k 10k

    200k

    DC-DC(+15V)

    DC-DC(-15V)

    Appendix A.2 Schematic for the sensing and protection

    +15

    +5

    -

    +

    U8ALF353

    3

    21

    84

    +15

    -15

    -15

    OV_Ian

    T1

    TRAN_HM31

    1 3

    2 5

    ON : SD

    +15

    +15

    0.1uF

    360

    100

    D5

    1N4148

    Vbn_6V

    R3

    20k

    Van

    -15

    101

    10k

    -

    +

    U3BLF353

    5

    67

    84

    10k

    0.1uF

    Ibn_rms

    -

    +

    U4BLF353

    5

    67

    84

    R3

    20k

    201

    +15

    Ian

    OV_Ibn

    10k

    10k

    G1SG1

    -

    +

    U3ALF353

    3

    21

    84

    U7B

    4081

    5

    64

    147

    10k

    +15

    -

    +

    U1BLF353

    5

    67

    84

    0.1uF

    -

    +

    U8BLF353

    5

    67

    84

    10k

    -

    +

    U2ALF353

    3

    21

    84

    T1

    TRAN_HM31

    1 3

    2 5

    10k

    OV_I SET

    0.1uF

    -

    +

    U1BLF353

    5

    67

    84

    101

    +15

    U11

    EL25P1

    1

    2

    3

    +

    -

    M

    50k VR1

    +5

    100

    U7A

    4081

    1

    23

    147

    SG2

    R1

    10k

    -15

    Van_rms

    Vbn_rms

    PWM1

    0.1uF

    R2

    300

    +5

    10K

    -

    +

    U4ALF353

    3

    21

    84

    10k

    -150.1uF0.1uF

    +15

    10K

    Van_6V

    10K

    D2

    DIODE

    R2

    300

    U6D

    4081

    12

    1311

    147

    U6B

    4081

    5

    64

    147

    OV_I SET

    0.1uF

    10k

    Ibn_rms

    D2

    4148

    10k

    D3

    ON :

    U7C

    4081

    8

    910

    147

    0.1uF

    +C1847uF

    R2

    300

    0.1uF

    10k

    G3

    0.1uF

    -

    +

    U1ALF353

    3

    21

    84

    -15

    Vbn

    D2

    4148

    +5

    N

    R3

    1k

    20k

    Ian_rms

    0.1uF

    20k

    10K

    SG4

    0.1uF

    +5

    SG3

    D2

    DIODE

    R3

    1k D5

    1N4148

    SD

    -

    +

    U1ALF353

    3

    21

    84

    +C1847uF

    D5

    1N4148

    SW1SD_ON

    12

    470

    U6C

    4081

    8

    910

    147

    PWM4201

    360

    Ibn

    0.1uF

    -15

    10k

    -15

    N

    -

    +

    U2ALF353

    3

    21

    84

    U11

    EL25P1

    1

    2

    3

    +

    -

    M

    10k

    470

    10k

    U8

    74HC573

    23456789

    111

    1918171615141312

    D0D1D2D3D4D5D6D7

    LEOE

    Q0Q1Q2Q3Q4Q5Q6Q7

    D3

    ON : OV_I

    D5

    1N4148

    10k

    OFF :

    0.1uF

    +5

    G2

    50k VR1

    PWM3

    10k

    +C184.7uF

    U6A

    4081

    1

    23

    147

    +15

    10k

    G4

    D3

    ON : OV_I

    Ian_rms

    0.1uF

    +15

    10k

    PWM2

    +C184.7uF

  • 52

    Appendix A.3 DSP board

  • 53

    Appendix A.4 Inverter gate driver

    0

    +5

    D11N4746

    3.3K0.1uF

    0.1uF

    100pF

    HCPL-316J

    1

    2

    3

    4

    5

    6

    7

    8 9

    10

    11

    12

    13

    14

    15

    16Vin+

    Vin-

    Vcc1

    GND1

    RESET

    FAULT

    V LED1+

    V LED1- V EE2

    V EE1

    Vout

    Vc

    Vcc2

    DESAT

    V LED2+

    VE

    D2

    DIODE

    G410 1W

    DC LINK

    0.1uF

    Q8

    BDW94C

    0.1uF

    +5

    0.1uF

    SG4

    10 1WFAULT 2

    0.1uF

    D2

    DIODE

    0

    100pF

    D2

    DIODE

    100pF

    10

    +15

    0.1uF

    0.1uF

    330pF

    Q6

    BDW93C

    100

    10 1W

    D11N4746

    10 1W

    HCPL-316J

    1

    2

    3

    4

    5

    6

    7

    8 9

    10

    11

    12

    13

    14

    15

    16Vin+

    Vin-

    Vcc1

    GND1

    RESET

    FAULT

    V LED1+

    V LED1- V EE2

    V EE1

    Vout

    Vc

    Vcc2

    DESAT

    V LED2+

    VE

    GND_1

    Q8

    BDW94C

    D11N4746

    10

    Q8

    BDW94C

    3.3K

    100

    100pF

    3.3K

    SG1

    10

    0.1uF

    Q6

    BDW93C

    100

    330pF

    +5

    0.1uF

    GND_1

    FAULT 4

    D11N4746

    0

    HCPL-316J

    1

    2

    3

    4

    5

    6

    7

    8 9

    10

    11

    12

    13

    14

    15

    16Vin+

    Vin-

    Vcc1

    GND1

    RESET

    FAULT

    V LED1+

    V LED1- V EE2

    V EE1

    Vout

    Vc

    Vcc2

    DESAT

    V LED2+

    VE

    D11N4746

    SG2

    FAULT 1

    0.1uF

    SG3

    G2

    D2

    DIODE

    FAULT 3

    0GND_1

    +5

    S3

    +15

    DC LINK

    S1

    S2

    D11N4746

    Q6

    BDW93C

    47K

    Q8

    BDW94C

    D11N4746

    +15

    0.1uF

    G3G1

    0.1uF

    47K

    GND_1

    Q6

    BDW93C

    HCPL-316J

    1

    2

    3

    4

    5

    6

    7

    8 9

    10

    11

    12

    13

    14

    15

    16Vin+

    Vin-

    Vcc1

    GND1

    RESET

    FAULT

    V LED1+

    V LED1- V EE2

    V EE1

    Vout

    Vc

    Vcc2

    DESAT

    V LED2+

    VE

    -15

    47K

    +15

    -15

    -15

    10

    D11N4746

    3.3K

    0.1uF

    -15

    100

    0.1uF

    DC LINK

    0.1uF

    330pF

    330pF

    DC LINK

    S4

    47K

  • 54

    Appendix B. Project time line

  • 55

    Appendix C. Transformer core selection by area product distribution

    [Design application notes, MAGNETICS Inc.]