FPGAs e SoCs De monstros à solução no edge - s3-sa-east ...€¦ · Deep Learning vs....
Transcript of FPGAs e SoCs De monstros à solução no edge - s3-sa-east ...€¦ · Deep Learning vs....
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FPGAs e SoCsDe monstros à solução no edgeJoão Dullius
BP&M
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O palestrante
• Engenheiro de Aplicações• Processamento Embedded
• FPGAs
João DulliusBP&M Representações
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Industry Trends
The Monster
The Solution
What about Rhinos?
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Heterogeneous
Compute
Cloud to Edge AI Proliferation
Industry Trends
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Internet of ThingsInternet of Everything
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VoT - Video of Things
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VoT - Video of Things
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VoT - Video of Things
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VoT - Video of Things
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VoT - Video of Things
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VoT - Video of Things
4K2160
3840
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VoT - Video of Things
Resolution H.264 MJPEG
1MP (1280*720) 2 Mbps per camera 6 Mbps per camera
2MP (1920*1080) 4 Mbps per camera 12 Mbps per camera
5MP (2560*1960) 10 Mbps per camera 30 Mbps per camera
4K (3840*2160) 18 Mbps per camera 64 Mbps per camera
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Industry Trend: Cloud/Edge Unification
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Genomics Video Analytics Healthcare Finance
Data Center 5G Autonomous Driving Security
Power efficient inference
along with traditional
software
AI Proliferation
Industry Trend: AI Proliferation
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Industry Trend: Heterogeneous Compute
Cache
Cache Cache
1980-2000
2x/ 1.5yprocess → Dennard scaling
2000-2010
2x/ 3.5ymultithreading → Amdahl’s law
2010-2020
2x/ 10ydensity → Moore’s law
SINGLE CORE MULTICORE HETEROGENEOUS ADAPTIVE
HETEROGENEOUS
Cache
Scaling from: Silicon process Architecture-aware software Software-aware architecture
AcceleratorCPU Multicore CPU Multicore CPU FPGA, ACAP
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2012 2018
80
70
50
AlexNet
60
BN-AlexNet
BN-NIN
ENet
GoogLeNet
ResNet-18
VGG-16
VGG-19
ResNet-34
ResNet-50
ResNet-101
ResNet-153 ResNeXt-101
Inception v3
Inception-v4
DenseNet-264 ShuffleNet 2x
SENet-154
MobileNet v2
Top-1
Accura
cy (
1%
)
Silicon Design Cycle
Pace of AI/ML Innovation
Speed of Innovation Outpaces Silicon Cycles
Innovation Cycle
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Architecture Adaptability
Custom Data Flow Custom Precision Custom Memory
APPLICATION
DOMAIN
ARCHITECTURE
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ARCHITECTURE ADAPTABILITY
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Programmable OR Adaptable
Application Architecture
1
ASIC
ADAPTABLE (once)
COMPUTE EFFICIENCY
PROGRAMMABLECPU, GPU, ASSP
1
COMPUTE EFFICIENCY
1
3
3
2
2
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Why Not Programmable AND Adaptable?
FPGA, ACAP
PROGRAMMABLE
COMPUTE EFFICIENCY
1
DSA2
ADAPTABLE
DSA1
2
21Application Architecture
2
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1997 2004 2009 2014 2019 2024
IBM Watson becomes
Jeopardy champion!
Image
classification
Classification
better than humans
AlphaGo beats
Lee Sedol
AlphaZero
chess champion!
ADAS
Deep Blue (traditional software)
beats Garry Kasparov
Complexity: 10^120
Robo-taxis
(geofenced) Fully
autonomous
vehicles
Deep Learning vs. Traditional Software
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The Monster
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FPGAs
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FPGAs
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FPGAs
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The Solution
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FPGA Fabric• 7 Series FPGA Fabric
• Custom Engines
Tightly Coupled Domains• 3000+ interconnects
• Up to 100Gb/s Bandwidth
Integrated Analog• Temp & Power Monitor
• 12-bit 1MSPS ADC
Integrated Peripherals• USB, GigE, CAN
• UART, SDIO, I2C, SPI
High BW Memory• L1/L2 Cache, OCM
• DDR2/3, LPDDR2 w/ECC
Application Processor• Single or Dual Core
• Up to 1GHzA9
Dual Core1GHz
Kintex-7 FPGA Fabric
Dual-Core 800MHz
Artix-7 FPGA Fabric
Single-Core766MHz
Artix-7 FPGA Fabric
SoC
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Mais periféricos?
Drag, Drop,
and Customize
UART1
UART2
. . .
UARTN
USB
PWM
ADC
MIPI
HDMI
Ethernet
DDR2/3
WiFi
Softcore / ARM Cortex
Memory
Management
Unit
Instruction
CacheData Cache
Ethernet
USB
UART
I2C Controller
SPI Controller
Ext Mem Controller
Ethernet ControllerDDR Controller
.
.
.
IP Catalog
Partner IP
CAN
. . .
Automotive & Industrial
Video & Image Processing
Embedded
Networking
Digital Signal Processing
Drag & Drop
100’s de IP & Peripherals
SPI
I2C
✓ Expand Interfaces and
Features
✓ Adopt New Protocols(e.g., EtherCAT, TSN, …)
✓ Develop a “Future-Proof”
project that evolves with market
trendsML
FPGA / SoC
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Trace
if (is_uyvy) {
uyvy2bgr (in_mat, in_rgb);
}
else {
yuyv2bgr (in_mat, in_rgb);
}
resize <INTERPOLATION_AREA,
MAX_IN_HEIGHT,
MAX_IN_WIDTH,
MAX_OUT_HEIGHT,
MAX_OUT_WIDTH,
NPC,
MAX_DOWN_SCALE> (in_r, out_r);
cv.cpp
Application Example: Smart Camera
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Preprocess AI Postprocess
Architecture for Smart Camera
System Performance
ML Latency
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In Programmable Logic
AI acceleration
in AI Engine Preprocess
Running in CPU Preprocess
Vitis Dataflow
Pipelining P
P
AI
AI
AI
Postprocess
Acceleration in
Programmable LogicP AI Postprocess
AI
AI 6 FPS
30 FPS
40 FPS
80 FPS
Postprocess
Postprocess
In AI Engine
Adaptive Architecture for Smart Camera
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Xilinx runtime libraries (XRT)
Vitis target platform
Domain-specific
development
environment
Vitis core
development kit
Vitis accelerated
libraries
OpenCV
Library
BLAS
Library
Vitis AI Vitis Video
Partners
Genomics,
Data Analytics,
And moreFinance
Library
Analyzers DebuggersCompilers
Vitis: Unified Software Platform
Coming soon…
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Shell
HardwareDevelopers
ApplicationSoftware Developers
AI Scientists(iterations in minutes)
EmbeddedDevelopers
Putting it All Together
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© Copyright 2019 Xilinx
VITIS AI Model ZooApplication Module
Face
Face detection
Landmark Localization
Face recognition
Face attributes recognition
Pedestrian
Pedestrian Detection
Pose Estimation
Person Re-identification
Video Analytics
Object detection
Pedestrian Attributes Recognition
Car Attributes Recognition
Car Logo Detection
Car Logo Recognition
License Plate Detection
License Plate Recognition
ADAS/AD
Object Detection
3D Car Detection
Lane Detection
Traffic Sign Detection
Semantic Segmentation
Drivable Space Detection
✓ Open for all users✓ Leveraging mainstream frameworks and
networks✓ Deployable and re-trainable
>> 34
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✓ Multi-task
✓ Multi-model
✓ Multi-framework
✓ Cascaded inference
✓ One or more DPU instances
✓ Custom layer types
✓ Graph segmentation
✓ One bitstream supports many CNNs
Single-chip Deployment of Multiple Models
>> 35
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Edge Deployment of Custom Models
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400+ functions across 8 libraries
Open source, performance-optimized out-of-the-box acceleration
Extensive Open Source Libraries
Library
Docs
Source
Tests
Examples
Benchmarks
25 functions 12 99 114
365525 37 Models
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Compilers
AI optimization
LLVM
User Since 2001
Contributor Since 2007
Now Core to Xilinx Strategy
Committed to Open Source
2007 Contributions2019
Runtime
Libraries
AI Models
20192019
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© Copyright 2019 Xilinx© Copyright 2019 Xilinx
AI Developer Hub
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© Copyright 2019 Xilinx© Copyright 2019 Xilinx
What aboutRhinos?
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© Copyright 2019 Xilinx
More than 900 Rhinos are still being poached each year
In the last decade 8,889 African Rhinos have been lost to poaching
Source: https://www.savetherhino.org/rhino-info/poaching-stats/
>> 41
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© Copyright 2019 Xilinx
CNN
DPU
AWS IoT
Greengrass
Kutleng Engineering Technologies - SmartCAM
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FPGAs - Brave New World
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Building the Adaptable,Intelligent World