Evaluation of Actel FPGA Products by JAXA

18
1 MAPLD2005/1004 sakaide Evaluation of Evaluation of Actel FPGA Products Actel FPGA Products by JAXA by JAXA Yasuo SAKAIDE Yasuo SAKAIDE 1 1 , , Norio NEMOTO Norio NEMOTO 2 Kimiharu Kariu Kimiharu Kariu 1 , Masahiko Midorikawa , Masahiko Midorikawa 1 , Yoshiya Iide , Yoshiya Iide 1 , Masakazu Ichikawa Masakazu Ichikawa 1 , Tamotsu Yokose , Tamotsu Yokose 1 , Yoshihisa Tsuchiya , Yoshihisa Tsuchiya 1 , Toshifumi Arimit , Toshifumi Arimit su su 1 , , Noriko Yamada Noriko Yamada 2 , Hiroyuki Shindou , Hiroyuki Shindou 2 , Satoshi Kuboyama , Satoshi Kuboyama 2 , , Sumio Matsuda Sumio Matsuda 2 , and Takashi Tamura , and Takashi Tamura 2 High-Reliability Components Corporation (HIREC) High-Reliability Components Corporation (HIREC) 1 Japan Aerospace Exploration Agency (JAXA) Japan Aerospace Exploration Agency (JAXA) 2 2005 MAPLD International Conference

description

2005 MAPLD International Conference. Evaluation of Actel FPGA Products by JAXA. Yasuo SAKAIDE 1 , Norio NEMOTO 2 Kimiharu Kariu 1 , Masahiko Midorikawa 1 , Yoshiya Iide 1 , Masakazu Ichikawa 1 , Tamotsu Yokose 1 , Yoshihisa Tsuchiya 1 , Toshifumi Arimitsu 1 , - PowerPoint PPT Presentation

Transcript of Evaluation of Actel FPGA Products by JAXA

Page 1: Evaluation of  Actel FPGA Products  by JAXA

1 MAPLD2005/1004sakaide

Evaluation of Evaluation of Actel FPGA Products Actel FPGA Products

by JAXAby JAXA

Yasuo SAKAIDEYasuo SAKAIDE11,, Norio NEMOTO Norio NEMOTO22

Kimiharu KariuKimiharu Kariu11, Masahiko Midorikawa, Masahiko Midorikawa11, Yoshiya Iide, Yoshiya Iide11,,

Masakazu IchikawaMasakazu Ichikawa11, Tamotsu Yokose, Tamotsu Yokose11, Yoshihisa Tsuchiya, Yoshihisa Tsuchiya11, Toshifumi Arimitsu, Toshifumi Arimitsu11, ,

Noriko YamadaNoriko Yamada22, Hiroyuki Shindou, Hiroyuki Shindou22, Satoshi Kuboyama, Satoshi Kuboyama22, ,

Sumio MatsudaSumio Matsuda22, and Takashi Tamura, and Takashi Tamura22

High-Reliability Components Corporation (HIREC)High-Reliability Components Corporation (HIREC)11

Japan Aerospace Exploration Agency (JAXA)Japan Aerospace Exploration Agency (JAXA)22

2005 MAPLD International Conference

Page 2: Evaluation of  Actel FPGA Products  by JAXA

2 MAPLD2005/1004sakaide

Failures on programmed anti-fuse of Actel FPGA produFailures on programmed anti-fuse of Actel FPGA products which were built in the 0.25 um MEC/Tonami procescts which were built in the 0.25 um MEC/Tonami process have been reported in U.S. since 2003.s have been reported in U.S. since 2003.

While the investigation and evaluation have been perforWhile the investigation and evaluation have been performed by NASA, Industry Tiger Team (ITT) and so forth, tmed by NASA, Industry Tiger Team (ITT) and so forth, the root cause of failure is not clarified and a lot of userhe root cause of failure is not clarified and a lot of users are really concerned about the application of Actel FPs are really concerned about the application of Actel FPGAs (MEC) for flight units under the present condition.GAs (MEC) for flight units under the present condition.

Japan Aerospace Exploration Agency (JAXA) started to Japan Aerospace Exploration Agency (JAXA) started to evaluate Actel FPGA products; A54SX-A (MEC) and RTevaluate Actel FPGA products; A54SX-A (MEC) and RTSX-SU (UMC) in the end of 2004.SX-SU (UMC) in the end of 2004.

BackgroundBackground

Page 3: Evaluation of  Actel FPGA Products  by JAXA

3 MAPLD2005/1004sakaide

(1) MEC die devices(1) MEC die devices

- To determine the acceleration factors of the a- To determine the acceleration factors of the a

ntifuse failures by performing long-term life tesntifuse failures by performing long-term life tes

ts at various temperatures.ts at various temperatures.

(2) UMC die devices(2) UMC die devices

- To evaluate the reliability for space applicatio- To evaluate the reliability for space applicatio

ns by performing long-term life tests and radiatns by performing long-term life tests and radiat

ion tests.ion tests.

Test ObjectivesTest Objectives

Page 4: Evaluation of  Actel FPGA Products  by JAXA

4 MAPLD2005/1004sakaide

Test SamplesTest Samples

PartNumber

ManufacturerSample

SizeRemark

ProgramAlgorithm

A54SX32A-CQ256M

Actel Corp. 190 MEC dieOld

(ver. 4.42)

A54SX72A-CQ256M

Actel Corp. 320 MEC dieOld

(ver. 4.42)

RTSX32SU-CQ256E

Actel Corp. 110 UMC dieOriginal

(ver. 4.48)

Page 5: Evaluation of  Actel FPGA Products  by JAXA

5 MAPLD2005/1004sakaide

Test ItemTest Item ConditionConditionSample sizeSample size

A54A54  SX32ASX32A

A54A54  SX72ASX72A

RTRT     SX32SUSX32SU

Operational Life Test

25 deg.C, 1MHz, 1000H 45 77 -

70 deg.C, 1MHz, 1000H 45 77 -

125 deg.C, 1MHz, 1000H 45 77 100

25 deg.C, 33MHz, 1000H 45 77 -

Temperature Cycling Test -65 to +150deg.C,1000 cycles 45 77 90

Radiation TestSingle Event Effect (SEL/SEU) - - 5

Total Ionizing Dose (TID) - - 5

Test Item and ConditionsTest Item and Conditions

Page 6: Evaluation of  Actel FPGA Products  by JAXA

6 MAPLD2005/1004sakaide

Evaluation test circuit – Diagram

x4:32A/32SUx8:72A

Test Vehicle (1)Test Vehicle (1)

Design featuresDesign features

1- 4-input AND-OR chains1- 4-input AND-OR chains : :

Maximum utilization of antifusesMaximum utilization of antifuses

2- 2- Stable operation using Stable operation using

an external clock circuit:an external clock circuit:

Easier failure detectionEasier failure detection

3- 3- R-cells driven by skewed clock: R-cells driven by skewed clock:

Delays detectable to less than 1Delays detectable to less than 1

0nsec0nsec

4- Continuous monitoring of XORed o4- Continuous monitoring of XORed o

utputs from the same circuit bloutputs from the same circuit blo

ck: ck:

Real-time detection of failuresReal-time detection of failures

Page 7: Evaluation of  Actel FPGA Products  by JAXA

7 MAPLD2005/1004sakaide

Design

type

Low Current

Fuse Count (I,S,K,B)

High Current

Fuse Count (F,X,G,V,H,W)

Dynamic fuse Count (Total)

Part No.Circuit

Block Count

JAXAJAXA99759975 79317931 1790617906

A54SX32A

RTSX32SU4

2144321443 1510215102 3654536545 A54SX72A 8

Colonel Test

7818 5197 13015 RT54SX32S -

General Test

7834 5178 13012 RT54SX32S -

NASA 7406 4696 12102 RTSX32SU -

Test Vehicle (2)Test Vehicle (2)

The number of antifuses in test vehicles

Page 8: Evaluation of  Actel FPGA Products  by JAXA

8 MAPLD2005/1004sakaide

Test EnvironmentTest Environment

Handling EnvironmentHandling Environment ESD protected / designated areaESD protected / designated area

- Vacuum wands- Vacuum wands

- Globes required- Globes required

- Wrist strap- Wrist strap

- ESD shoes- ESD shoes

- ESD safe table mats- ESD safe table mats

- Ionizer (ATE area)- Ionizer (ATE area)

- Antistatic floor - Antistatic floor

etc. etc.

Test SystemsTest Systems Prevention of EOSPrevention of EOS

- Signals and power supplies within - Signals and power supplies within recommended operating conditions recommended operating conditions described in datasheetdescribed in datasheet

(ex. Power strip with noise filter)(ex. Power strip with noise filter)

Page 9: Evaluation of  Actel FPGA Products  by JAXA

9 MAPLD2005/1004sakaide

A54SX32A

Test Results (2): Test Results (2): Initial tInitial tPLHPLH Distribution Distribution

Initial tPLH distribution – A54SX-A (MEC, old programming algorithm)

A54SX72A

tPLH anomalies were observed on initial electrical parameter test for A54SX-A (MEC die) FPGAs

Initial tPLH distribution

0

20

40

60

80

100

120

140

130 132 134 136 138 140 142 144 >145

tPLH [ns]

Fre

quen

cy o

f O

ccur

ence

R3

R2

R1

R0

Initial tPLHdistribution

0

20

40

60

80

100

120

140

0

20

40

60

80

100

120

140

unstable

135 140 145 150

tPLH [ns]

R7

R6

R5

R4

R3

R2

R1

R0

>155

Fre

quen

cy o

f Occ

urre

nce

Page 10: Evaluation of  Actel FPGA Products  by JAXA

10 MAPLD2005/1004sakaide

Test Results (3): Test Results (3): Weibull PlotsWeibull Plots

• Weibull plots for 72A samples were successfully obtained and the

failure mode was infant mortality.

• Weibull plots for 32A samples were slightly different and and statistically poor because of small sample size.

72A Weibull Plot

y(125C) = 0.0954Ln(x) - 2.6000

y(70C) = 0.1002Ln(x) - 2.7259y(25C) = 0.1118Ln(x) - 2.8132

-5

-4

-3

-2

-1

1 10 100 1000 10000

Time [Hour]

ln(-

ln(1

-F))

125C

70C

25C

Comparison of Weibull Plot

y(72A, 25C) = 0.1118Ln(x) - 2.8132

y(32A, 25C) = 0.0518Ln(x) - 3.2763

-5

-4

-3

-2

-1

1 10 100 1000 10000Time [Hour]

ln(-

ln(1

-F))

25C(72A)

25C(32A)

Page 11: Evaluation of  Actel FPGA Products  by JAXA

11 MAPLD2005/1004sakaide

Test Results (4):Test Results (4): Failure Rate as a Function of TimeFailure Rate as a Function of Time

• Failure rates were calculated based on the Weibull plots for 72A samples.

• The failure rates are consistent with 32A and 72A data within practical application purpose.   It was considered that the difference of the failure rate was caused by lot difference because of the same structure of 32A and 72A.

Comparison of Failure Rate1E+11E+21E+31E+41E+51E+61E+71E+8110100100010000100000Time [Hour]Failure Rate [Fit(32A Equivalent)] 25C(72A)25C(32A)

Failure Rate for 72A

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1E+7

1E+8

1 10 100 1000 10000 100000Time [Hour]

Fa

ilure

Ra

te [

Fit

(32

A E

qu

iva

len

t)] 25C

70C

125C

Comparison of Failure Rate

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1E+7

1E+8

1 10 100 1000 10000 100000Time [Hour]

Fa

ilure

Ra

te [

Fit

(32

A E

qu

iva

len

t)] 25C(72A)

25C(32A)

Page 12: Evaluation of  Actel FPGA Products  by JAXA

12 MAPLD2005/1004sakaide

Acceleration Factor (Ea=0.002eV)

y = 0.9567e-0.0218x

1E-1

1E+0

2 2.5 3 3.5

1000/T [1000/K]

1-b

Test Results (5):Test Results (5): Acceleration FactorAcceleration Factor

Ea=0.002eV

• Temperature acceleration factor was calculated based on the Weibull plots for 72A samples

• Given activation energy was too small to screen out the defective antifuses throughout PPBI (125 deg.C, 240 hours) .

Page 13: Evaluation of  Actel FPGA Products  by JAXA

13 MAPLD2005/1004sakaide

Discussion(1):Discussion(1):Failures before life testsFailures before life tests

2/100

18/98 2/79

19/77

# of failure example:

Programming

ATE test

Loading to test board

Waveform check at R.T.

Waveform check at Specified temperature

Start of life test

Rise of Temperature

-

These failures should be included in Weibull Plot

There are several number of operations before start of the life test where defective antifuses can be failed.

It was confirmed that the failures detected in the operations should be included in Weibull plots.

1st2nd

Page 14: Evaluation of  Actel FPGA Products  by JAXA

14 MAPLD2005/1004sakaide

1.E+00

1.E+01

1.E+02

1.E+03

1.E+04

1 10 100 1000 10000

t [Hour]

Del

ta T

PD

[ns]

203(R7)

206(R1)

210(R7)

211(R1)

212(R7)

218(R2)

231(R4)

233(R3)

233(R5)

242(R7)

247(R2)

247(R4)

249(R0)

251(R2)

265(R2)

265(R4)

283(R7)

287(R4)

288(R6)

289(R4)

295(R5)

1.E+00

1.E+01

1.E+02

1.E+03

1.E+04

1 10 100 1000 10000t [Hour]

De

lta

TP

D[n

s]

349(R7)

372(R5)

390(R0)

396(R6)

424(R4)

437(R6)

444(R7)

451(R3)

462(R4)

482(R4)

499(R3)

500(R1)

1.E+00

1.E+01

1.E+02

1.E+03

1.E+04

1 10 100 1000 10000

t [Hour]

De

lta

TP

D[n

s]

306(R3)

311(R0)

327(R3)

340(R5)

345(R1)

347(R7)

350(R3)

367(R6)

404(R4)

406(R2)

421(R3)

Discussion (2):Discussion (2): Antifuse Delay Time Trend Antifuse Delay Time Trend

There were several features of the delay time trend observed with defective antifuses.

In most cases, the delay time once increased and then did not drastically changed.

It was observed that the delay time first increased and then returned close to initial value.

SX72A,25deg.C,1MHz,1000H SX72A,70deg.C,1MHz,1000H

SX72A,125deg.C,1MHz,1000H

Page 15: Evaluation of  Actel FPGA Products  by JAXA

15 MAPLD2005/1004sakaide

Discussion(3):Discussion(3):Antifuse Delay Time DistributionAntifuse Delay Time Distribution

SX72A, 25 deg. C, 1000H

0

1

2

3

4

5

6

7

8

1.0 10.0 100.0 1000.0 10000.0log10(Delta tPD) [ns]

Occ

uren

ce

experiment

normal

The delay time increase observed with failed antifuses has log-normal distribution. The fact may suggest certain physical mechanism.

SX72A, 125 deg. C, 1000H

0

1

2

3

4

5

1 10 100 1000 10000log10(Delta tPD [ns])

Occ

uren

ce

experiment

normal

SX72A, 125 deg. C, 1000H

0

1

2

3

4

5

1 10 100 1000 10000log10(Delta tPD [ns])

Occ

uren

ce

experiment

normal

SX72A, 70 deg. C, 1000H

0

1

2

3

4

5

6

7

1 10 100 1000 10000log10(Delta TPD [ns])

Occ

uren

ce

measured

experiment

SX72A, 70 deg. C, 1000H

0

1

2

3

4

5

6

7

1 10 100 1000 10000log10(Delta TPD [ns])

Occ

uren

ce

measured

experiment

SX72A, 70 deg. C, 1000H

0

1

2

3

4

5

6

7

1 10 100 1000 10000log10(Delta TPD [ns])

Occ

uren

ce

measured

experiment

SX72A, 70 deg. C, 1000H

0

1

2

3

4

5

6

7

1 10 100 1000 10000log10(Delta TPD [ns])

Occ

uren

ce

experiment

normal

SX72A, 70 deg. C, 1000H

0

1

2

3

4

5

6

7

1 10 100 1000 10000log10(Delta TPD [ns])

Occ

uren

ce

measured

experiment

SX72A, 70 deg. C, 1000H

0

1

2

3

4

5

6

7

1 10 100 1000 10000log10(Delta TPD [ns])

Occ

uren

ce

experiment

normal

Page 16: Evaluation of  Actel FPGA Products  by JAXA

16 MAPLD2005/1004sakaide

Discussion(4): Discussion(4): Survival ProbabilitySurvival Probability

Survival probability until mission duration was evaluated using Weibull fitting parameter.

This evaluation was included effects of PPBI, 240hours and 125deg. C, and acceleration factor of temperature (operating temp. is 40deg.C)

0.88

0.90

0.92

0.94

0.96

0.98

1.00

1.02

0 10,000 20,000 30,000 40,000 50,000 60,000 70,000 80,000 90,000 100,000

Mission Dulation (hours)

Su

rviv

al

Pro

ba

bil

ity

3years1year 5years 10years

108,000FIT

35,300FIT

20,900FIT

10,300FIT

Page 17: Evaluation of  Actel FPGA Products  by JAXA

17 MAPLD2005/1004sakaide

Discussion(5): Discussion(5): Policy of JAXAPolicy of JAXA

Almost installed FPGA in JAXA satellites and rockets was performed post programmed burn-in (PPBI) . But temperature acceleration factor of this failure mode was too small to screen out the defects by PPBI. On the other hand, any defects were not observed in the evaluation test of UMC die FPGAs in JAXA.Based on these results, it was suggested that MEC die FPGAs shall be replaced UMC ones in almost JAXA projects.

Page 18: Evaluation of  Actel FPGA Products  by JAXA

18 MAPLD2005/1004sakaide

ConclusionsConclusions

• Weibull plots for the antifuse failures of A54SX-A (MEC) FPGAs were successfully obtained. The failure mode was infant mortality.

• Given temperature acceleration factor was too small to screen out the defective antifuses throughout PPBI (125deg.C 240hours)

• No defective antifuses were observed for RTSX-SU (UMC) FPGAs.

•Based on the results, the MEC die FPGAs shall be replaced with UMC ones by decision of JAXA projects.

• There was a new finding, i.e. the increased delay time distribution for failed antifuses.

•Temperature cycling tests are being performed. No defective antifuses were observed at 800 cycles for MEC die FPGAs.

•The radiation tests are also being performed for UMC die FPGAs.