Embedded Green System Project - 小野寺研究室 - 京都 … Green System Project 65nm Process,...
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Embedded Green System Project 65nm Process, 1.4mm square LSI IP Award Multiple-Performance Processor • Dynamic Voltage and Frequency Scaling • Dynamic Reconfigurable Cache Structure Grant: Japan Cabinet Funding Program for Next Generation World-Leading Researchers Target: Embedded computer system Goal: Battery-less operation of the system Approach: improving the efficiency of energy generation, transfer and consumption Members: Project Overview Research Topics Onodera Laboratory Energy Harvesting System OS-based Energy Management 10mm x 7.5mm 0.18um Process • High efficiency by concerning the transferring efficiency Results: 20~70% Reduction of power loss System Hardware (Kyungsoo LEE) - Control engineering - Energy harvesting - Fuel cells - Modeling System Software (Tohru ISHIHARA) - Leader - RTOS - Compiler - Processor Onodera Lab. - VLSI design - Low-Power & Dependable Circuits Collaboration with Prof. Chang of SNU - Control theory - Energy harvesting - RTOS - Embedde d system Collaboration with Prof. Takada of Nagoya Univ. Configuration e.g.) VDD, Freq. Configuration e.g.) MPPT Periodically checks statuses of generation, charge, and consumption Make actions; change QoS, configurations, and execution modes Quality of Service e.g.）pixel resolution Quality of Service e.g.）frame rate Execution mode e.g.) CPU speed, cache size Execution mode e.g.) LCD backlight Configuration Charge/discharge Configuration Series/parallel Quality of Service e.g.）Service cycle DC-DC converter Scalable Processor Scalable I/O OS-based Energy Management Software E generator Controller Application Application Application E storage Charger Reduce voltage difference by the array reconfiguration Direct power supply from the supercapacitor I/O aware task scheduling Output voltage (V) Output current (mA) IV curve PV curve Output power (mW) 400 0 100 200 300 500 80 0 20 40 60 100 MPP (5.08V, 81.8mA) PV VI curve Efficiency of DC-DC converter Power loss (mW) Voltage di↵erence (V in - V out ) Efficiency (%) 100 75 50 25 0 100 75 50 25 0 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 2.5 Power loss at 10 mA output Power loss at 100 mA output Efficiency at 10 mA output Efficiency at 100 mA output 2. The system operation mode - Power pass configuration - Amount of charge/discharge control DC-DC DC-DC DC-DC DC-DC Charger L 1 L 2 L i (m pv ,n pv ) PV Cap(m c ,n c ) SW1 SW2 SW3 V junc = V MPP DC-DC DC-DC DC-DC DC-DC Charger L 1 L 2 L i (m pv ,n pv ) PV Cap(m c ,n c ) SW1 SW2 SW3 V junc = V MPP DC-DC DC-DC DC-DC DC-DC Charger L 1 L 2 L i (m pv ,n pv ) PV Cap(m c ,n c ) SW1 SW2 SW3 V junc = V Cap 1. The voltage of energy source - Dynamic array configuration - Solar cell and supercapacitor array 3. I/O aware task scheduling
Transcript of Embedded Green System Project - 小野寺研究室 - 京都 … Green System Project 65nm Process,...
Embedded Green System Project
65nm Process, 1.4mm square
LSI IP Award
Multiple-Performance Processor• Dynamic Voltage and Frequency Scaling• Dynamic Reconfigurable Cache Structure
Grant: Japan Cabinet Funding Program for Next Generation World-Leading Researchers
Target: Embedded computer systemGoal: Battery-less operation of the system
Approach: improving the efficiency of energy generation, transfer and consumption
Members:
Project Overview
Research Topics
OnoderaLaboratory
Energy Harvesting System
OS-based Energy Management
10mm x 7.5mm0.18um Process
• High efficiency by concerning the transferring efficiency
Results: 20~70% Reduction of power loss
SystemHardware(Kyungsoo LEE)
-Control engineering
-Energy harvesting
-Fuel cells-Modeling
SystemSoftware(Tohru ISHIHARA)
-Leader-RTOS-Compiler-Processor
Onodera Lab.
-VLSI design-Low-Power & Dependable Circuits
Collaboration with Prof. Chang of SNU
-Control theory-Energy harvesting
-RTOS-Embedded system
Collaboration with Prof. Takada of Nagoya Univ.
Configuratione.g.) VDD, Freq.
Configuratione.g.) MPPT
Periodically checks statuses of generation, charge, and consumption Make actions; change QoS, configurations, and execution modes
Quality of Servicee.g.）pixel resolution
Quality of Servicee.g.）frame rate
Execution modee.g.) CPU speed,
cache size
Execution modee.g.) LCD backlight
ConfigurationCharge/discharge
ConfigurationSeries/parallel
Quality of Servicee.g.）Service cycle
DC-DCconverter
ScalableProcessor
Scalable I/O
OS-based Energy Management Software
E generator Controller
Application Application Application
E storage Charger
Reduce voltage difference by the array reconfiguration Direct power supply from the supercapacitor I/O aware task scheduling
0 2 4 6 8Output voltage (V)
Out
put c
urre
nt (m
A)
IV curve
PV curve
Out
put p
ower
(mW
)400
0
100
200
300
500
80
0
20
40
60
100 MPP (5.08V, 81.8mA)
PV VI curve Efficiency of DC-DC converter
Pow
er lo
ss (m
W)
Voltage di↵erence (Vin
� Vout
)
Effic
ienc
y (%
)
100
75
50
25
0
100
75
50
25
00
25
50
75
100
-1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 2.5
Power loss at 10 mA outputPower loss at 100 mA outputEfficiency at 10 mA outputEfficiency at 100 mA output
2. The system operation mode - Power pass configuration - Amount of charge/discharge control
DC-DC
DC-DC
DC-DC
DC-DC
Charger
L1
L2
Li
(mpv, npv)PV
Cap(mc, nc)
SW1
SW2
SW3
Vjunc = VMPP
DC-DC
DC-DC
DC-DC
DC-DC
Charger
L1
L2
Li
(mpv, npv)PV
Cap(mc, nc)
SW1
SW2
SW3
Vjunc = VMPP
DC-DC
DC-DC
DC-DC
DC-DC
Charger
L1
L2
Li
(mpv, npv)PV
Cap(mc, nc)
SW1
SW2
SW3
Vjunc = VCap
1. The voltage of energy source - Dynamic array configuration - Solar cell and supercapacitor array
3. I/O aware task scheduling
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