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Development of the data acquisition system for the …ccd/presentation/SPIE2011...This presentation...
Transcript of Development of the data acquisition system for the …ccd/presentation/SPIE2011...This presentation...
Development of the data acquisition system for the X-ray CCD camera
(SXI) onboard ASTRO-H
Takahisa Fujinaga (Tokyo Tech and ISAS/JAXA)Naohisa Anabuki , Shoichi Aoyama , Hidenori Kawano , Shoma Ikeda , Masachika Iwai ,
Masanobu Ozaki , Chikara Natsukari , Tadayasu Dotani , Keiko Matsuta , Kazuma Shimizu , Hiroshi Nakajima , Kiyoshi Hayashida , Hiroshi Tsunemi , Shutaro Ueda ,
Shoji Komatsu , Taku Murayoshi , Koji Mori , Tatsuo Watanabe , Hiroyuki Uchida , Takao Ohnishi and Junko S. Hiraga
1. Tokyo Tech 2. ISAS/JAXA 3. Osaka Univ. 4. Univ. of Miyazaki 5. Yokohama National Univ. 6. Kogakuin Univ. 7. Kyoto Univ. 8. The Univ. of Tokyo
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Contents
• Introduction of ASTRO-H and Soft X-ray Imager (SXI)
• Overview of the SXI electronics
• Development of the data acquisition system of SXI: the breadboard models
• Summary
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Introduction: ASTRO-H• The 6th X-ray astronomy satellite of Japan to be launched in 2014, which is developed with NASA and other international collaborators. • Four types of mission instruments are loaded. - Soft X-ray Imager (SXI)- Soft X-ray Spectrometer (SXS)- Hard X-ray Imager (HXI) - Soft Gamma-ray Detector (SGD)
• Wide energy range from soft X-ray to soft gamma-ray (0.3-600 keV) is covered.
http://www.astro-h.isas.jaxa.jp
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Soft Gamma-ray Detector (SGD) Hard X-ray Imager (HXI)
Soft X-ray Imager (SXI) Soft X-ray Spectrometer (SXS)
Takahashi et al. (2010)
This presentation is focused on - the electronics of the SXI- the development of the breadboard model
Overview of SXI sensor Takahashi et al. (2010), Tsunemi et al. (2010)
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• An X-ray CCD camera for ASTRO-H. • SXI sensor is placed at the focal plane of the Soft X-ray Telescope (SXT-I). • A wide field of view (38x38 arcmin) is covered by 2x2 CCD array. • P-channel back-illuminated CCDs are adopted (by Hamamatsu Photonics K.K.). • The CCDs are cooled to -120 degree C using Stirling coolers. SXI-S-FE
Introduction: SXISXT-I
SXI
5.6 m
X-rays
Overview of the SXI Electronics 5
SXI-S SXI-FE SXI-PE
CCD driver“Driver Board”
ΔΣ-ADC“Video Board”
CCD
analog outputs digital
outputs
signals to drive HK
SXI-DE
SpW CPU“MDE”
SpaceWire (SpW) linksignals or outputs
timing clocks
SpW I/O“MIO Board” to SMU
Four CCDs are grouped into two, and each group has its own video/driver/MIO boards.
Overview of the SXI Electronics 6
SXI-S contains 4 CCDs and two sets of ΔΣ-ADC unit. • ΔΣ-ADC is realized with an ASIC and an FPGA in a video board.
SXI-S SXI-FE SXI-PE
CCD driver“Driver Board”
ΔΣ-ADC“Video Board”
CCD
analog outputs digital
outputs
signals to drive HK
SXI-DE
SpW CPU“MDE”
SpaceWire (SpW) linksignals or outputs
timing clocks
SpW I/O“MIO Board”
ASIC FPGA
to SMU
ΔΣ-ADC in the Video boardOutput signals
preamplifier
ΔΣ modulatorodd
even
ASIC FPGA
serial output of 155 bit/pixel
decimation
12 bit/pixel value
decimation
signal level
floating level
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ΔΣ modulator
• The ASIC contains the preamplifier and the ΔΣ modulator, and the FPGA the decimation filter. • Odd and even pixels are processed separately and simultaneously using the individual chain.• Separate processing of the odd/even pixels results in systematic difference of the zero level: raw image always shows vertical stripe pattern.
Overview of the SXI Electronics 8
SXI-FE contains four sets of CCD drivers. • Each driver generates and distributes the analog signals to drive CCDs. • Driver board also collects the housekeeping (HK) information (e.g. temperature, voltage)
SXI-S SXI-FE SXI-PE
CCD driver“Driver Board”
ΔΣ-ADC“Video Board”
CCD
analog outputs digital
outputs
signals to drive HK
SXI-DE
SpW CPU“MDE”
SpaceWire (SpW) linksignals or outputs
timing clocks
SpW I/O“MIO Board” to SMU
Overview of the SXI Electronics 9
SXI-PE contains two sets of SpW I/Os called “MIO Board”. • generates all of the timings • collects the HK information from CCD driver• buffers the frame images• provides SpW I/F to SXI-DE
SXI-S SXI-FE SXI-PE
CCD driver“Driver Board”
ΔΣ-ADC“Video Board”
CCD
analog outputs digital
outputs
signals to drive HK
SXI-DE
SpW CPU“MDE”
SpaceWire (SpW) linksignals or outputs
timing clocks
SpW I/O“MIO Board” to SMU
A MIO board has two FPGAs and 64MB SDRAM.
Overview of the SXI Electronics 10
SXI-DE contains one SpW CPU called “MDE”. • controls the SXI system• buffers the CCD data and the HK information from MIO board• communicates with the spacecraft management unit (SMU)
SXI-S SXI-FE SXI-PE
CCD driver“Driver Board”
ΔΣ-ADC“Video Board”
CCD
analog outputs digital
outputs
signals to drive HK
SXI-DE
SpW CPU“MDE”
SpaceWire (SpW) linksignals or outputs
timing clocks
SpW I/O“MIO Board” to SMU
Development of data acquisition system
• Purposes of the breadboard models (BBMs) are:
- to verify the function of each circuit boards
- to establish the DAQ system from CCD to SpW I/F
• Development of the BBM is separated into two steps:
- BBM0: development was done (2007-2010)
- BBM1: development is in progress (since 2011)
• A smaller format of CCD than the flight model is used for
the BBM development.
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Verification items 12
• SpW communication• acquisition of the frame images• concept of the CCD driver (generation of the driving signals)• the ΔΣ-ADC with the ASIC and the FPGA • energy resolution at 5.9 keV
BBM0
Configuration of the electronics 13BBM0
Differences from the flight model •ΔΣ-ADC was realized with the prototype ASIC board and an FPGA in DE I/F• SXI-PE was divided into two boards• SpaceCube and POSIX OS were used instead of SpW CPU.
SXI-S SXI-FE SXI-PE
CCD driver“prototype Driver”
prototypeNch-CCD
analog outputs
signals to drive
SXI-DE
ΔΣ modulator“prototype
ASIC Board”
Decimation & SpW I/O“DE I/F”
timing clocks
Clock generator“Sequencer”
timing clocks
Protocol converter
“SpaceCube”
TCP/IP
POSIX OS
TCP/IP
Configuration of the flight model
Setup of CCD and analog boards 14
CCD 素子 銅製治具
CCD 抑え板白金温度計
冷却水
CCD
cold plate
cold head
thermometer
prototype Driver (hidden)
prototype ASIC board (hidden)
refigerant
CCD I/F board
An example of the imageBBM0 15
• The images are successfully obtained. • Pixel rate: 100 kHz, CCD temperature: -35 degC, 55Fe source is used• The vertical stripe pattern is due to the separate processing of odd/even pixels in the ΔΣ-ADC.
X-ray spectrumBBM0 16
• We extracted X-ray events from obtained images. • Two peaks are seen. • The energy resolution at 5.9 keV was 164 eV (FWHM).
X-ray event spectrum (Grade 0)
0 5 10
110
0.5
25
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Xra
y co
unts
Energy (keV)
Mn-Kα @ 5.9 keV
Mn-Kβ @ 6.5 keV
Verification results 17
• SpW communication• acquisition of the frame images• concept of the CCD driver (generation of the driving signals)• the ΔΣ-ADC with the ASIC and the FPGA • energy resolution at 5.9 keV
BBM0stable over 24 hoursOKOK
OK164 eV (FWHM)
Verification items 18
• SpW communication• acquisition of the frame images• concept of the CCD driver (generation of the driving signals)• the ΔΣ-ADC with the ASIC and the FPGA • energy resolution at 5.9 keV
• function of the MIO boards (except for the event extraction)• collecting the HK information• acquisition of the frame images• energy resolution at 5.9 keV
BBM0
BBM1
stable over 24 hoursOKOK
OK164 eV (FWHM)
Configuration of the electronics 19BBM1
Differences from BBM0• CCD driver, SpW I/O and ΔΣ-ADC unit have almost the same function as the flight model. • Protocol converter is updated to SpaceWire-to-Gigabit Ether (SpW2GbE).
Configuration of the flight model
SXI-S SXI-FE SXI-PE
CCD driver“Driver Board BBM”
prototype Pch CCD
analog outputs
signals to drive
SXI-DE
ΔΣ modulator“prototype
ASIC Board”
SpW I/O“MIO Board BBM”
timing clocks
Protocol converter
“SpW2GbE”
TCP/IP
POSIX OS
TCP/IP
Decimation“FPGA board”
HK
An example of the imageBBM1
• CCD temperature: 28 deg C, Pixel rate : 69 kHz • A frame transfer CCD was operated in a full-frame transfer mode. This causes the difference between the imaging area and the frame store area.
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Verification status 21
• SpW communication• acquisition of the frame images• concept of the CCD driver (generation of the driving signals)• the ΔΣ-ADC with the ASIC and the FPGA • energy resolution at 5.9 keV
• function of the MIO boards (except for the event extraction)• collecting the HK information• acquisition of the frame images• energy resolution at 5.9 keV
BBM0
BBM1
stable over 24 hoursOKOK
OK164 eV (FWHM)
OK
OKOKin progress
Summary
• SXI is the X-ray CCD camera onboard ASTRO-H. • Using the BBM0, we verified - acquisition of the frame image via SpaceWire - the ΔΣ-ADC with the ASIC and the FPGA - concept of the CCD driver• Using the BBM1, we verified - functions of the MIO board - acquisition of the HK information and the frame images • Based on these results, the engineering model was designed and produced, and is now being tested.
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