Day2 Open

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Transcript of Day2 Open

  • 1. Day2 OpenReview Review of Electronic Design Boolean Logic and Logic Design FPGA/CPLD Device Introduction HDL Tutorial, ModelSim Running Tools Installation( MAX II_SG_V2.pdf C Windows XP/2000 Download cable100) Q&A: Usage of FPGA/CPLDDay2 Topics Logic Circuits Verilog HDL Basic, Combinational Logic Lab: > 50%, Hands-on ModelSim GUI

2. ALTERA http://www.gfec.com.tw/note.php?language_page=big5