Ch 9. MemoryManagement

Apr 21, 2023

9.1 배경 기억장소의 구성

SingleUser

dedicatedSystem

Real StorageMultiprogramming

System

VirtualStorage

Multiprogramming

Real Real Virtual( Disk )

FixedPartition

MP

VariablePartition

MP페이징 세그먼

테이션

CombinedPaging

Segment

Abso-lute

Reloca-table

9.1 Background 기억장소 계층구조

관리 정책 Fetch policy : When? ( Program or data Main memory )

• Demand Fetch ( 요청시 읽음 )• Anticipatory Fetch( 미리 예측하여 읽음 )

Placement policy : Where?• First - fit• Best - fit• Worst -fit

Replacement policy : What?

Register

cache

main memory

electronic disk

magnetic disk

optical disk

magnetic tapes

9.1 Background 사용자 프로그램의 단계별 처리과정

컴파일시간

원본프로그램

컴파일러 /어셈블러

객체 모듈

Linkageeditor

로드모듈

로더

메모리내의이진메모리

이미지

Loadtime

실행시간

다른객체 모듈

시스템라이브러리

동적 시스템 라이브러리 동적

링킹

9.1 Background 동적 로딩

루틴은 호출될 때까지 로드 되지 않는다 . 모든 루틴은 재배치 가능한 형태로 디스크에 존재한다 .

동적 링킹 (dynamic linking) 동적 로딩과 유사하나 , 실행 가능한 이미지로

존재한다 .

9.1 배경 중첩 (Overlay)

OperatingSystem

Portion of user code and data that must

remain in main storagefor duration of excute

Overlayarea

User program with storage requirementlarge then available portion of main storage

InitializationPhase

ProcessingPhase

OutputPhase

a b c

1

2

3

Load Initialization Phase at b and runThen Load Processing Phase at b and runThen Load Output Phase at b and run

9.1 배경 Ex) Overlays for a two-pass assembler

Symboltable

Commonroutiness

Overlaydriver

Pass 1 Pass 2

20K

30K

10K

70K 80K

9.2 스와핑 (Swapping) Swapping

스와핑 시간 ( 문맥 교환 시간 ) 사용자 프로세스 크기 : 1 MB 디스크

• 초당 5MB 전송률• 회전지연시간 8ms

전송시간 : 8 m sec + (1MB / 5MB) = 8 m sec + 200 ms

Swap Time = 208 m sec Total Swap Time 416 m sec

9.3 스와핑

디스크를 사용한 두 프로세스의 스와핑

Monitor

User1

User2

userspace

main memory backing store

fence

Swap out

Swap in

9.3 연속 메모리 할당

연속 할당 Single Contiguous Loading

Partitioned Loading

불연속 할당 페이징과 세그먼테이션

스와핑

가상 메모리 페이징

세그먼테이션

연속 할당 Fixed Partition Variable Partition

9. 3 연속 메모리 할당

Operatingsystem

user

0

512 K

메모리 분할

< Single-partition Allocation > < Dynamic Relocation >

CPU <

limitregister

relocationregister

+ memory

logicaladdress yes

no

trap; addressing error

재배치와 상한레지스터를 지원하는 하드웨어

다중 분할 할당고정 분할가변 분할

9. 3 연속 메모리 할당

스케줄링 예

operatingsystem

2160 K

0

400 K

2560 K

Job queueprocess memory time

P1

P2

P3

P4

P5

600 K1000 K300 K700 K500 K

105

208

15

9. 3 연속 메모리 할당

메모리 할당 과정

Operatingsystem

Operatingsystem

Operatingsystem

Operatingsystem

Operatingsystem

0 0 0 0 0

400 K 400 K 400 K 400 K 400 K

1000 K 1000 K 1000 K 1000 K 1000 K900 K

1700 K 1700 K 1700 K

2000 K 2000 K 2000 K 2000 K 2000 K

2300 K

2560 K

2300 K

2560 K

2300 K

2560 K

2300 K

2560 K

2300 K

2560 K

(a) (b) (c) (d) (e)

P1P1 P1

P5

P2

P3 P3 P3 P3 P3

P2종료

P4P4

할당 P1

terminates P4 P4P5

allocate

9. 3 연속 메모리 할당

0

외부 단편화 compaction(garbage collection)내부 단편화

660K

300K

Compaction

operatingsystem

operatingsystem

0

400 K

900 K1000 K

1700 K

2000 K

2300 K

2560 K

400 K

900 K

1600 K

1900 K

2560 K

compact

260 K

P5

P4

P3

P3

P4

P5

100K

가변 분할 할당

Non contiguous : swapping / page , coalescing holes

9.4 페이징

가상주소와 실제 주소 외부 단편화 문제의 해결 Noncontiguous

CPU

PhysicalMemory

p d f d

p

f

Page table

logical address

physicaladdress

Paging hardware

F : V R

9.4 페이징

4B 페이지를 가진 32B 기억장치의 페이징 예

0 a1 b2 c3 d

0 a1 b2 c3 d

0 a1 b2 c3 d

0 a1 b2 c3 d

logicalmemory

5612

0123

0

4 i j k l

8 m n o p

12

16

20 a b c d

24 e f g h

28

Page table

Physical memory

9.4 페이징

빈 프레임 (a) 할당전 (b) 할당후

free-frame list1413182015

page 0page 1page 2page 3

new process

131415161718192021

free-frame list15

page 0page 1page 2page 3

new process

131415161718192021

page 1

page 0

page 2

page 3

14131820

0123

(a) (b)new-process page table

Virtual address V = ( b, d )

• block : Division unit of V, M• page : Fixed block size• Paging• segment : No fixed block size• segmentation

각 프로세스는 자신만의 블록 사상표 (Block Mapping Table) 를 가지고 있다 .

9.4 페이징

b d

9.4 페이징 페이징 주소 변환

by Direct Mapping by Associative Mappingwith Combined Associative/Direct

b

P´ d

+P d

P´

Base Add. OfPMT

(PTBR) Page Table Base Register

Page number Displacement or “block”

VirtualAdd.V=(p,d)

Real Address.

PMTb

bp

b+p p

< Direct mapping >

• Use expensive Associative memory • Associative register = Translation lock-aside buffers(TLB)• Page(entry) # : 8 ~ 2048

P´ d

P d

P´

Page number Displacement 가상 주소V=(p,d)

실제 주소 .

Associativemap

Frame number Displacement

P

< TLB 를 이용한 페이징 하드웨어 >

9.4 페이징

(TLB) : Translation Look-aside Buffer

9.4 페이징

P´ d

P d

Page number Displacement Virtual Add.V=(p,d)

Real Add.

Frame number Displacement

P´

P´P

+

Add. Of page map Table bstart

p

b

Direct map(all page)

performedonly if

no matchin associative

map b+p

Trythis First

only if no matchin associativemap

only if match in associativemap

PartialAssociative map

< Combined Associative/Direct page mapping >

9.5 세그먼테이션 logical unit : possible to divide per page in

segment Logical address : segment# , offset

Base address ‘b’of segment table

Segment map table origin register

Segment numbers

Displacementd

Logical addressv = s +d

+

bs

Segment map table

Limit S’

s

S# r+

d

S’ S’ + d

b+s Real addressr = s’ + d

Segment Start address of Physical memory

< Virtual address translation in a pure segment system >

9.5 세그먼테이션

CPU

limit base

Segment table

s

s d

< +Yes

No

Physical memory

트랩 ; 주소 지정 오류

Segmentation hardware

9.5 세그먼테이션

물리적 주소

subroutine stack

Segment 0Segment 3

Symboltable

Segment 4sqrt

Segment 1main

programSegment 2

논리적 주소공간

limit base

1000400400

11001000

14006300430032004700

01234

세그먼트테이블

Segment 0

Segment 3

Segment 2

Segment 1

Segment 4

1400

2400

3200

4300

4700

5700

6300

6700< 세그먼테이션 예 >

9.5 세그먼테이션 Share and Protection of Segment

Share strong point of segmentation must be protected when multi user share the same segment,

need protection (Fig 8.25)

Segmentation may cause external fragmentation

9.5 세그먼테이션

Physical memory

editor

Segment 0 Data 1

Segment 1editor

Data 1

Data 2

43062

68348

72773

90003

98553

Fig 8.25 Sharing of segment in a segmented memory system

limit base

252868850

4306290003

01

Segment tableprocess P2

Logical memoryprocess P1

limit base

252864452

4306268348

01

Segment tableprocess P1

editor

Segment 0 Data 2

Segment 1

Logical memoryprocess P2

9.6 페이지화된 세그먼테이션

Base address , b ,of segment table

Segment map table origin register

Segment number S

Displacementd

Logical addressv = s +d

+

bs

Segment map tablefor this process

S’

s

b+s

Page numberb

b

P’s

Associative storage map

P

Page map tablefor segments S

P’P + S’

S’

P

S’ P

Frame number P’

Displacement dFig 8.26 Virtual address translation with combined

associative / direct mapping in a paged and segment system

9.7 페이지화된 세그먼테이션 Paging / Segmentation system

too large segment =>> by unit of page V = s, p, d segment fault

=> control -> O.S -> segment map table

page map table

page fault alternative of shared page

Summary Comparison

Paged Memory Management• advantage)

• may have some internal fragmentation, but increase system efficiency

• need not compaction overhead for relocation partition• drawback)

• increase computer cost for address mapping• consume large amounts of memory and increase processor

time(overhead) because of many tables Segmented Memory Management

• advantage)• eliminate internal fragmentation in page or free table• share segment

• (ex) two-pass assembler• drawback)

• increase Hardware cost • memory space waste due to table, complexity of O.S