Additional Hardware Optimization

m5151117Yumiko Kimezawa

October 25, 2012 1RPS

Outline

• Ethernet• Additional Hardware Optimization• Future Work

October 25, 2012 2RPS

Ethernet• Hardware part

- Composition of necessary cores for handling Ethernet (Completion)

- Compilation (Not completion)

• Software part- Changing software for transferring data with

Ethernet (Not completion)

October 25, 2012 3RPS

Ethernet

• Handling Ethernet is not easy• I don’t have enough time…

October 25, 2012 RPS 4

If I have extra time, I will deal with this task

Proposal of Optimization

• Pipeline processing on single CPU→ Using hardware resources effectively

• Adding DMA controller→ Data transfer is accelerated to high speed

October 25, 2012 RPS 5

Signal Reading Filtering PPD Algorithm

Signal Reading Filtering PPD Algorithm

< Simple image >

Additional Hardware Optimization (Current Work)

October 25, 2012 RPS 6

• Change of existing hardware for executing pipeline processing- Using clock crossing bridge core- Dividing CPU memory into data memory and instruction memory- Implementing DDR2 SDRAM core instead of on-chip memory

Graphic LCD Controller

DataMem CPU

Timer

GraphicLCD

LED

JTAGUART

LEDController

Avalon Bus

FIR Filter

DDR2SDRAM

FPGA

Clock Crossing Bridge

ECGData

Inst Mem

Clock Crossing Bridge

PLLSysID

SOPC Builder Window

October 25, 2012 RPS 7

Future Work• Minor change of software having single CPU

- Until Nov. 1

• Measurement of data transfer time between ECG data rom and filter, filter and memory and so on, and finding bottlenecks of data transfer- Until Nov. 8~16

• Adding DMA controller module to BANSMOM for getting rid of the bottlenecks of data transfer- Until Nov. 16~23

October 25, 2012 8RPS

October 25, 2012 RPS 9

: Data flow

: Control signal

Graphic LCD Controller

DataMem

MasterCPU

Timer

GraphicLCDLED

JTAGUART

PPD Module Master Module

LEDController

Avalon Bus

FIR FilterTimer

Slave CPU Memory

SlaveCPU

ExternalMemory

SharedMemory

FPGA

DMAcontroller

ECGData

Inst Mem

• Investigation of BANSMOM System- Need to divide Master CPU memory into inst. mem and data mem- Need to use off-chip memory