?

OSC 2016 Nagoya

*BSD

@nullnilaki

sgi Indigo2

MIPS R8000

>> hinv System: IP26 Processor: 75 Mhz R8000, with FPU Primary I-cache size: 16 Kbytes Primary D-cache size: 16 Kbytes Secondary cache size: 2 Mbytes Memory size: 512 Mbytes Graphics: GR5-XZ SCSI Disk: scsi(0)disk(1) Audio: Iris Audio Processor: version A2 revision 1.1.0

MIPS R8000

M88k !

http://forums.nekochan.net/viewtopic.php?t=16726745

MIPS R8000

TLB 384 …

MIPS R8000

/* * Initialize the kernel page table pointer. * This is a no-op on non-R8000 processors. */LEAF(tlb_set_gbase, 0) j ra nopEND(tlb_set_gbase)

/* * void tlb_set_gbase(vaddr_t, vsize_t); */LEAF(tlb_set_gbase, 0) /* { */ DMTC0 a0, COP_0_GBASE MTC0_HAZARD DMTC0 a1, COP_0_WORK1 MTC0_HAZARD j ra NOPEND(tlb_set_gbase) /* } */

…

MIPS R8000

…

MIPS R8000

R8000

SGI

Linux/MIPS

R8000

TLB MIPS

R10000

Silicon Graphics

http://archive.linux.or.jp/JF/JFdocs/MIPS-HOWTO-9.html#ss9.8

R8000( )…

R8000( )…

R8000( )…

R8000( ) ( � ´)

http://d.hatena.ne.jp/syuu1228/20090805…

RAM disk kernel ?

RAM disk kernel ?OpenBSD sgimips (Fuel )

?

Set name(s)? (or 'abort' or 'done') [done] Cannot determine prefetch area. Continue without verification? [no] yesInstalling base57.tgz 100% |**************************| 56003 KB 03:49 Extracting etc.tgz 100% |**************************| 110 KB 00:00 Location of sets? (disk http nfs or 'done') [http] doneAre you *SURE* your install is complete without 'bsd.IP26'? [no] yesTime appears wrong. Set to 'Sun Sep 6 08:56:36 JST 2015'? [yes] Saving configuration files...done.Making all device nodes...sh(8003) in realloc(): error: chunk info corruptedAbort trap done.Installing boot loader in volume header.Writing file /mnt/usr/mdec/boot-IP26sgivol: stat /mnt/usr/mdec/boot-IP26: No such file or directory

WARNING: Boot install failed. Booting from disk will not be possible

IP26 RAM disk kernel RAM disk kernel netboot(ftp.jaist.ac.jp ) base57.tgz

OpenBSD IP26base57.tgz ” ”

?

/src/distrib/sgi/ramdisk/install.md

md_installboot() { local _disk=$1

echo "Installing boot loader in volume header." if ! /usr/mdec/sgivol -w boot /mnt/usr/mdec/boot-$IPARCH $_disk; then echo "\nWARNING: Boot install failed. Booting from disk will not be possible" fi

for _k in /mnt/bsd{,.mp,.rd}; do [[ -f $_k.$IPARCH ]] && mv $_k.$IPARCH $_k done }

Makefile boot-IP26

RAM disk kernel ftp

NetBSD sysinst(install kernel) ?ftpOpenBSD ftpanonymous ftp

# /mnt/usr/mdec/sgivol -w boot /mnt/usr/mdec/boot-IP26 sd0Writing file /mnt/usr/mdec/boot-IP26File /mnt/usr/mdec/boot-IP26 has 101640 bytesdisklabel shows 17783112 sectors with 512 bytes per sectorchecksum: 00000000root part: 0swap part: 1bootfile: /bsd

Volume header files:boot offset 2 blocks, length 101640 bytes (199 blocks)

SGI partitions: 0:a blocks 17779977 first 3135 type 4 (BSD4.2) 8:i blocks 3135 first 0 type 0 (Volume Header)10:k blocks 17783112 first 0 type 6 (Volume)# mv /mnt/usr/mdec/bsd.IP26 /mnt/bsd

ftp …

!

NFS

•OS

NFS !( NIC )

•

NFS

NFS !

?

?

OS panic R8000

R8000OpenBSD R8000

utlbmod?

>> bootp()bsd.rd.IP26Obtaining bsd.rd.IP26 from server macbook20063577592+722344 entry: 0xa800000008010000ARCS64 FirmwareFound SGI-IP26, setting up....panic: trap: utlbmod: invalid pteStopped at 0xa800000008294424: jr ra0xa800000008294428: move zero,zero

utlbmod panic !

TLB ?

TLB ?

• OS panic utlbmod

• OS panic …

PTE ?

• ….

?

• C

…

TLB ?

…

C

/sys/arch/mips64/include/pmap.h

/* User virtual address to pte page entry */#define uvtopte(va) (((va) >> PAGE_SHIFT) & (NPTEPG -1))

”2”

Multi-user

!

OpenBSD

…

…

sgi CPU !

diff

?

• MIPS R8000 CPU …

• MIPS R8000 …

/src/sys/arch/mips64/mips64/cache_tfp.c

/src/sys/arch/mips64/mips64/cache_tfp_subr.S

/src/sys/arch/mips64/mips64/exception_tfp.S

/src/sys/arch/mips64/mips64/tlb_tfp.S

• miod

…

SIGBUS SIGSEGV

…

The 2 in the original code is log2(pte size); k0 >> PAGE_SHIFT will be the pte number. But in the page table, it is stored as an array of 32-bit words, so we need to shift it to the left by 2. The original instructions: PTR_SRL k0, PAGE_SHIFT - 2 andi k0, ((NPTEPG / 2) - 1) << 2 are equivalent to: PTR_SRL k0, PAGE_SHIFT andi k0, (NPTEPG / 2) - 1 PTR_SLL k0, 2 and guarantees the address is correctly aligned for the `lwu' instruction later.

2 !

0 0

1 4

2 8

3 12

…

Page table

index Page tabe

Page faultPage table indexPTE_LOG

index

PTR_SRL k0, PAGE_SHIFT - PTE_LOGandi k0, (NPTEPG - 1) << PTE_LOG

Page table

PTR_ADDU k1, k0PTE_LOAD k0, 0(k1) # get pte

#define PTE_LOG 2

@n_soda!

mips RISC -R2000/ R3000- ISBN-10: 4320025989 NIX ISBN-10: 4320025989 MIPS( ) R8000 User Manual

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http://nullnilaki.hatenablog.com/entries/2015/12/23

Miod @MiodVallat twitter BSD