32pfl3606d+40+chassis++L11M1.1L

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

1/67

Colour Television Chassis

L11M1.1LLA

19130_000_110421.eps110421

Contents Page1. Revision List 22. Technical Specifications and Connections 23. Precautions, Notes, and Abbreviation List 44. Mechanical Instructions 85. Service Modes, Error Codes, and Fault Finding 126. Alignments 187. Circuit Descriptions 20

8 IC Data Sheets 26

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

2/67

8 IC Data Sheets 26

Revision ListEN 2 L11M1.1L LA1.

1. Revision ListManual xxxx xxx xxxx.0

First release.

2. Technical Specifications and Connections

Index of this chapter:

2.1 Technical Specifications2.2 Directions for Use2.3 Connections

Notes:

Figures can deviate due to the different set executions. Specifications are indicative (subject to change).

2.1 Technical Specif icat ions

For on-line product support please use the links in Table 2-1.Here is product information available, as well as getting started,user manuals, frequently asked questions and software &

drivers.

Table 2-1 Described Model numbers

2.2 Di rec tions fo r Use

You can download this information from the following websites:http://www.philips.com/supporthttp://www.p4c.philips.com

2.3 Connections

CTN Styling Published in:

32PFL3606D/78 Thriller 3122 785 19130

40PFL3606D/78

SROTCENNOCEDISSROTCENNOCRAER

DIGITALAUDIO OUT

AUDIO INDVI/VGASERVUCVI 1

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

3/67

AUDIO OUT DVI/VGASERVUCVI 1

Technical Specifications and Connections EN 3L11M1.1L LA 2.

1 - +5V 2 - Data (-)

3 - Data (+) 4 -Ground Gnd

2 - AV IN: Cinch : Video CVBS - In, Audio - In

Ye - Video CVBS 1 VPP/ 75 ohm Wh - Audio L 0.5 VRMS/ 10 kohm Rd - Audio R 0.5 VRMS/ 10 kohm

3 - HDMI: Digital Video, Digital Audio - In

Figure 2-3 HDMI (type A) connecto r

1 - D2+ Data channel 2 -Shield Gnd 3 - D2- Data channel 4 - D1+ Data channel 5 -Shield Gnd 6 - D1- Data channel 7 - D0+ Data channel

8 -Shield Gnd 9 - D0- Data channel

10 - CLK+ Data channel 11 - Shield Gnd 12 - CLK- Data channel 13 - Easylink Control channel/CEC 14 -n.c.15 - DDC_SCL DDC clock 16 - DDC_SDA DDC data 17 - Ground Gnd 18 - +5V 19 HPD H t Pl D t t

9 - HDMI1: Digital Video, Digit al Audi o - In

Figure 2-4 HDMI (type A) connector

1 - D2+ Data channel

2 -Shield Gnd 3 - D2- Data channel 4 - D1+ Data channel 5 -Shield Gnd 6 - D1- Data channel 7 - D0+ Data channel

8 -Shield Gnd 9 - D0- Data channel 10 - CLK+ Data channel 11 - Shield Gnd 12 - CLK- Data channel 13 - Easylink Control channel/CEC 14 - ARC Audio Return Channel 15 - DDC_SCL DDC clock 16 - DDC_SDA DDC data 17 - Ground Gnd

18 -+5V

19 - HPD Hot Plug Detect 20 - Ground Gnd

10 - Aerial - In

- -F-type Coax, 75

11 - VGA: Video RGB - In

10000_017_090121.eps090428

19 1

18 2

10000_017_090121.eps090428

19 1

18 2

1

610

11

5

15

10000 002 090121 eps

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

4/67

Precautions, Notes, and Abbreviation ListEN 4 L11M1.1L LA3.

3. Precautions, Notes, and Abbreviation List


3.1 Safety Instructions3.2 Warnings3.3 Notes3.4 Abbreviation List

3.1 Safety Inst ruct ions

Safety regulations require the following duringa repair: Connect the set to the Mains/AC Power via an isolation

transformer (> 800 VA).

Replace safety components, indicated by the symbol,only by components identical to the original ones. Anyother component substitution (other than original type) mayincrease risk of fire or electrical shock hazard.

Safety regulations require that aftera repair, the set must bereturned in its original condition. Pay in particular attention tothe following points: Route the wire trees correctly and fix them with the

mounted cable clamps. Check the insulation of the Mains/AC Power lead for

external damage. Check the strain relief of the Mains/AC Power cord for

proper function. Check the electrical DC resistance between the Mains/AC

Power plug and the secondary side (only for sets that havea Mains/AC Power isolated power supply):1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug.2. Set the Mains/AC Power switch to the on position

(keep the Mains/AC Power cord unplugged!).

3 Measure the resistance value between the pins of the

Where necessary, measure the waveforms and voltages

with (

) and without (

) aerial signal. Measure thevoltages in the power supply section both in normaloperation () and in stand-by (). These values areindicated by means of the appropriate symbols.

3.3.2 Schemat ic Notes

All resistor values are in ohms, and the value multiplier isoften used to indicate the decimal point location (e.g. 2K2indicates 2.2 k).

Resistor values with no multiplier may be indicated witheither an E or an R (e.g. 220E or 220R indicates 220 ).

All capacitor values are given in micro-farads (= 10-6),nano-farads (n = 10-9), or pico-farads (p = 10-12).

Capacitor values may also use the value multiplier as thedecimal point indication (e.g. 2p2 indicates 2.2 pF).

An asterisk (*) indicates component usage varies. Referto the diversity tables for the correct values.

The correct component values are listed on the PhilipsSpare Parts Web Portal.

3.3.3 Spare Par ts

For the latest spare part overview, consult your Philips SparePart web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit thisURL: http://www.atyourservice-magazine.com. SelectMagazine then go to Repair downloads Here you will find

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

5/67

Precautions, Notes, and Abbreviation List EN 5L11M1.1L LA 3.

The third digit in the serial number (example:AG2B0335000001) indicates the number of the alternativeB.O.M. (Bill Of Materials) that has been used for producing thespecific TV set. In general, it is possible that the same TVmodel on the market is produced with e.g. two different typesof displays, coming from two different suppliers. This will thenresult in sets which have the same CTN (Commercial TypeNumber; e.g. 28PW9515/12) but which have a different B.O.M.number.By looking at the third digit of the serial number, one canidentify which B.O.M. is used for the TV set he is working with.If the third digit of the serial number contains the number 1(example: AG1B033500001), then the TV set has beenmanufactured according to B.O.M. number 1. If the third digit isa 2 (example: AG2B0335000001), then the set has been

produced according to B.O.M. no. 2. This is important forordering the correct spare parts!For the third digit, the numbers 1...9 and the characters A...Zcan be used, so in total: 9 plus 26= 35 different B.O.M.s can beindicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digitserial number. Digits 1 and 2 refer to the production centre (e.g.SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M.code, digit 4 refers to the Service version change code, digits 5

and 6 refer to the production year, and digits 7 and 8 refer toproduction week (in example below it is 2010 week 10 / 2010week 17). The 6 last digits contain the serial number.

powered TV set, it is best to test the high voltage insulation.It is easy to do, and is a good service precaution.

3.4 Abbrev iat ion L is t

0/6/12 SCART switch control signal on A/Vboard. 0 = loop through (AUX to TV),6 = play 16 : 9 format, 12 = play 4 : 3format

AARA Automatic Aspect Ratio Adaptation:algorithm that adapts aspect ratio toremove horizontal black bars; keepsthe original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channelsdirectly from a cable network bymeans of a predefined TXT page

ADC Analogue to Digital ConverterAFC Automatic Frequency Control: control

signal used to tune to the correctfrequency

AGC Automatic Gain Control: algorithm thatcontrols the video input of the featurebox

AM Amplitude ModulationAP Asia PacificAR Aspect Ratio: 4 by 3 or 16 by 9ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal blackbars without discarding videoinformation

ATSC Advanced Television SystemsCommittee, the digital TV standard inthe USA

ATV See Auto TV

Auto TV A hardware and software control

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

6/67

Precautions, Notes, and Abbreviation ListEN 6 L11M1.1L LA3.

D/K Monochrome TV system. Soundcarrier distance is 6.5 MHz

DFI Dynamic Frame InsertionDFU Directions For Use: owner's manualDMR Digital Media Reader: card reader DMSD Digital Multi Standard DecodingDNM Digital Natural MotionDNR Digital Noise Reduction: noise

reduction feature of the setDRAM Dynamic RAMDRM Digital Rights ManagementDSP Digital Signal ProcessingDST Dealer Service Tool: special remote

control designed for servicetechnicians

DTCP Digital Transmission ContentProtection; A protocol for protectingdigital audio/video content that istraversing a high speed serial bus,such as IEEE-1394

DVB-C Digital Video Broadcast - CableDVB-T Digital Video Broadcast - TerrestrialDVD Digital Versatile DiscDVI(-d) Digital Visual Interface (d= digital only)E-DDC Enhanced Display Data Channel

(VESA standard for communicationchannel and display). Using E-DDC,the video source can read the EDIDinformation form the display.

EDID Extended Display Identification Data(VESA standard)

EEPROM Electrically Erasable andProgrammable Read Only Memory

EMI Electro Magnetic InterferenceEPG Electronic Program GuideEPLD Erasable Programmable Logic Device

EU Europe

subcommittee of the InternationalTelecommunication Union relating toradio communication. ITU-656 (a.k.a.SDI), is a digitized video format usedfor broadcast grade video.Uncompressed digital component ordigital composite signals can be used.The SDI signal is self-synchronizing,uses 8 bit or 10 bit data words, and hasa maximum data rate of 270 Mbit/s,with a minimum bandwidth of 135MHz.

iTV Institutional TeleVision; TV sets forhotels, hospitals etc.

LS Last Status; The settings last chosen

by the customer and read and storedin RAM or in the NVM. They are calledat start-up of the set to configure itaccording to the customer'spreferences

LATAM Latin AmericaLCD Liquid Crystal DisplayLED Light Emitting DiodeL/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is BandI, L is all bands except for Band I

LPL LG.Philips LCD (supplier)LS Loudspeaker LVDS Low Voltage Differential SignallingMbps Mega bits per secondM/N Monochrome TV system. Sound

carrier distance is 4.5 MHzMHEG Part of a set of international standards

related to the presentation ofmultimedia information, standardisedby the Multimedia and Hypermedia

Experts Group It is commonly used as

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

7/67

Precautions, Notes, and Abbreviation List EN 7L11M1.1L LA 3.

PAL Phase Alternating Line. Color systemmainly used in West Europe (colourcarrier = 4.433619 MHz) and South

America (colour carrierPAL M = 3.575612 MHz andPAL N = 3.582056 MHz)

PCB Printed Circuit Board (same as PWB)PCM Pulse Code ModulationPDP Plasma Display PanelPFC Power Factor Corrector (or Pre-

conditioner)PIP Picture In PicturePLL Phase Locked Loop. Used for e.g.

FST tuning systems. The customercan give directly the desired frequency

POD Point Of Deployment: a removableCAM module, implementing the CAsystem for a host (e.g. a TV-set)

POR Power On Reset, signal to reset the uPPSDL Power Supply for Direct view LED

backlight with 2D-dimmingPSL Power Supply with integrated LED

driversPSLS Power Supply with integrated LED

drivers with added Scanningfunctionality

PTC Positive Temperature Coefficient,non-linear resistor

PWB Printed Wiring Board (same as PCB)PWM Pulse Width ModulationQRC Quasi Resonant Converter QTNR Quality Temporal Noise ReductionQVCP Quality Video Composition Processor RAM Random Access MemoryRGB Red, Green, and Blue. The primary

color signals for TV. By mixing levels

of R G and B all colors (Y/C) are

SSC Spread Spectrum Clocking, used toreduce the effects of EMI

STB Set Top BoxSTBY STand-BYSVGA 800 600 (4:3)SVHS Super Video Home SystemSW SoftwareSWAN Spatial temporal Weighted Averaging

Noise reductionSXGA 1280 1024TFT Thin Film Transistor THD Total Harmonic DistortionTMDS Transmission Minimized Differential

SignallingTS Transport Stream

TXT TeleteXTTXT-DW Dual Window with TeleteXTUI User InterfaceuP Microprocessor UXGA 1600 1200 (4:3)V V-sync to the moduleVESA Video Electronics Standards

AssociationVGA 640 480 (4:3)VL Variable Level out: processed audio

output toward external amplifierVSB Vestigial Side Band; modulation

methodWYSIWYR What You See Is What You Record:

record selection that follows mainpicture and sound

WXGA 1280 768 (15:9)XTAL Quartz crystalXGA 1024 768 (4:3)Y Luminance signalY/C Luminance (Y) and Chrominance (C)

signal

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

8/67

Mechanical InstructionsEN 8 L11M1.1L LA4.

4. Mechanical Instructions


4.1 Cable Dressing4.2 Service Positions4.3 Assy/Panel Removal4.4 Set Re-assembly

Notes:

Figures below can deviate slightly from the actual situation,due to the different set executions.

4.1 Cab le Dressing

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

9/67

Mechanical Instructions EN 9L11M1.1L LA 4.

19130 003 110426 eps

11 mm saddle 1150 mm tape 370 mm tape 4Foam 2

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

10/67

Mechanical InstructionsEN 10 L11M1.1L LA4.

4.2 Service Posi tions

For easy servicing of a TV set, the set should be put face downon a soft flat surface, foam buffers or other specific workshop

tools. Ensure that a stable situation is created to perform

measurements and alignments. When using foam bars takecare that these always support the cabinet and neveronly thedisplay. Caution: Failure to follow these guidelines canseriously damage the display!Ensure that ESD safe measures are taken.

4.3 Assy/Panel Removal

Instructions below apply to the 40PFL3606D/78, but will besimilar for other models.

4.3.1 Rear Cover

3

2

2 23 2

2

3

3

2

32

3

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

11/67

Mechanical Instructions EN 11L11M1.1L LA 4.

4.3.2 LCD Panel

Refer to Figure 4-4for details.1. Remove the Stand [A].

2. Remove the Speakers/Subwoofer [B].3. Remove the PSU [C], SSB [D] and TCON (E).

4. Remove the IR/LED board [F].5. Remove the Local Control board [G].6. Remove the clamps [1].7. Remove all metal subframes [2] that do not belong to the

LCD display.

1B

1C

12 12

12

12 D

E

F

1 1

1111

G

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

12/67

Service Modes, Error Codes, and Fault FindingEN 12 L11M1.1L LA5.

5. Service Modes, Error Codes, and Fault Finding


5.1 Test Points5.2 Service Modes5.3 Service Tools5.4 Error Codes5.5 The Blinking LED Procedure5.6 Fault Finding and Repair Tips5.7 Software Upgrading

5.1 Test Points

In the chassis schematics and layout overviews, the test pointsare mentioned. In the schematics and layouts, test points areindicated with Fxxx or Ixxx.

As most signals are digital, it will be difficult to measurewaveforms with a standard oscilloscope. Several key ICs arecapable of generating test patterns, which can be controlled viaComPair. In this way it is possible to determine which part isdefective.

Perform measurements under the following conditions: Service Default Mode. Video: Colour bar signal. Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

The Service Mode feature is split into four parts: Service Default Mode (SDM). Service Alignment Mode (SAM). Customer Service Mode (CSM).

C t Aid d R i M d (C P i )

5.2.1 General

Next items are applicable to all Service Modes or are general.

Life Timer

During the life time cycle of the TV set, a timer is kept (calledOp. Hour). It counts the normal operation hours (not theStand-by hours). The actual value of the timer is displayed inSDM and SAM in a decimal value. Every two soft-resetsincrease the hour by +1. Stand-by hours are not counted.

Software Identification, Version, and ClusterThe software ID, version, and cluster will be shown in the mainmenu display of SDM, SAM, and CSM.The screen will show: AAAAAAB-XX.YY, where: AAAAAA is the chassis name: L11M11. Bis the region indication: E= Europe, A= AP/China, U=

NAFTA, L= LATAM. XXis the main version number: this is updated with a major

change of specification (incompatible with the previoussoftware version). Numbering will go from 01 - 99 and AA -ZZ.

If the main version number changes, the new versionnumber is written in the NVM.

If the main version number changes, the defaultsettings are loaded.

YYis the sub version number: this is updated with a minorchange (backwards compatible with the previous versions)Numbering will go from 00 - 99.

If the sub version number changes, the new versionnumber is written in the NVM.

If the NVM is fresh, the software identification, version,

d l t ill b itt t NVM

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

13/67

Service Modes, Error Codes, and Fault Finding EN 13L11M1.1L LA 5.

5.2.2 Service Default Mode (SDM)

Purpose

Set the TV in SDM mode in order to be able to create a pre-defined setting for measurements to be made. In this platform,a simplified SDM is introduced (without protection override andwithout tuning to a predefined frequency).

Specifications

Set linear video and audio settings to 50%, but volume to25%. Stored user settings are not affected.

Set Smart Picture to Game. Set Smart Sound to Standard. Tune channel to:

- for analogue SDM: channel 3 (61.25 MHz)

- for digital SDM: channel 26 (545.143 MHz). For digital SDM: set PID default from the stream. All service-unfriendly modes (if present) are disabled, since

they interfere with diagnosing/repairing a set. Theseservice unfriendly modes are:

(Sleep) timer. Blue mute/Wall paper. Auto switch off (when there is no ident signal). Hotel or hospital mode. Child lock or parental lock (manual or via V-chip).

Skipping, blanking of Not favourite, Skipped orLocked presets/channels.

Automatic storing of Personal Preset or Last Statussettings.

Automatic user menu time-out (menu switches back/OFF automatically.

Auto Volume levelling (AVL).

How to Activate

To activate analogueSDM, use oneof the following methods:

P th f ll i k th RC t itt

ERR: Shows all errors detected since the last time thebuffer was erased in format (five errors possible).

OP: Used to read-out the option bytes. Ten codes (in tworows) are possible.

How to Navigate

As this mode is read only, there is not much to navigate. Toswitch to other modes, use one of the following methods: Command MENU from the user remote will enter the

normal user menu (brightness, contrast, color, etc...) withSDM OSD remaining, and pressing MENU key again willreturn to the last status of SDM again.

To prevent the OSD from interfering with measurements inSDM, command OSD or i+ (STATUS or INFO for

NAFTA and LATAM) from the user remote will toggle theOSD on/off with SDM OSD remaining always on.

Press the following key sequence on the remote controltransmitter: 062596 directly followed by the INFO[i+]/OKbutton to switch to SAM (do not allow the display to time outbetween entries while keying the sequence).

How to Exit

Switch the set to Stand-by by pressing the standby button on the remote control

transmitter or on the television set, or via a standard RC-transmitter by keying the 00 sequence.If you switch the television set off by removing the mains (i.e.,unplugging the television), the television set will remain in SDMwhen mains is re-applied, and the error buffer is not cleared.The error buffer will only be cleared when the clear commandis used in the SAM menu.

Note:

If the TV is switched off by a power interrupt while in SDM,

th TV ill h i th l t t t f SDM

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

14/67


Menu items and explanation:1. System Information.

Op Hour:This represents the life timer. The timercounts normal operation hours, but does not countStand-by hours.

MAIN SW ID:See paragraph Software Identification,Version, and Clusterfor the SW name definition.

ERR:Shows all errors detected since the last time thebuffer was erased. Five errors possible.

OP1/OP2:Used to read-out the option bytes. Seeparagraph 6.6 Option Settingsin the Alignmentssection for a detailed description. Ten codes arepossible.

2. Tuner.

AGC Adjustment:See paragraph 6.3.1for

instructions. Store:To store the data.

3. Clear.Erases the contents of the error buffer. Select thismenu item and press the MENU RIGHT key on the remotecontrol. The content of the error buffer is cleared.

4. Options.To set the option bits. See paragraph 6.6 OptionSettings in the Alignments chapter for a detaileddescription.

5. RGB Alig n.To align the White Tone. See White ToneAlignment: for a detailed description.

6. NVM Editor .To change the NVM data in the television set.See also paragraph 5.6 Fault Finding and Repair Tips.

7. Upload to USB.8. Download from USB.

9. Initialis e NVM.To initialize a (corrupted) NVM. Be careful,this will erase all settings!

10. Au to ADC.Refer to chapter 6. Alignmentsfor detailedinformation.

11. EDID Write Enable.Enables EDID writing (not applicableto Berlinale sets).

12. Service Data.Virtual Key board for character input entry.

soon as the power is supplied again. The error buffer willnot be cleared.

In case the set is in Factory mode by accident (with Fdisplayed on screen), pressing and holding VOL- buttonfor 5 seconds and then followed by pressing and holding

the CH- button for another 5 seconds should exit theFactory mode.

5.2.4 Customer Service Mode (CSM)

Purpose

The Customer Service Mode shows error codes andinformation on the TVs operation settings. A call centre caninstruct the customer (by telephone) to enter CSM in order toidentify the status of the set. This helps them to diagnose

problems and failures in the TV before making a service call.The CSM is a read-only mode; therefore, modifications are notpossible in this mode.

Specifications

Ignore Service unfriendly modes. Set volume to 25%. Set Smart Picture to Game. Set Smart Sound to Standard. Line number for every line (to make CSM language

independent). Set the screen mode to full screen (all contents on screen

is visible). After leaving the Customer Service Mode, the original

settings are restored. Possibility to use CH+ or CH- for channel surfing, or

enter the specific channel number on the RC.

How to Activate

To activate CSM, press the following key sequence on a

t d d t t l t itt 123654 (d t ll th

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

15/67


3. HDCP Keys.Indicates if the HDMI keys (or HDCP keys)are valid or not. Not applicable to Berlinale series.

4. not used5. not used6. not used

7. not used.

Create a CSM dump on an USB stick

There will be CSM dump to a plugged in USB-stick uponentering CSM-mode. An extended CSM dumpwill be createdwhen the OK button on RC is pressed in CSM while a USBstick is plugged in. A direct CSM flash dump will be createdwhen the buttons red + 2679 on the remote control arepressed in CSM while a USB stick is plugged in.

How to ExitTo exit CSM, use one of the following methods: Press the MENU/HOME button on the remote control

transmitter. Press the POWER button on the remote control

transmitter. Press the POWER button on the television set.

5.3 Service Tools

5.3.1 ComPai r

Introduction

ComPair (Computer Aided Repair) is a Service tool for PhilipsConsumer Electronics products. and offers the following:1. ComPair helps you to quickly get an understanding on how

to repair the chassis in a short and effective way.2. ComPair allows very detailed diagnostics and is therefore

capable of accurately indicating problem areas. You do nothave to know anything about I2C or UART commands

f C f

Figure 5-3 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC asshown in the picture above (with the ComPair interface inbetween), as the ComPair interface acts as a level shifter. Ifone connects the TV directly to the PC (via UART), ICs will beblown!

How to Order

ComPair II order codes: ComPair II interface: 3122 785 91020. ComPair UART interface cable: 3138 188 75051.

P ft b d l d d f th Phili

10000_036_090121.eps091118

TOUART SERVICECONNECTOR

TOUART SERVICECONNECTOR

TOI2C SERVICECONNECTOR

TO TV

PC

HDMI

I2C only

Optional power5V DC

ComPair II Developed by Philips Brugge

RC outRC in

OptionalSwitch

Power ModeLink/Activity I2C

ComPair IIMulti

function

RS232 /UART

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

16/67


5.4.2 How to Read the Error Buffer

You can read the error buffer in three ways: On screen via the SAM/SDM/CSM (if you have a picture).

Example: ERROR: 0 0 0 0 0: No errors detected ERROR: 6 0 0 0 0: Error code 6 is the last and only

detected error ERROR: 9 6 0 0 0: Error code 6 was detected first and

error code 9 is the last detected (newest) error Via the blinking LED procedure (when you have no

picture). See paragraph 5.5 The Blinking LED Procedure. Via ComPair.

5.4.3 Error codes

The layer 1 error codes are pointing to the defective board.They are triggered by LED blinking when CSM is activated. Inthe LC10 platform, only two boards are present: the SSB andthe PSU/IPB, meaning only the following layer 1 errors aredefined: 2: SSB 3: IPB/PSU 4: Display

Table 5-1 Error code table

Example (2): the content of the error buffer is 12 9 6 0 0After entering SDM, the following occurs: 1 long blink of 5 seconds to start the sequence, 12 short blinks followed by a pause of 1.5 seconds,

9 short blinks followed by a pause of 1.5 seconds, 6 short blinks followed by a pause of 1.5 seconds, 1 long blink of 1.5 seconds to finish the sequence, The sequence starts again with 12 short blinks.

5.5.2 Displaying the Entire Error Buffer

Additionally, the entire error buffer is displayed when ServiceMode SDM is entered.

5.6 Fault Finding and Repair Tips

Notes:

It is assumed that the components are mounted correctlywith correct values and no bad solder joints.

Beforeany fault finding actions, check if the correctoptions are set.

5.6.1 NVM Ed itor

In some cases, it can be convenient if one directly can changethe NVM contents. This can be done with the NVM Editor inSAM mode. With this option, single bytes can be changed.

Caution:

Do not change these, without understanding thefunction of each setting, because incorrect NVM

settings may seriously hamper the correct functioning

of the TV set!

Al it d th i ti NVM tti b f

Layer-1

error code

Defective

board

Layer-2

error code Defective device

2 SSB 11 Speaker DC protection active on SSB

3 IPB/PSU 16 +12 missing/low, PSU defective

3 IPB/PSU 17 POK line defective

2 SSB 35 EEPROM I2C error on SSB, M24C16

2 SSB 34 Tuner I2C error on SSB

2 SSB 23 HDMI Mux IC I2C error on SSB - Berninale

models with Mux only

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

17/67


5.6.3 No Picture

When you have no picture, first make sure you have enteredthe correct display code.See Display Option Code Selectionfor the instructions.

5.6.4 Unstable Picture via HDMI input

Check (via ComPair) if HDMI EDID data is properlyprogrammed.

5.6.5 No Picture via HDMI input

Check if HDCP key is valid. This can be done in CSM.

5.6.6 HDMI CEC Not Functioning

Go to Home/Menu ->Setup -> Installation -> Preference andset the Easylink option to on. Also check if the connecteddevice is CEC enabled.

5.6.7 TV Will Not Start-up from Stand-by.

Possible Stand-by Controller failure. Reflash the SW.

5.7 Software Upgrading

5.7.1 In troduction

It is possible for the userto upgrade the mainsoftware via theUSB port. This allows replacement of a software image in astand alone set. A description on how to upgrade the mainsoftware can be found in the DFU or on the Philips website.

3. Execute the command "NVM Copy" > "NVM Copy fromUSB" to copy the USB data to NVM (this takes about aminute to complete).

To write an NVM mask to the TV, ensure that the mask has thecorrect format: "L11M11L_NVM_U2T.MAK" (0x00 to write

protect, 0xFF to overwrite).Important: The file must be located in the "/Repair" directoryof the USB stick.

5.7.4 How to Copy EDID Data to/from USB

Write EDID Data to USB

1. Insert the USB stick into the USB slot while in SAM mode.2. Execute the command "NVM Copy" > "EDID Copy to

USB", to copy the EDID data to the USB stick. The

filename on the USB stick will be named"L11M11L_EDID_T2U.BIN" (this takes a couple ofseconds).

Write EDID Data to TV

1. First, ensure (via a PC) that the filename on the USB stickhas the correct format: "L11M11L_EDID_U2T.BIN".

2. Insert the USB stick into the USB slot while in SAM mode.3. Execute the command "NVM Copy" > "EDID Copy from

USB" to copy the USB data to EDID (this takes about a

minute to complete).

Important: The file must be located in the "/Repair" directory

of the USB stick.

5.7.5 How to Copy the Channel List to/from USB

Write Channel List Data to USB

1. Insert the USB stick into the USB slot while in SAM mode.2. Execute the command "Channel list Copy to USB", to copy

th h l li t d t t th USB ti k Th fil th

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

18/67

AlignmentsEN 18 L11M1.1L LA6.

6. Alignments


6.1 General Alignment Conditions6.2 Hardware Alignments6.3 Software Alignments6.4 ADC gain adjustment6.6 Option Settings

Note:Figures below can deviate slightly from the actualsituation, due to the different set executions.

General: The Service Default Mode (SDM) and ServiceAlignment Mode (SAM) are described in chapter 5. Menu

navigation is done with the CURSOR UP, DOWN, LEFT orRIGHT keys of the remote control transmitter.

6.1 General Al ignment Condit ions

Perform all electrical adjustments under the followingconditions: Power supply voltage (depends on region):

AP-NTSC: 120 VACor 230 VAC/ 50 Hz (10%).

AP-PAL-multi: 120 - 230 VAC/ 50 Hz (10%). EU: 230 VAC/ 50 Hz (10%).

LATAM-NTSC: 120 - 230 VAC/ 50 Hz (10%). US: 120 VAC/ 60 Hz (10%).

Connect the set to the mains via an isolation transformerwith low internal resistance.

Allow the set to warm up for approximately 15 minutes. Measure voltages and waveforms in relation to correct

ground (e.g. measure audio signals in relation toAUDIO_GND).Caution:It is not allowed to use heatsinks as ground.

T t b Ri 10 M h Ci 20 F

6.3 Software Alignments

With the software alignments of the Service Alignment Mode(SAM) the Tuner and RGB settings can be aligned.

6.3.1 Tuner Adjustment (RF AGC Take Over Point)

Purpose: To keep the tuner output signal constant as the inputsignal amplitude varies.

No alignment is necessary, as the AGC alignment is doneautomatically.

6.3.2 RGB Al ignment

Before alignment, set the picture as follows:

White Tone Alignment:

Activate SAM. Select RGB Align. and choose a color temperature. Use a 100% white screen as input signal and set the

f ll i l

Picture Setting

Dynamic backlight Off

Dynamic Contrast Off

Colour Enhancement Off

Picture Format Unscaled

Light Sensor Off

Brightness 50

Colour 0

Contrast 100

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

19/67

Alignments EN 19L11M1.1L LA 6.

Table 6-2 Tint setti ngs 32"

Table 6-3 Tint setti ngs 40"

6.4 ADC gain adjustment

Use a Quantum Data Patters Generator 802BT and apply aPgcWrgb image (dot, cross and color bar mix pattern)according to Figure 6-1.

6.5 TCON Alignment (= VCOM alignment)

New requirement for TCON on SSB project: The purpose of VCOM alignment is to obtain an equal

voltages for both Positive and Negative LC polarity. This isimportant to avoid Flicker and Image Sticking. The P-Gamma + VCOM calibrator IC, ISL24837 is used for

VCOM adjustment. The adjusted VCOM data will be stored inside on-chip

memory and will be automatically recalled during eachpower-up.

ComPair (see 5.3.1 ComPair) will foresee in a possibility to dothis alignment.

6.6 Op tion Settings

6.6.1 In troduction

The microprocessor communicates with a large number of I2CICs in the set. To ensure good communication and to makedigital diagnosis possible, the microprocessor has to knowwhich ICs to address. The presence/absence of these specificICs (or functions) is made known by the option codes.

Notes:

After changing the option(s), save them with the STOREcommand.

The new option setting becomes active after the TV isswitched off and on again with the mains switch (theEAROM is then read again).

6.6.2 How To Set Option Codes

Wh th NVM i l d ll ti ill i tti T

Colour Temp. R G B

Cool t.b.d. t.b.d. t.b.d.

Normal t.b.d. t.b.d. t.b.d.

Warm t.b.d. t.b.d. t.b.d.

Colour Temp. R G B

Cool t.b.d. t.b.d. t.b.d.

Normal t.b.d. t.b.d. t.b.d.

Warm t.b.d. t.b.d. t.b.d.

18920_200_100317.eps

100317

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

20/67

Circuit DescriptionsEN 20 L11M1.1L LA7.

7. Circuit Descriptions


7.1 Introduction7.2 Power Supply7.3 Video7.3.1 Video: Front-End7.4 Audio7.5 Inputs7.5.1 Inputs: HDMI7.5.2 Inputs: USB

Notes:

Only new circuits (circuits that are not published recently)

are described. Figures can deviate slightly from the actual situation, due

to different set executions. For a good understanding of the following circuit

descriptions, please use chapter 9. Block Diagrams and10. Circuit Diagrams and PWB Layouts. Where necessary,you will find a separate drawing for clarification.

7.1 Introduction

The LC11M1.1L LA chassis is a digital chassis using aMediatek chipset. It covers screen sizes of 32" to 40".

The xxPFL3x06D/xx sets come with the Thriller styling, andthe xxPFL5x06D/xx come with the Berlinale styling.

Main key components are the Mediatek MT5363 integratedSystem On Chip (SoC) that supports multimedia video/audioinput, and the integrated TCON (Timing Controller) part for the

LCD panel.

System SoC is based on MT5363: NAND Flash 128 Mbyte, NumOnyx/Hynix. DDR 128 Mbyte (32 16M, 2 pcs), Hynix. Use internal MT5363 Stand-by micro-controller.

Tuner/Frontend configuration: Half NIM tuner (VA1E1BF2403) from Sharp. Toshiba Channel Decoder (TC90517).

Interfaces for debug and SW upgrade: UART (3.5 mm jack). USB port. JTAG.

Refer to Figure 7-1for details.

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

21/67

Circuit Descriptions EN 21L11M1.1L LA 7.

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

22/67


Figure 7-4 TCON key component overview

7.2 Power Supply

The Power Supply Unit (PSU) in this chassis is a buy-in and isa black-box for Service. When defective, a new panel must beordered and the defective panel must be returned for repair,unless the main fuse of the unit is broken. Always replace thefuse with one with the correct specifications! This part iscommonly available in the regular market.

Refer to Figure 7-5and Figure 7-6for details

19130_048_110429.eps110429

MT5363Dig Demod

NVM

DDR2 2

+12 VS DCDC

Regulator

Regulator

USB

1.1 V 0.05 V

1.8 V 0.09 V

3.3 V 0.16 V 1.25 V 0.06 V

5.25 V 0.26 V 2.5 V0.12 V

DCDC

DCDC

DCDC Regulator

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

23/67


7.3 Video

7.3.1 Video: Front-End

Key components for the tuner section are: Sharp Half NIM tuner VA1E1BF2403,

Toshiba channel decoder TC90517 (external ISDB-Tchannel decoder).

Analog demodulator (using internal MT5363 analogdemodulator - pin AH35 VIP, AH37 VIN).

Refer to Figure 7-7for details.

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

24/67


7.4 Audio

In this chassis, audio processing is done by the following keycomponents:

MT5363 micro-processor for input selection and audioprocessing, TPA3123D2 class-D power amplifier for 2 x 10 W

amplification.

The audio profile (optimal setting per screen size and styling) isstored at Option 10 (bit 0 to bit 4). Profile 1 for 32-inch Dali andprofile 2 for 40-inch Dali.

Table 7-1 Microprocessor control lines - 1 -

Table 7-2 Microprocessor control lines - 2 -

From uP At class D Usage

SW_MUTE SW_MUTE Will pull audio signals to LOW upon DC drops, help

to eliminate plop sound.

RESET_AUDIO A_STBY Control SHUTDOWN pin of class D amplifier:

ON/OFF the amplifier

MUTE MUTE Corresponding to the MUTE button on Remote

Control, to mute/unmute speakers

DC_PROT DC_PROT Detecting present of DC at speakers output and

feedback to uP. This will trigger TV into protection

mode. This is important to protect speakers

From uP

A_STBY

to class D Class D outputs

SW_MUTE LOW - MUTE

HIGH - Operating (unmute)

RESET_AUDIO LOW HIGH Operating (unmute)

HIGH LOW Class D shutdown (mute)

MUTE LOW - Operating (unmute)

HIGH - MUTE

DC_PROT LOW - DC detected -> set going to protection

HIGH - No DC -> normal operating

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

25/67


Figure 7-9 HDMI implementation

Signal description: TMDS: Signals that contain audio and video information. PWR5V: Signal to detect the presence of any HDMI source

connected to the TVs HDMI input port. SIDE_HDMI_HPD1 and HDMI_HPD2: Signal to initiate

reading of the TV EDID data by the source device. I2C: The EDID data reading and the HDCP authentication

process runs via I2C.

19130_015_110426.eps110426

TMDS

PWR5V

SIDE_HDMI_HPD1

SIDE HDMI SCL1HDMI SCL2

HDMI_HPD2

RX2

OPWR2_5V

ARC eHDMI+

SIDE_HDMI_SDA1

CECHDMI_CEC

_ __HDMI_SDA2

MT5363

TMDS

PWR5V

HDMI HPD2

__

HDMI HPD1

RX1

OPWR1_5V

_

HDMI_SDA2

HDMI_SDA1

HDMI_SDA1

HDMI_SCL2

_

EDID

Buffer & Selectioncircuit

ASPDIF_OUTARC_SW

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

26/67

IC Data SheetsEN 26 L11M1.1L LA8.

8. IC Data Sheets

This section shows the internal block diagrams and pin layoutsof ICs that are drawn as "black boxes" in the electrical diagrams

(with the exception of "memory" and "logic" ICs).

8.1 Diagram B01, Type TPS54386 (IC7116 and 7117)

BLOCK DIAGRAM

7FB1

+

SoftStart1 CCOMP

+

S Q

QR

R+

CurrentComparator

BP

f(IDRAIN1) + DC(ofst)

2

1

3

Anti-CrossConduction

1.2MHzOscilator

Divideby2/4

RampGen1

RampGen2

CLK1

CLK2

BP

CLK1WeakPull-DownMOSFET

5EN1

6EN2

6 A6 A

VDD2

InternalControl

10SEQ

150k

150k

OutputUndervoltage

Detect

BPFB1

FB2

CLK1

4GND

Current

BP

13

14CLK2

BOOT1

PVDD1

SW1

BOOT2

PVDD2

f(IDRAIN1)

f(IMAX1)

OvercurrentComp

f(ISLOPE1)

LevelShift

LevelShift

TSD

f(ISLOPE1)

f(ISLOPE2)

SD1

SD2

UVLO

0.8VREF

SD1

RCOMP

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

27/67

IC Data Sheets EN 27L11M1.1L LA 8.

8.2 Diag ram B01A DC-DC, Type LD1117D (IC7119)

Block diagram

LD1117DT

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

28/67


8.3 Diagram B03 Class-D & mut ing, Type TPA3123 (IC7400)

Block diagram

Pinning information1

2

3

4

5

24

23

22

21

20

PVCCL

SD

PVCCL

MUTE

LIN

PGNDL

PGNDL

LOUT

BSL

AVCC

1 F

SD

PVCCL

PVCCR

VCLAMP

GAIN1

BYPASS

1 F

1 F

0 .2 2 F

AGND

} Control

Shutdown

Control

LIN

RIN

BSR

BSL

PGNDR

PGNDL

0 .2 2 F

22 H

22 H

0 .6 8 F

4 70 F

0 .6 8 F

1 F

4 70 F

GAIN0

AVCC

MUTE

ROUT

LOUT

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

29/67


8.4 Diag ram B04 MT5363 Power, Type MT5363 (IC7700)

Block diagram

DVB-T ATD

CVBS/

YC Input

VADCx4

TV

Decoder

HDMIRx

HDMI InI/F

Audio

Demod

Audio

Input

AudioADC

Panel

LVDS

CVBS

VDAC

TVE

DDR

DRAMController

ARM

BIM

TS

Demux

VDO-In

PreProc

MDDi

Audio In

JPEG,MPEGH.264

2-D Graphic

Mix andPost

Processing

OSDscaler

Vplanescaler/PIP

Audio DSPIO Bus Standby uP CKGEN

Audio I/F

Audio DAC

SPDIF, I2S

BScan PVR RTC UART MS,SD PWM NAND Flash

JTAG IrDA SIF USB2.0 Watchdog Serial Flash Servo ADC

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

30/67


Pinning information

LT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

A

B VCC2IO

C

D RA9

E

F RA5

G

H RBA2

J

K RCKE

L

M RA13

N

P RA8

R

T RDQ19

U

V RDQM2

W

Y RDQS3

AA

RCLK0_

VCC2IO

RA12

RA10

RBA1

RCAS_

RA11

VCC2IO

RDQ22

RDQS2_

RDQS3_

RCLK0

VCC2IO

RA7

RBA0

RWE_

RA2

RCS_

RDQ20

RDQS2

DVSS

RDQ10

RDQ13

VCC2IO

RA3

DVSS

DVSS

RA0

VCC2IO

RDQ17

DVSS

RDQ29

RDQ8

RDQ5

VCC2IO

RA1

MEMTN

RA4

RRAS_

RDQ30

RDQ28

RDQ24

RDQ15

RDQS1_

RDQ2

VCC2IO

DVSS

DVSS

RODT

VCC2IO

RDQM3

DVSS

RDQ26

RDQS1

RDQ0

RDQ7

VCC2IO

MEMTP

RA6

RVREF

RDQ25

RDQ27

RDQ31

RDQS0_

DVSS

DVSS

DVSS

RVREF

RDQS0

DVSS

DVSS

RDQ14

RDQM1

RDQM0

DVSS

RDQ11

RDQ9

RDQ6

RDQ1

RDQ12

VCC2IO

VCC2IO

RDQ3

VCC2IO

VCC2IO

VCC2IO

RDQ4

AVDD12_M

EMPLL

AVSS12_M

EMPLL

VCCK

VCCK

VCC2IO

VCC2IO

VCC2IO

DVSS

DVSS

VCCK

DVSS

VCCK

AO0N

AO0P

AVDD33_LVDS

AVDD33_L

VDS

DVSS

DVSS

DVSS

VCCK

AO1N

AO1P

AE0N

AE0P

AVDD12_L

VDS

VCCK

DVSS

DVSS

DVSS

AO2N

AO2P

AE1N

AE1P

AVSS12_L

VDS

DVSS

DVSS

DVSS

AOCKN

AOCKP

AE2N

AE2P

AVSS33_LVDS

AVDD12_V

PLL

DVSS

DVSS

DVSS

DVSS

AO3N

AO3P

AECKN

AECKP

TP_VPLL

AVSS12_VPLL

DVSS

DVSS

DVSS

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

31/67


Pinning information

20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 RT

A0DXRTE2DXRTE0DXTTE3OIPG12OIPG53OIPGN4OA

AO4P

AE3N

AE3P

DVSS

DVSS

AE4N

AE4P

GPIO36

DVSS

DVSS

GPIO32

GPIO34

GPIO33

VCCIO33

GPIO28

GPIO30

GPIO29

GPIO31

GPIO26

GPIO27

GPIO24

GPIO25

GPIO22

GPIO20

GPIO19

GPIO23

GPIO17

GPIO18

GPIO16

GPIO15

GPIO11

GPIO12

GPIO14

GPIO13

GPIO9

GPIO10

GPIO8

GPIO7

GPIO4

GPIO6

GPIO5

VCCIO33

FSRC_WR

ETTXD3

ETTXEN

ETPHYCLK

VCCIO33

AOSDATA3

IF_AGC

ETTXD1

ETTXD2

ETCOL

GPIO2

ALIN

ETRXCLK

ETTXCLK

CI_MCLKO

CI_MISTR

T

ASPDIF

RF_AGC

ETRXD3

ETTXER

CI_MIVAL

OPWM0

AOBCK

ETRXD1

ETRXER

CI_MCLKI

CI_MDI0

GPIO0

AOMCLK

ETRXDV B

ETCRS C

ETMDIO D

ETMDC E

CI_MOSTR

T

F

CI_MOVAL G

CI_MDO0 H

OPWM1 J

GPIO1 K

AOSDATA0 L

AOLRCK M

DVSS

DVSS

DVSS

DVSS

DVSS

DVSS

VCCK

DVSS

DVSS

DVSS

DVSS

DVSS

VCCK

DVSS

DVSS

DVSS

VCCK

VCCK

AVSS33_ADAC1

OSCL2

AVDD33_ADAC1

VCCIO33

AOSDATA4

OSDA1

AL1

OSDA2

OPWM2

AR1

TUNER_DA

TA

OSCL1

AR2

AOSDATA1

U1TX

AL2

TUNER_CL

K

U1RX

AR3

N

AOSDATA2 P

R

VCXO T

U

AL3 V

DVSS DVSS VCCK AVDD33_R

EF_AADCVCCIO33 VCCIO33 VCCIO33 W

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

32/67


8.5 Diagram B06BAnalog I/O - Audio, Type LM833 (IC7B01)

Figure 8-7 Pin configuration

18520_306_090325.eps100402

Pinning information

2

(Top View)

1

3

4

8

7

6

5

Output 1

Inputs 1

Output 2

Inputs 2

VEE

VCC

1

2

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

33/67


8.6 Diagram T01C TCON DC/DC, Type ISL97653 (IC7J00)

Block diagram

+-

+-

+-

+-

+-

+-

+-

+-

CONTROL

LOGIC

SAWTOOTH

GENERATOR

CURRENT

AMPLIFIER

CURRENT LIMITCOMPARATOR

CURRENT LIMIT

THRESHOLD

REFERENCE BIAS

AND

SEQUENCE CONTROLLER

VREF

GM AMPLIFIER

UVLO COMPARATOR

OSCILLATOR

0.75 VREF

REGULATOR

SUPN

0.2V

UVLO COMPARATOR

0.4V

0.75 VREF

VREF

RSENSE

BUFFER

CONTROL

LOGIC

VREF

SAWTOOTH

GENERATOR

SLOPE

COMPENSATION

GM AMPLIFIER

SUPP

CURRENT LIMIT

THRESHOLD

CURRENT

LIMIT

COMPARATOR

BUFFER

LX1

PGND1

CB

LXL1

CM2

FBL

FBP

FBN

NOUT

PVIN1,2

EN

CDEL

PVIN1,2

VL

FBB

CM1

PGND2

LX2

CURRENT AMPLIFIER

SLOPE

COMPENSATION

VREF

FREQ

HVS

LOGIC

RSET HVS PROT

LXL2

680kHz

VL

LDO

CONTROL

LOGIC2

LDO-CTL

LDO-FB

TEMP

SENSORTEMP

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

34/67


Personal Notes:

Block Diagrams EN 35L11M1 1L LA 9

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

35/67

Block Diagrams EN 35L11M1.1L LA 9.

2011-Apr-29

9. Block Diagrams

Wiring Diagram 32" (Thriller)

11P

1M95

9P

1M99

2P3

1308

1735

4P

1M95

11P

1M99

9P

1M99

14P

1G51

51P

1M20

8P

TO DISPLAY

3P

J1

SSB3139 123 6505.x

(1150)

B

MAIN POWER SUPPLY32 PSLC-P002A(1005)

LCD DISPLAY

(1004)

8M99

8M95

WIRING DIAGRAM 32" THRILLER

19130_044_110428.eps110429

1M99 (B01)1. +12VDISP2. +12VDISP3. GND4. GND5. LAMP-ON6. BACKLIGHT-PWM7. BACKLIGHT-BOOST8. INV_STATUS9. POWER-OK

1M95 (B01)1. +3V3STDBY2. STANDBY3. GND4. GND5. GND6. +12VS7. +12VS8. +12VS9. +24VAUDIO10.GND-AUDIO11....

1735 (B03)1. LEFT_SPEAKER2. GND-AUDIO3. GND-AUDIO4. RIGHT_SPEAKER

1M20 (B04c)1. LIGHT-SENSOR2. GND3. RC4. LED-25. +3V3STBY6. LED-17. KEYBOARD8. +5V_SW

1G51 (B04D)1. +VDISP-INT2. +VDISP-INT3. +VDISP-INT4. +VDISP-INT|51.GND

LN

Board Level Repair

Component Level RepairOnly For Authorized Workshop

USB

HDMI

HDMI

INLET

VGA

LOUDSPEAKER

(5213)

8M20

J2

3P

J1

8P

TOB

ACKLIGHT

IR/LED BOARD(1112)

KEYBOARD

CONTROL

(1114)

8G51

8308

MAINSCORD

8191

TUNER

8319

EN 36L11M1 1L LA 9Block Diagrams

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

36/67

EN 36L11M1.1L LA 9.Block Diagrams

2011-Apr-29

Wiring Diagram 40" (Thriller)

11P

1M95

9P

1M99

2P3

1308

1735

4P

1M95

11P

1M99

9P

1KA2

80P

1G51

51P

1KA1

80P

1M20

8P

TO DISPLAY TO DISPLAY

3P

J1

SSB3139 123 6505.x

(1150)

B

TCON(1157)T

MAIN POWER SUPPLY

IPB 40 PLHE-P986A(1005)

LCD DISPLAY

(1004)

8M99

8M95

WIRING DIAGRAM 40" THRILLER

19130_043_110428.eps110429

1M99 (B01)1. +12VDISP2. +12VDISP3. GND4. GND5. LAMP-ON6. BACKLIGHT-PWM7. BACKLIGHT-BOOST8. INV_STATUS9. POWER-OK

1M95 (B01)1. +3V3STDBY2. STANDBY3. GND4. GND5. GND6. +12VS7. +12VS8. +12VS9. +24VAUDIO10.GND-AUDIO11.... 1735 (B03)

1. LEFT_SPEAKER2. GND-AUDIO3. GND-AUDIO4. RIGHT_SPEAKER

1M20 (B04c)1. LIGHT-SENSOR2. GND3. RC4. LED-25. +3V3STBY6. LED-17. KEYBOARD8. +5V_SW

1KA2 (T01F)1. GND|11.VLS_15V612.VLS_15V6|33.VCC_3V334.VCC_3V3|78.VGH_35V79.VGL_-6V80.GND

1KA1 (T01F)1. GND|11.VLS_15V612.VLS_15V6|33.VCC_3V334.VCC_3V3|78.VGH_35V79.VGL_-6V80.GND

1N01 (T01A)1. GND|47.+VDISP-INT48.+VDISP-INT49.+VDISP-INT50.+VDISP-INT|51.GND

1G51 (B04D)1. +VDISP-INT2. +VDISP-INT3. +VDISP-INT4. +VDISP-INT|51.GND

LN

Board Level Repair

Component Level Repair

Only For Authorized Workshop

USB

HDMI

TUNER

PHONE

SPDIF

HDMIHDMI

INLET

VGA

LOUDSPEAKER

(5213)

8M20

J2

3P

J1

8P

8KA1

1319

1P3

1316

1P3

HIGH VOLTAGE

TOB

ACK

LIGHT

TOB

ACKLIGHT

8319

8316

IR/LED BOARD

(1112)

KEYBOARD

CONTROL

(1114)

8KA2

8308

MAINSCORD

8191

1N01

51P

8G51

Block Diagrams EN 37L11M1 1L LA 9

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

37/67


2011-Apr-29

Block Diagram Video

B02A TUNER B02A DIGITAL DEMOD T01A LVDSDISLAY

T01B TCON CONTROL

T01D P GAMMA &VCOM & NVM

T01E MPD T01F MINI LVDSB04 MT5363: B04D LVDS DISPLAY

B06D VGA

B06C ANALOG I/O - VIDEO B06B ANALOG I/OAUDIO

B05B USB

B05A HDMI & MUX

B04B DDR

B04C CONTROLLER

7700MT5363BIMG

HDMI-LVDSB05

MAC-CIB04C

CONTROLB04C

AUDIO-VIDEOB06B

MT5363

19130_020_110427.eps110427

VIDEO

AGC_IF

CI_MCLKI

CI_MDIO

G34

H33

F35

H35

M31

M33

IF_AGC

RF_AGC_SW

+5VTUN_DIGITAL1201VA1E1BF2403

7302TC90517FG

TUNERDIGITAL

DEMODULATOR

9IF_AGC

CI_MIVAL

RESET_DEMOD

DIF_P

10

9

58

IF_OUT+

3 RF_AGCRF_AGC

8+B

5208

SCL

SDA7

6

(I2C)

4

3

2

1

USB_DM

USB_DP

USB 2.0

CONNECTOR SIDE

SW UPLOAD

JPEG

MP3

AR10

AU10USB_DP

USB_DM

AE

AO

1D01

1

2

4

3

AGC_RF

HDMI-LVDSB05

RX1

RX2

AP19

AT19

AR16

AU16

AR18

AU18

AP17

AT17

AP15

AT15

AR12

AU12

AR14

AU14

AP13

AT13

19

1

18

2

1

1902

34

7

9

10

12

6

M_RX2_2

M_RX2_2BM_RX2_1

M_RX2_1B

M_RX2_0

M_RX2_0B

M_RX2_C

M_RX2_CB

M_RX1_2

M_RX1_2B

M_RX1_1

M_RX1_1B

M_RX1_0

M_RX1_0B

M_RX1_C

M_RX1_CB

HDMI 2

CONNECTOR

1

1901

3

4

7

9

10

12

6

19

1

18

2

HDMI 1 (SIDE)

CONNECTOR

PX1

PX2

PX1

PX2

TO DISPLAY

TO DISPLAY

1KA2

72

81

61

50

13

33

34

12

11

1KA1

81

72

79

78

61

2

10

1

1

7H01VPP1501BFG

7K00ISL24837IRZ

VL/VH

VH

REF

VOLTAGE

GEN

7L00ISL24016IRTZ

LEVELSHIFTER

CS(1-12)ASIC_CS

VLS_15V6

VCC_3V3

1211

VLS_15V6

VGL_-6V

VGH_35V

2

10

INTERFACE

B08A

33

34

VCC_3V3

50

13

1KA1 1N01

60

2

1

43

79

78VGL_-6V

VGH_35V

VL

VH

VL

LLV(0-7)

RLV(0-7)

7218

7217

RF_AGC_SW

CI_MISTRT

TSO_VALID

11

42

30IF_OUT-

AGCCNTI

59 TSO_SYNC

61 TSO_CLK

60TSO_DATA0

DRAMB04B

CONTROLB04C

7708H27U1G8F2BTR

FLASH

1Gb

RDQ

RA

PDD NAND_PDD(0-7)

A1A1

+1V8_SW

SDRAM

512Mb

7601H5PS5162FFR

SDRAM

512Mb

7600H5PS5162FFR

VDD

VDD

RDQ(0-31)

RDQ(0

-15)

RDQ(16

-31)

RA(0-13)

PB

PR

Y

1C03

CVBSCVBS_AV3 AP352

CVBS_2P

1C01

SC1_B

SC1_G SY0P

SPB0P

SPR0P

AP29

AR28

7

12

9

SC1_CVBS_OUT AU30PR0P

Y0P

PB0P

AK22PBR0N

PB

PR

Y

1C02

PB1P_SC2

SY1P_SC2 SY1P

SPB1P

SPR1P

SY1N

AT27

AU26

7

12

9

PR1P_SC2 AP27PR1P

Y1P

PB1P

AR26 Y1N

SOY0-AV1

Y0P

PB0P

PR0P

Y0N AT29SOY0

2

C06

GND_CVBS AR36CVBS_0N

2C07

5C05

5C02

5C01

5C00

5C04

5C03

3B08

3B11

3B07

3B09

SOY1-AV2 AP25SOY1

3B02

3B05

3B03

3B01

3B00

CVI-2

CVI-1

AVIN

1

1E01

2

3

14

13

VGA_R

VGA_G

VGA_Rp

VGA_Gp

VGA_B

H-SYNC

V-SYNC

VGA_Bp

HSYNC

VSYNC

RP

GP

BP

1 6

10

11

515

VGA

CONNECTOR

AU22

AR22

AT23

AU24

AT25 RP

VSYNC

GP

BP

HSYNC

SOG

GN

AP23SOG

AR24COM

2E08

2E03

RXO

RXE

B04C

B04C

+VDISP-INT

49

50

60

1

47

48

+VDISP-INT

3C24

3C25

3C22

3C20

3C23

3C21

EN 38L11M1 1L LA 9Block Diagrams

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

38/67


2011-Apr-29

Block Diagram Audio

B03 CLASS-D & MUTINGB06B ANALOG I/O - AUDIO

B06B ANALOG I/O - AUDIO

B06C ANALOG I/O - VIDEO

B02A TUNER B02B DIGITAL DEMOD B04 MT5363:

B05B USB

B04B DDR

B04C CONTROLLER

B05A HDMI & MUX

1B02

2

ALI_ADACB06B

ALI_DACB06B

MT5363

19130_038_110427.eps110427

AUDIO

1B01

2

3

1

K33 ASPDIF

E28 ASPDIF

SPDIF_OUT

eHDMI+

ASPDIF_OUT

ARC_SW

DVI_AUL_IN

DVI_AUR_IN

1C02

AC36

AB37

AD33 AIN_AADC_0_L

AC34AIN_AADC_0_R

AB31 AIN_AADC_1_L

AC32AIN_AADC_1_R

AV IN

AUDIO

L/R

AV IN

AUDIO

L/R

AV IN

AUDIO

L/R

SPDIF

OUT

AA36

Y37

AIN_AADC_6_L

AIN_AADC_6_R

SAV_L_IN

SAV_R_IN

1C03

AV IN

AUDIOL/R

5

8

5

3

1C01

5

3

V37

u36

AL_L

AR_R

AOUTL

AOUTR

PREAMPL

PREAMPR

LEFT_SPEAKER

GND-AUDIO

RIGHT_SPEAKER

7400TPA3123D2PWP

CLASS D

POWER

AMPLIFIER

5

6

2

6

1

7

22

15MUTE 4

1

2

1735

3

4

DC-DETECTION

SW_MUTE

RESET_AUDIOA_STBY 2

B04C

B04C

B04C

DC_PROTB04C

7408STANDBY

AIN_AADC_3_L

AIN_AADC_3_R

AIN0_R-AV1

AIN0_L-AV1

AIN1_R-AV2

AIN1_L-AV2

AVIN

CVI-2

CVI-1

SPEAKER

LEFT

SPEAKERRIGHT

7700MT5363BHMG

MAC-CIB04C

CONTROLB04C

AGC_IF

CI_MCLKI

CI_MDIO

G34

H33

F35

H35

M31

M33

IF_AGC

RF_AGC_SW

+5VTUN_DIG

1201VA1E1BF2403 7302

TC90517FG

TUNERDIGITAL

DEMODULATOR

9IF_AGC

CI_MIVAL

DIF_N

DIF_P

10

9

58

IF_OUT+

3 RF_AGC

RF_AGC

8+B

5207

SCL

SDA7

6

(I2C)

AGC_RF

7218

7217

RF_AGC_SW

CI_MISTRT

TSO_VALID

11

29

30IF_OUT-

AGCCNTI

59 TSO_SYNC

61 TSO_CLK

60TSO_DATA0

B04C

4

3

2

1

USB_DM

USB_DP

USB 2.0

CONNECTOR SIDE

SW UPLOAD

JPEG

MP3

AR10

AU10USB_DP

USB_DM

1D01

1

2

4

3

DRAMB04B

CONTROLB04C

7708H27U1G8F2BTR

FLASH

1Gb

RDQ

RA

PDD NAND_PDD(0-7)

A1A1

+1V8_SW

SDRAM

512Mb

7601H5PS5162FFR

SDRAM

512Mb

7600H5PS5162FFR

VDD

VDD

RDQ(0-31)

RDQ(0

-15)

RDQ(16

-31)

RA(0-13)

HDMIB05

GPIOB05

RX0

RX1

AP19

AT19

AR16

AU16

AR18

AU18

AP17

AT17

AP15

AT15

AR12

AU12

AR14

AU14

AP13AT13

19

1

18

2

1

1902

3

4

7

9

10

12

6

M_RX2_2

M_RX2_2B

M_RX2_1

M_RX2_1B

M_RX2_0

M_RX2_0B

M_RX2_C

M_RX2_CB

M_RX1_2

M_RX1_2B

M_RX1_1

M_RX1_1B

M_RX1_0M_RX1_0B

M_RX1_C

M_RX1_CB

HDMI 2

CONNECTOR

1

1901

3

4

79

10

12

6

19

1

18

2

HDMI 1 (SIDE)

CONNECTOR 14

7B01

RESET_DEMOD 42B04C

2

1

4

5

3

8

7S0974LVC00

&

+3V3

GPIO_12


5/22/2018 32pfl3606d+40+chassis++L11M1.1L

39/67

g

2011-Apr-29

Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS

B06DUSB

B04C CONTROLLER

B04B DDR T01B TCON CONTROL

T01DP GAMMA & VCOM & NVM

B04 MT5363

B04CFLASH & EJTAG & DISPLAY INTERFACE

T01E MPD

CONTROLB04C

DRAMB04B

GPIOB04C

TO IR/LED PANEL

AND

KEYBOARD CONTROL

+3V3STBY

3

2

4

5

7

1M20

MT5363

7700MT5363BIMG

OPWRSB

AT21

AP21UART

SERVICE

CONNECTOR

1701

3

2

1

B01STANDBY

U0_RX

U0_TX

AG6GPIO_42

GPIO_26

GPIO_21

PDD

H29

RCLK1#

RCLK1

AD3

AD1

EDID_WCB06 B07E

A22 LCD-PWR-ONnB04C

AH3 LAMP-ONB01A

DC_PROTB03

B29GPIO_9

RF_AGC_SWB02A

B23GPIO_32

BYPASS_MODEB08C

G30

B25

A26

GPIO_5USB_PWR_EN

B06D

E30GPIO_6

USB_OCPB06D

A30GPIO_3

AN22OIRI

RESET_DEMODB02B

AM35ADIN_SRV_2

ORESET

KEYBOARD

RC

1 AL36ADIN_SRV_5

LIGHT-SENSOR

HDMI_CEC AN14

AL20

HDMI_CECB05A

OPCTRL_4 AU20 MUTE

B03

OPCTRL_3 AR20 SW_MUTE

B03

B04C

B04C

OPCTRL_0 AM21 POWER_DOWN

B04C

LED-2

2701

SDM

2700

PANEL

4

3

2

1

USB_DM0

ADIN_SRV_4AM37

USB_DM0 AJ5

USB_DP0 AK5 USB_DP0

USB 2.0

CONNECTOR

SIDE

1D01

3

4

2

1

USB_PWR_EN

7D00TPS2041BD

USB_OCPENOUTOC

19130_045_110428.eps110429

7710

CLK

CLK

J8J8 K8K8

TCK

RCLK0#

RCLK0

A2

B3CLK

CLK

XTAL1

XTALO

170054M

AJ34

AJ36

RDQ

RA

SDRAM

512Mb

7601H5PS5162FFR

SDRAM

512Mb

7H00H5PS5162FFR TCON

CONTROL

7H01VPP1501BFG

SDRAM

512Mb

7600H5PS5162FFR

TDQ(0-15)

RDQ(0

-15)

RDQ(16

-31)

RA(0-13)

TA(0-12)

7708H27U1G8F2BTR

FLASH

1GbNAND_PDD(0-7)

GPIO_7

E28 ARC_SWB06BGPIO_12

GPIO_35

GPIO_43AG4

GPIO_41POWER-OK

B01A

+3V3STBY

AL22ORESET

7701BD45292G

VOUT

VDD5

4

3

OSC_IN

OSC_OUT

SLOPE

CS

1H00

27M B1

A1

L2

L1

T9RST

RESETT01D

U9

T16

RTC50_6050Hz_60Hz

T01D

T01C

T01F

T01F

T01F

GSLOP

TCK#

P

GAMMA

7K00ISL24837IRZ

OUT1224

T01E

T01F

T01F

T01F

CS_L

OUT1226 INCOM

OUTCOM25 OUTCOM

VCOM

VH

VL

LLV(0-7)

RLV(0-7)

VCOM

BUFER

7L00SL24016IRTZ

LEVELSHIFTER

CS(1-12)ASIC_CS

RDQ(0-31)


5/22/2018 32pfl3606d+40+chassis++L11M1.1L

40/67

g

2011-Apr-29

Block Diagram I2C

IC

DIGITAL DEMODB2B

LVDS DISPLAYT01A

TCON CONTROLT01B

P GAMMA & VCOM & NVMT01D

VGAB06D

TUNERB02A

HDMI & MUXB05A

CONTROLLERB04C CONTROLLERB04C

DDRB4B

1KQA

DEBUG ONLY

RES

RES

7700

MT5363BIMG

OSDA_0

OSCL_0

GPIO_44

CONTROL

AH1 7

AP3

AP1

AP21

AT21

SYS_EEPROM_WE

SDA-MAIN

SCL-MAIN

3718

3719

+3V3_SW

TUNER_DATA

TUNER_CLK

19130_011_110426.eps

110426

5 6

7702

M24C64

EEPROM

(NVM)

3717

3716

N34

N36

3727

3728

3746

3747

+3V3STBY

3746

3747

+3V3STBY

UART

SERVICE

CONNECTOR

3749

3748

1701

3

2

1

B04C

ERR15

7703

1 6

10

11

515

VGA

CONNECTOR

SDA_VGA

SCL_VGA

1E01

12

15

3E21

3E22

DC_5V

3K40

3K41

VCC_3V3

3K54

3K53

VCC

5 6

7E00

M24C02

EEPROM

4E03

4E02

4818

4817

7EDID_WC7E01

B04CMT5363

1

2

1KQB

2

1

ROM_SDA

ROM_SCL

U8 T8

46 45

7302

TC90517FG

DIGITAL

DEMODULATOR

3352

3351

FE_SDA

FE_SCL

7 6

1201

VA1E1BF2403

MAIN

TUNER

ERR16

3228

3230

TUNER_SDA

TUNER_SCL

12

14

7H01

VPP1501BFG

TCON

CONTROL

5 6

7K04

M24C64

EEPROM

12 13

7K00

ISL24837IRZ

VOLTAGE

GENERATOR

7 8

7

7801

PCA9540BDP

I2C

SWITCH

HDMI 2

CONNECTOR

HDMI 1 (SIDE)CONNECTOR

1901

16

15

TOTCON

TO

SSB

1G51

50

49

3907

3908

AL14

AL12

1902

16

15

3915

3916

HDMI_PLUGPWR2

HDMI_PLUGPWR2

AN18

AM17

SIDE_HDMI_SDA1

SIDE_HDMI_SCL1

HDMI_SDA2

HDMI_SCL2

HDMI_SCL2

HDMI_SCL1

HDMI_SDA2

HDMI_SDA1

7900

M24C02

EEPROM

7901

M24C02

EEPROM

4

3WP_TCON

RESET

MAIN NVM

SW

Programmable via USBSW

SW Programmable via ComPair

EDID

SW

EDID

SW

EDID

SW

3K56

3K55

7708

H27U1G8F2BTR

FLASH

1GbPDD

U0_RX

U0_TX

NAND

SDRAM

512Mb

7601H5PS5162FFR

SDRAM

512Mb

7600H5PS5162FFR

RDQ(0-31)

RA(0-13)

DRAMB04B

RDQ

RA

5 6 5 6

4816

4814

SDA_VCOM

SCL_VCOM

SDA_VGA

SCL_VGA

SDA-TCON

SCL-TCON

1N01

2

3

4BYPASS_MODE

B08A

B04C


5/22/2018 32pfl3606d+40+chassis++L11M1.1L

41/67

2011-Apr-29

Supply Lines OverviewSUPPLY LINES OVERVIEW

MAIN

POWER

SUPPLY

B01 DC - DC

T01B TCON CONTROL

B04C CONTROLLER

B06A ANOLOG I/O - HEADPHONEB04A MTK POWER

B04B DDR

B05A HDMI & MUX

B05BUSB

T01A LVDS DISPLAY

B06D VGA

B04D LVDS DISPLAY

T01E MPD

T01F MINI LVDSB02A TUNER

B02B DIGITAL Demod

B03 CLASS-D & MUTING

T01C TCON DC/DCB06B ANALOG I/O - AUDIO

T01D P GAMMA & VCOM & NVM

1M99

1 1

6 6

7 7

8 8

1M95

+3V3STBY

19130_005_110426.eps110426

B04d

B03,B04c,B06b

B03,B04a,c,d,B05a

B02b,B04a,c,d,B06a,B06b

B02a

B02a,B03.B04c,B06d,B05a,b

B02b

B02b,B04a

B04a,b

B04a

B03

1M99

1 1

6 6

7 7

2 2

3 3

4 4

5 5

8 8

LAMP-ON

1M99

BACKLIGHT-BOOST

INV_STATUS

+12VDISP

BACKLIGHT-PWMB04C

B04C

+12VS

9 9

GND-AUDIO

10 10

+3V3_SW

+1V1_SW

EN_1

+24VAUDIO

CONTROL

CONTROL

B04C

CONTROLB06D

CONTROL

9 9 POWER-OK

2 2

3 3

4 4

5 5

STANDBYB04A

CONTROL

11 11

7122RT8283AHGSP

SynchronousStep-downConverter

N.C.

5117

PWR5V_2

+3V3STBY+3V3STBY

190218HDMI 2

CONNECTOR

B01

+5V_SW+5V_SW

HDMI_PLUGPWR1

B01

512132

32

+1V8_SW

7124

RT8283AHGSPSynchronousStep-downConverter

7125RT8283AHGSP

5115 512332

7123RT8283AHGSP

32

VCC_3V3VCC_3V3

T01c

VCC_1V8VCC_1V8

T01c

VDD3V3IO5H03

VDD3V3LVRS5H02

VGH_35VVGH_35V

T01c

5H04

5H06

DDR2VDD5H05

+1V1_SW+1V1_SW

+1V25_SW+1V25_SW

B01

+3V3_SW+3V3_SW

B01

+3V3_SW+3V3_SW

B01+3V3_SW+3V3_SW

B01

+3V3STBY+3V3STBY

B01+3V3STBY+3V3STBY

B01+3V3STBY+3V3STBY

B01+3V3_SW+3V3_SW

B01

B01

B01

+1V8_SW+1V8_SW

SENCE+1V1_MT5363

B01

+1V8_SW+1V8_SW

1M20

8

5TO

IR/LEDPANEL

+12VS+12VS

B01

+5V_SW+5V_SW

B01

+5V_SW

+5V5_TUN5120

6122

6102

+2V5_SW

B04a

SENSE_1V8SENSE_1V8

B04a

SENSE+1V1_MT5363SENSE+1V0_MT5363

+5V_SW+5V_SWB01

+VDISP-INT

+5V_SW+5V_SWB01

B01

SENCE_1V8B01

PWR5V_1190118HDMI 1 SIDE

CONNECTOR

HDMI_PLUGPWR2

VDD1V8PLL

1N01

+VDISP+VDISP

T01c

VREF_15V2VREF_15V2

T01d

VLS_15V6VLS_15V6

T01c

T01d,e

T01b,d,f

T01f,d

T01b,f

T01f

T01c

VGH_35VVGH_35V

T01c

+VDISP-INT

+12VDISP+12VDISP

7802

LCD-PWR-ONn

7800B01

5800

5706

5801

5802

VCC_3V3VCC_3V3

T01cVGL_-6VVGL_-6V

B08c

B01

+5V_SW+5V_SW

+5V5_TUN+5V5_TUN

B01

+5VTUN_DIGITAL

+1V25_SW+1V25_SW

+3V3_SW+3V3_SWB01

B01

+3V3STBY+3V3STBY

+5V_SW+5V_SWB01

+12VS+12VSB01

+24VAUDIO+24VAUDIOB01

B01

+VDISP

VLS_15V6_B

VLS_15V6

+VDISP-INT+VDISP-INT

7J00ISL97653

10

21

T01a

5J067J01

VGL_-6V3J10 3J26

VGH_35V

3,4 VCC_3V35J00

T01b39 VCC_1V8

6J02 4J02

4J01

4J04

LCDSUPPLY

5105 5106

5225

+5VS

7216

IN OUTCOM

B01

+2V5_SW +2V5_SW

5222

6900

6901

DC_5V1E01

9VGACONNECTOR

5H01

VDD1V85H00

3J12

3E13

+12VS+12VS

+3V3_SW

+3V3-ARC

+3V3_SWB01

B01

32 VREF_15V2

7K00ISL24837IRZ

VOLTAGEGENERA-

TOR+VDISP+VDISP

T01c

T01e

VCC_3V3VCC_3V3

T01cVLS_15V6VLS_15V6

T01c


5104


7120

IN OUTCOM

+1V25_SW7120

IN OUTCOM

3130

6E05 5E03

50

48

47

49

1G51

4

2

1

3

TO 1N01

TCONT01A

TO 1G51

SSBB04D

EN 42L11M1.1L LA 10.Circuit Diagrams and PWB Layouts

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

42/67

2011-Apr-29

10. Circuit Diagrams and PWB Layouts

10-1 B01 393912365052DC-DC

19130_016_110426.eps110426

DC-DCB01A B01A

2011-01-312

2011-01-131

3139 123 6505PCB SB SSB

THRILLER BRZ DIG

COM

OUTIN

GNDGND HS

VIN

EN

SS

VIA

BOOT

SW

FB

COMP

GNDGND HS

VIN

EN

SS

VIA

BOOT

SW

FB

COMP

GNDGND HS

VIN

EN

SS

VIA

BOOT

SW

FB

COMP

COM

OUTIN

GNDGND HS

VIN

EN

SS

VIA

BOOT

SW

FB

COMP

8

ROUND 4.50mm SCREW HOLE

0V

ROUND 4.02mm SCREW HOLE

12V/1V0 CONVERSION

12V/1V8 CONVERSION

2

PIN

12V/3V3 CONVERSION

3V3/1V2 CONVERSION

12V

0V7

1

1.5V

25V

0V

3V3

12V/5V CONVERSION

1M99

PIN

>1.5V

ON

12V

60V

STBY

0V

0V

6

SLOT SCREW HOLE

3V

0V9

7

1M95

12V

3V3

0V

3V

1

3V5

90V

ON

12V

5V/2V5 CONVERSION

STBY

0V

I136

2189

10u

10n

2197

22u

2151

33R

5105

22u

2138

22n

215810u

2163

RES

1%

3112

15K

RES

100n

2187

100n

2111

GND-AUDIO

100n

2110

F123

F125

I106

SS1_GND

I107

100n

2108I108

3131

4K7

3130

1K0

LD1117DT257120

1

3 2

SS3_GND

68R

5127

33R

3129

2142

100n

F122

RES

4100

F135

3113

68K

1%

RES

SS2_GND

F118

5%

100K

3146

33R

5120

470p

2186

RES

6122

SS36

3125 1

%

5K1

22u

2130

2157 22n

BZX384

-C6V8

6102

2125

100n

2140

SS1_GND

16V

2176

22u

6.3

V

100n

10u

100n

2123

2177

1X02REF EMC HOLE

1X01REF EMC HOLE

F1162159

6.3

V

100u

SS4_GND

2170

100n

100K

3100

I134

+1V1_SW

2146

2u

2

2147

100n

15K

3116

100

p

2127

3127

RES

470p

68R

+2V5_SW

2113

22u

2152

I127

I118

+24VAUDIO

10u

2172

100

p

2134

F132

3115 1

%

27K

I110

3u6

5123

5124

33R

6

7

5

4 9

8

3

10

2

7124RT8283AHGSP

1

3153

470R

33R

5115

10u

2169

100n

2148

SS4_GND

5128

33R

2102

10u

I105

16V

10u2

168

F105

7119LD1117DT

1

3 2

I123

F108

F109

I112

100n

2126

I1092195

22n

5

4 9

8

3

10

2

+12VS

RT8283AHGSP

1

6

7

I138

7122

3105 1

%

1R0

100K

5125

33R

3151

1n

0

2137

RES

SS1_GND

SS3_GND

2185

3n

3

RES

2180

1n

0

3 12 6 6 8R

100n

2143

RES6

.3V

5

4 9

8

3

10

2

2101

100u

RT8283AHGSP

1

6

7

F106

7125

2154

10u

16V

GND-AUDIO

SS3_GND

10u

2171

10R

3138

RES

I122

RES

3u6

5106

SS1_GND

I139

1R0

3150

2107

22u

6.3

V

RES

10R

3155

470R

RES

3111

6

7

8

9

470R

3154

1M95

1

10

11

2

3

4

5

1n

0

2141

1-2041145-1

RES

F121

16V

10u2

188

2149

100n

2105 6

.3V

100u

RES

RES

22u

2155

22u

2166

2161

22u

5%

DGND

F120

470K

3148

10n

2122

I144

I111

1n

0

2136

2199

10u

F136

+5V_SW

SS1_GND

EN_1

F131

3140

4K7

1%

I137

2191

22u

+5V_SW

SS4_GND

F114

+3V3STBY

10u

2164

1n

0

2144

100n

SENSE+1V1_MT5363

DGND

2139

I142

D GN D DG ND

470p

I140

RES

2150

F107

SS3_GND

F117

3K6

3145

3106

12K

100n

1%

SS2_GND

SENSE_1V8

2124

2178

100n

EN_1

10u

EN_1

F101

2175

4n

7

2167

2

3

4

5

6

7

8

9

2041145-9

1M99

1

2135

10n

I113

5117

33R

SS3_GND

3135

12K

SS1_GND

1R0

3152

6.3

V

2106

+5V5_TUN

100u

DGND

I126

I135

100

p

2132

100

p

2131

3107

1K5

1%

I120

2100

10u

100K

3101

100K

3102

2192

RES

470p

2179

100n

3 12 8 6 8R

EN_1

2181

10u

+1V8_SW

GND-AUDIO

I141

F113

F103

2145

1n

0

DGND

1%

12K

3118

22u

2165

I125

+1V25_SW

SS3_GND

2129

+3V3_SW

100K

22u

3103

1X04EMC HOLE

3149

1R0

I132

I143

F102

2153

10u

27K

1%

I117

SS4_GND

3109

I119

2112

4n

7

I131

2133

100

p

2128

100

p

5

4 9

8

3

10

2

RT8283AHGSP

1

6

7

5121

10u

7123

F119

F115

SS2_GNDGND-AUDIO

F133

SS2_GND

3n

3

2160

12K

3114

22u

2162

RES

2198

10n

3108

10R

SS4_GND

16V

47u2

109

+3V3_SW

F104

+12VDISP

SS2_GND

22n2190

+12VS

I104

2193

22u

RES

3136

10R

1X05REF EMC HOLEREF EMC HOLE

1X03

10u

5104

2183

22u

SS2_GND

10K

3122

47K

3117

22u

2104

RES

+12VS

POWER-OK

STANDBY

BACKLIGHT-PWM

LAMP-ON

BACKLIGHT-BOOST

INV_STATUS

Circuit Diagrams and PWB Layouts EN 43L11M1.1L LA 10.

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

43/67

2011-Apr-29

10-2 B02 393912365052Tuner

19130_017_110426.eps110426

TunerB02A B02A

2011-01-312

2011-01-131

3139 123 6505PCB SB SSB

THRILLER BRZ DIG

COM

OUTIN

MT

MT

0R

Near Tuner Near MTK5363

330nAGND

220n

5230

5228

AGND

47n

2

293

KTK5132E7218

AGND

F246

F208

AGND AGND

3270

10K

1 3

2278

1u

0

7216LD29150DT50R

2

2294

47u

AGND

AGND

AGND

AGND

F207

F204

F206

A214

15p

2225

A213

100p

2262

RES

2 25 8 10 0n

2295

F213

100p

1

810R

3271

-1I222I221

3261

NC2

3RF_AGC

6SCL

7SDA

10K

10IF_OUT+

11IF_OUT-

IF_OUT_ANALOG 12

13

14

15

16

NC1 2

4

+B 8

1ANT_PWR

5AS

9IF_AGC

F236

1201VA1E1BF2403

TUNER

2288

33p

75R

3263

75R

3262

F203

3265

1K0

10R

3228 2286

180p

+5VTUN_DIGITAL

22u

RES

2

213

A225

AGND

AGND

AGND

2226

100n

2282

15p

RES

10u

2279

7217BC847BW

2280

10n

5222

10u

RES

RES

2277

22u

AGND

AGND

5225

10R

3230

+5V5_TUN

AGND

2281

22u

+5VTUN_DIGITAL

F201

RES

F242

+5VS

RES

2

78

3272

-2

10R

3272

-1

10R

RES

1

2289

AGND

10n

F209

2285

27p

4210

RES

2287

10n

F202

22u

2296

RES

3264

A212

10K

220n

5229

180p

2291

AGND

AGND

+5VS+5V_SW

AGND

2263

47n

3269

1K0

I255

AGND

AGND

F247

I254

27p

2290

AGND

3272

-4

10R

RES

4

5

3272

-3

10R

RES

3

6

30R

I220

RES 5207

RES

RES

4209

4

5

1n0

2297

3

6 10R

3271

-42

7 10R

3271

-3

+5VTUN_DIGITAL

10R

3271

-2

5208 4u7

F235

2283

22u

10n

2284

F205

5226

220n

5227

220n

RF_AGC_SW

DIF_P

DIF_N

VIN_ATV

VIP_ATV

RF_AGC_EX

DIF_N

DIF_P

FE_SDA

FE_SCL

IF_AGC

RF_AGC

EN 44L11M1.1L LA 10.Circuit Diagrams and PWB Layouts

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

44/67

2011-Apr-29

Digital demodulator

19130_018_110426.eps110426

Digital demodulatorB02B B02B

2011-01-312

2011-01-131

3139 123 6505PCB SB SSB

THRILLER BRZ DIG

X

XSEL

ADI_AI

ADQ_AI

AD_VREF

TSMD

TN

SLADRS

VSS

DR2VDD

DR1VDDVDDS

AD

_DVDD

AD

_AVDD

PLLVDD

VDDC

PBVAL

RERR

RLOCK

RSEORF

SBYTE

SLOCK

SRCK

SRDT

STSFLG1

AGCCNTI

AGCCNTR

STSFLG0

SYRSTN

0

1

SCLSDA

FIL

AD

_AVSS

AD

_DVSS

PLLVSS

I

O

01

P

N

P

N

PN

AD_VREF

DTCLK

DTMB

S_INFO

0

1

AGCI

CKI

SCLSDA

25.4M

FOR DEVELOPMENT USE

DGND

AGND

AGND

+1V25_SW

+2V5_SW

+3V3_SW

F301

4311

DGND

4310

AGND

DGND

AGND

3360

4K7

33R3354

+2V5_SW

1u

0

2305

33R3359

F306

DGND

3344

2K7

AGND

I303

I338

1u

0

2313

F303

2337 100n

F300

DGND

1u0

I320

2340

3 35 7 3 3R

3351 100R

4306

1n52335

18p

2334

+3V3_SW

DGND

100n

2302

DGNDDGND

DGND

DGND

+3V3_SW

I318

37

44

47

50

57

62

19

18

3

2

36

56

63

13

35

49

64

415

33

61

60

51

38

42

8

12

14

141

16

17

53

54

55

59

45

46

65

52

7

11

34

48

43

39

40

21

58

20

28

22

23

32

31

26

25

24

9

10

7302TC90517FG

29

30

27

2317

100n

5304

30R

DGND

I325

2 33 9 1 u0

I308

4308

DGND

100n

2304

DGND

10K

3335

DGND

3 34 9 1 0K

2K7

3343

2321

100n

10n

2322

AGND

2332

100n

2320

1u

0

100n2338

3 33 9 2 0K

1u

0

2316

30R

5306

1u

0

2318

AGND

I304

5302

30R

5307

30R

+1V25_SW

DGND

39p

2379

RES

+3V3_SW

I316

I306

I302

2307

100n

2308

2309

100n

100n

F302

3332

2K7

DGND

+3V3_SW

10K

3336

2377 100n

I307

RES

RES2380

39p

4K7

3350

4307

4309

DGND

AGND

DGND

DGND

DGND

10K3337

AGND

2303

100n

33R

5311

100n

AGND

2323

100n2378

100n

2324

100n2336

2301

100n

2341

100n

RES

30R

5301

100n

2312

30R

5305

4312

4313

DEB

SML-310

6301

5310

DGND

33R

33R

5309

DGND

I305

2314

1u

0

3 35 8 3 3R

7301DEB

100n

2306

BC847BW18p

2333

DNGADNGA

DGND

4

1 3

I301

1301

2

I300

2310

1u

0

2K7

3331

DGND

I317

AGND AGND

DGND

DGND

30R

5303

DEB3356

1K0

AGND

3 35 3 3 3R

3352 100R

RES

DGND

1K0

DEB

5308

1n

2

AGND

DGND

3355

2311

AGND

100n

4314

AGND

DIF_N

RESET_DEMOD

IF_AGC

DIF_P

TUNER_SCL

TUNER_SDA

TSO_CLK

TSO_DATA0

TSO_SYNC

TSO_VALID

FE_SDA

FE_SCL

Circuit Diagrams and PWB Layouts EN 45L11M1.1L LA 10.

5/22/2018 32pfl3606d+40+chassis++L11M1.1L

45/67

2011-Apr-29

10-3 B03 393912365052Class-D & muting

19130_019_110427.eps110427

Class-D & mutingB03 B03

2011-01-312

2011-01-131

3139 123 6505PCB SB SSB

THRILLER BRZ DIG

VIA VIA

VIA

VIA

VCLAMP

MUTE

IN

BSL

SD

R

AVCC

L

BSR

GND_HS

L

PGND

AGND L R

L

OUT

R

BYPASS

1

R

0

PVCC

GAIN

GND SND

RESERVED

LEFT+

RIGHT-

DC-DETECTION

GND SND

GND-AUDIO

I401

I413

F400

I416

100K

RES

3405-4

4

5

3414

I422

22K

1K0

3418

+5V_SW

3422-3

100K

RES

1R0

3415

2406

47n

F413

I433

1K0

3428

1u02409

3

2

I403

7403BC847BW

1

7402-2

5

3

4

BC857BS(COL)

5401

220R

2420

10n

I437

2432

1u

0

RES

2431

3427

1K0

4n7

2407

47n

2433

1u

0

3408

RES

47K

1K0

3412

2423

100n

+24VAUDIO

+24VAUDIOI412

GND-AUDIO

220n

2413

31

32

33

34

I423

26

35

3637

38

39

40

27

2829

30

VIA

7400-2TPA3123D2PWP

2400

220n

220R

5400

74062SD2653K

3430

47K

RES

1

8

3406-1

22K

BC857BS(COL)7402-1

2

61

GND-AUDIO

GND-AUDIOGND-AUDIO

3439

10K

I441

10K

3433

RES

I434

3405-2

22K

2

7

RES

3416

100K

I417

F411

1K0

RES

I418

3432

F415

I431

10u2426

220n

2411

F414

GND-AUDIO

I415

10u2

405 3

32pfl3606d+40+chassis++L11M1.1L

Documents

Transcript of 32pfl3606d+40+chassis++L11M1.1L