8/10/2019 101002_mop27495-TRU

1/3

medium distance fiber signal propagation after erasing/rewrit-

ing is under study.

4. CONCLUSION

The BER performance of a data-erasing/rewriting scheme was

presented for two different SOAs. Results for input bit-rate at

40 Gb/s show the 8-mm long UL-SOA with a better perform-

ance than the 2-mm long NL-SOA. The NL-SOA can still be

used for AM optical signals with input ER lower than 6 dB,

although with higher power penalties, and/or with lower bit

rates. However, only the 8-mm long UL-SOA eraser presentsenough carrier erasing for further remodulation for downstream

signals with high input extinction ratio and high bit rates.

The main drawback is the occurrence of SPM, causing spec-

tral broadening. This side effect must be controlled for high bit

rates or long fiber links.

ACKNOWLEDGMENTS

This work was supported in part by CNPq (2007/56024-4) and

Fapesp (Padtec, 2007/56024-4, and CePOF, 2005/51689-2; 2009/

08537-8), Brazil.

REFERENCES

1. L.G. Kazovsky, W. Shaw, D. Gutierrez, N. Cheng, and S. Wong,Next generation optical access networks, IEEE J Lightwave Tech-

nol 25 (2007), 34283442.

2. H. Takesue and T. Sugie, Wavelength channel data rewrite using

saturated SOA modulator for WDM metro/access networks with

centralized light sources, IEEE J Lightwave Technol 21 (2004),

25462556.

3. S. Ho, E. Conforti, and S.M. Kang, LDOT life-range delimitation

optical transceiver for fast routing and multicasting in wavelength

division multiplex (WDM) local area networks, In: Optical fiber

conference OFC94 Digest, paper WN3, 1994, pp. 171174.

4. E. Conforti, C.M. Gallep, S. Ho, A.C. Bordonalli, and S.M. Kang,

Carrier reuse with gain compression and feed-forward semiconduc-

tor optical amplifier, IEEE Trans Microwave Theory Technol 50

(2002), 7781.

5. B. Schrenk, G. Valicourt, M. Omella, J.A. Lazaro, R. Brenot, and

J. Prat, Direct 10-Gb/s Modulation of a single-section RSOA in

PONs with high optical budget, IEEE Photonics Technol Lett 22

(2010), 392394.

6. N.S. Ribeiro, A.R.L. Cavalcante, C.M. Gallep, and E. Conforti, Optical

amplitude modulation extinction by a deep saturated ultra-long semi-

conductor optical amplifier, Opt Express 18 (2010), 2729827305.

7. N.S. Ribeiro, A.R.L. Cavalcante, C.M. Gallep, and E. Conforti,

Optical carrier sinusoidal modulation suppressed by ultra-long

semiconductor optical amplifier gain saturation, Microwave Opt

Technol Lett 53 (2011), 12861290.

8. N.S. Ribeiro, A.R.L. Cavalcante, C.M. Gallep, and E. Conforti,

Data rewriting after carrier erasing by ultra-long SOA, In: Optical

fiber conference OFC 2011 Digest, paper JWA042, 2011.

9. P.P. Baveja, D.N. Maywar, A.M. Kaplan, and G.P. Agrawal, Self-

phase modulation in semiconductor optical amplifiers: impact of

amplified spontaneous emission, IEEE J Quantum Electron 46(2010), 13961403.

10. P. Runge, R. Elschner, C.A. Bunge, K. Petermann, M. Schlak, W.

Brinker, and B. Sartorious, Operational condition for extinction ra-

tio improvement in ultralong SOAs, IEEE Photonics Technol Lett

21 (2009), 106108.

11. H. Takesue, N. Yoshimoto, Y. Shibata, T. Ito, Y. Tohmori, and T.

Sugie, Wavelength channel data rewrite using semiconductor opti-

cal saturator/modulator, IEEE J. Lightwave Technol 24 (2006),

23472354.

VC 2013 Wiley Periodicals, Inc.

ANALYTICAL METHOD FOR DERIVINGCONSISTENT LARGESMALL-SIGNALFIELD-EFFECT TRANSISTOR MODEL

Sami BousninaPolyGrames Research Center, Montreal, QC, Canada;Corresponding author: sami.bousnina@polymtl.ca

Received 27 August 2012

ABSTRACT: This article presents a detailed analytical method forderiving consistent largesmall-signal field-effect transistor (FET)

model. This resulted in a set of closed-form equations relating the large-

signal model parameters to the small-signal model ones. An improved

equivalent circuit is proposed for modeling the transistor under large-

signal operation. In this circuit, RF nonlinear current sources are used

to model the distributed effect of the gatesource and gatedrain

junctions. The dispersion between DC and RF drain current

characteristics is modeled using an improved back-gating technique. The

predictive model capabilities are illustrated with measured and

simulated S-parameters, output power at fundamental and harmonics

frequencies of a commercial packaged GaAs FET device. The model is

then fully validated by comparing measured and simulated results of

output power, efficiency, and intermodulation distortion of a class AB

amplifier designed at 1.9 GHz. VC 2013 Wiley Periodicals, Inc.

Microwave Opt Technol Lett 55:10011008, 2013; View this article

online at wileyonlinelibrary.com. DOI 10.1002/mop.27495

Key words: field-effect transistor; large-signal model; parameter

extraction; model consistency; model validation

INTRODUCTION

The recent and future generations of wireless communication

systems are planned to offer new ways to access information

and services with higher data rate and bandwidth [1]. In the

infrastructure of these systems, several crucial hardware compo-

nents should be improved to meet the quality of the requested

service. Among these components, highly linear and efficient

RF power amplifiers (PAs) are considered the most challenging

designs [2]. Indeed, the design of PAs for wireless communica-

tion systems based on field-effect transistor (FET) devicesrequires an accurate large-signal model. To achieve that pur-

pose, the model should account for dispersion and self-heating

effects in addition to be able to predict intermodulation distor-

tion (IMD), which is important for PAs nonlinearity analysis.

Varieties of large-signal FET empirical models have been

developed and have demonstrated their ability to accurately predict

device performance [314]. Empirical models can be of two types,

the analytical and table-based one. Analytical models use equa-

tions for the description of measured data. The model implementa-

tion using analytical functions is fast, but it can be difficult to find

functions that fit globally the nonlinear device model parameters

over large bias ranges. The main advantages of the analytical mod-

els include computational efficiency, simplicity, and ability to

deliver simulation results outside the measurement range. On theother hand, table-based models use lookup tables developed from

the measured data. In table-based models, instead of using mathe-

matical expressions, multidimensional spline functions are used to

fit the measured data. Therefore, they are more accurate than the

analytical models and are suitable for applications, where the func-

tional forms of the model nonlinear components are unknown.

The traditional large-signal modeling approach is based on

deriving first the bias-dependent small-signal equivalent circuit

for intrinsic transistor, which is then used to derive the large-

signal model. Both small- and large-signal models have the

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 55, No. 5, May 2013 1001

8/10/2019 101002_mop27495-TRU

2/3

same configuration of branches and terminals. In this approach,

the intrinsic parameters that depend on two terminal bias vol-

tages are modeled by nonlinear functions or implemented using

lookup tables. As reported in Ref. 10, this bottom-up modeling

approach introduces a problem of inconsistency such that the

linearization of the large-signal model leads to a small-signal

model with nonconventional trans-capacitances. To solve this

inconsistency, which is essentially related to the modeling of

nonlinear charges, several researchers have proposed an alterna-

tive top-down approach where a modified configuration of the

large-signal model equivalent circuit is used as a starting point

to derive the small-signal model [1113]. In this approach, the

linearization of the defining equations of the large-signal model

under each bias point and correlating them with the defining

equations of the small-signal model is the base-line idea to

determine the nonlinear parameters of the large-signal model.

At high-frequency operation, the device channel charge under

the gate does not respond immediately to the stimulation signal.

This requires a relaxation time to build up. This effect results in

high-order frequencies dependency of measured parameterY11 of

the device. Therefore, the large and small-signal models should

be able to simulate this effect. Furthermore the device channeltransconductance, Gm, cannot respond instantaneously to changes

in the gate voltage at high frequency. Therefore, time delay inher-

ent to this process should be accounted for in the device model.

In Ref. 11, the bias-dependent gatesource and gatedrain resis-

tances were omitted in the model equivalent circuit. This affects

the accuracy of the device model mainly at high-operating drain

current/voltage where values of these resistances are non-negligi-

ble. In Refs. 12 and 13, bias-dependent parameters: current time-

delay s and gatesource and gatedrain resistances are included

only empirically in the large-signal model.

Relatively to the dispersion between DC and RF drain current

characteristics, previous initial research works have attempted to

model this effect using RC circuit [8] and using back-gating tech-

nique [4, 14]. In other approaches, it was modeled more accu-rately using additional drain RF current sources [7].

The work presented in this article proposes an improved equiv-

alent circuit of the FET large-signal model and develops a method-

ology for the extraction of its parameters. The implemented large-

signal model is consistent with the device small-signal model.

Thereby, when it is linearized around each bias point, it reproduces

the bias-dependent small-signal parameters that were used to con-

struct it. The discrepancy between DC and RF drain current char-

acteristics is modeled by an improved back-gating technique where

a scaling factor of the feedback drain voltage is considered as

nonlinear parameter. The developed modeling approach was

applied to a commercial GaAs FET device with satisfactory

results. The developed large-signal model was successfully used to

design a class AB amplifier at central frequency 1.9 GHz.

2. CORRELATION BETWEEN PARAMETERS OF THE LARGE-SIGNAL AND SMALL-SIGNAL MODELS

The proposed basic equivalent circuit of the intrinsic large-sig-

nal model is shown in Figure 1. It is composed of a drain non-

linear current source ID2 and two nonlinear charge sources QG

and QD. The derivatives of the charge sources model thedisplacement currents, and ID2 models the channel conduction

current. In addition, RF current sources IG1 and ID1 model the

distributed effect of the gatesource and gatedrain junctions.

Detailed description of the modeling of the self-heating and DC/

RF-dispersion effects is given in Section 4.

The intrinsic part of the corresponding small-signal equiva-

lent circuit can be obtained by linearizing, under small-signal

excitation (dVg, dVd), the internal part of the large-signal model.

The total gate and drain currents in the intrinsic FET equivalent

circuit shown in Figure 1 are given by:

IGT IG1Vg; Vd IG2Vg; Vd (1)

IG2 d

dt

QGvg; Vd (2)

IDT ID1vg; Vd ID2vg2; Vd ID3vg; Vd (3)

Vg2 Vgexpjw s (4)

ID3 d

dtQDvg; Vd (5)

The differentials ofIGT and IDT, which are their infinitesimal

changes under small-signal excitation, are given by:

dIGT dIG1vg; Vd dIG2vg; Vd (6)

dIDT dID1vg; Vd dID2vg2; Vd dID3vg; Vd (7)

With

dIG1@IG1

@VgdVg

@IG1

@VddVd (8)

dIG2 d

dtdQG

d

dt

@QG

@VgdVg

@QG

@VddVd

jw @QG

@VgdVg

@QG

@VddVd

(9)

Figure 1 Basic FET intrinsic large-signal model

Figure 2 FET intrinsic small-signal model

1002 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 55, No. 5, May 2013 DOI 10.1002/mop

8/10/2019 101002_mop27495-TRU

3/3

dID1@ID1

@VgdVg

@ID1

@VddVd (10)

dID2 @ID2

@Vg2dVg2

@ID2

@VddVd (11)

The differential ofVg2 can be expressed as:

dVg2 dVg jwVgds expjw s (12)

Assuming that |wVgds dVg, then:

dVg2 expjw s dVg (13)

Consequently:

dID2 @ID2

@Vg2expjw s

dVg

@ID2

@Vd

dVd (14)

dID3 d

dtdQD

d

dt

@QD

@VgdVg

@QD

@VddVd

jw @QD

@VgdVg

@QD

@VddVd

(15)

Using Eqs. (6) and (7), the intrinsic Y parameters of the line-

arized large-signal model are expressed as follows:

Y11L @IG1

@Vgjw

@QG

@Vg(16)

Y12L @IG1

@Vdjw

@QG

@Vd(17)

Y21L@ID1

@Vg

@ID2

@Vg2expjw s jw

@QD

@Vg(18)

Y22L@ID1

@Vd

@ID2

@Vdjw

@QD

@Vd(19)

The terms of the differentials of IGT and IDT can be calcu-

lated through the correlation of Eqs. (16)(19) with the defining

equations of the small-signal model shown in Figure 2. The

Y-parameters of the intrinsic part of the equivalent small-signal

model are given by the following equations:

Y11 jwCgs

1D1wCgs

2Rgs

1 D1

jwCgd

1D2wCgd

2Rgd

1D2(20)

Y12 jwCgd

1 D2wCgd

2Rgd

1 D2(21)

Y21 Gm0expjw s jwCgd

1D2wCgd

2Rgd

1D2(22)

Y22 1

RdsjwCds

jwCgd

1 D2wCgd

2Rgd

1D2(23)

D1 wRgsCgs2

(24)

D2 wRgdCgd2

(25)

The term 1/(1 Di) with i = 1, 2, can be expressed in a formof Taylor series:

Si 1

1Di 1

X1

n1

Din

(26)

The correlation between Eqs. (16)(19) and (20)(23) leads

to the following closed-form expressions:

@IG1

@Vg wCgs

2RgsS1 wCgd

2RgdS2 (27)

@IG1

@Vd wCgd

2RgdS2 (28)

@QG

@Vg CgsS1 CgdS2 (29)

@QG

@Vd CgdS2 (30)

@QD

@Vg CgdS2 (31)

@QD

@Vd Cds CgdS2 (32)

@ID1

@Vd wCgd

2RgdS2 (33)

@ID1

@Vg wCgd

2RgdS2 (34)

@ID2@Vg2

Gm0 (35)

@ID2

@Vd Gds (36)

Figure 3 Complete equivalent circuit of the FET small-signal model

TABLE 1 Values of Parasitic Resistances

Parameter Rg (X) Rd (X) Rs (X)

Value 1 0.85 0.4

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 55, No. 5, May 2013 1003