北京亚科鸿禹电子有限公司 HyperSilicon Co.,Ltd. · Dolby AC-3 Audio Coders Audio...

Hypersilicon confidential! www.hypersilicon.com

May 28, 2013 Beijing China

www.hypersilicon.com

北京亚科鸿禹电子有限公司 HyperSilicon Co.,Ltd.


SOC Prototype and StarFire Series Platforms

Year Founded 2003

http://www.hypersilicon.com

Room 316, Peony Venture

Building, No.2 Hua Yuan Road,

HaiDian District,Beijing,P.R.China

Total 40 staffs, covering Beijing,

Shijiazhuang, Shanghai, Jinan.

Web site

Location

Employee

Products FPGA Prototype boards,

Synthesizable Modeling Kit,

Design Services, IP and Alliance

Company Profile



Bei Jing HQ

Japan

Tai Wan Shang Hai

Shi Jia Zhuang

Ji Nan

Itary

Singapore

HQ & Subsidiary Sales Partners

Global sales Channel

USA


SOC Prototype and StarFire Series Platforms Customers



SOC Prototype

StarFire & VeriTiger Platforms

www.hypersilicon.com





Starfire series AlTERA

I series E series M series H series T series DA series DC series

I820C4 I820C3 I340C4 I340C3

E820C4 E820C3 E340C4 E340C3

M820C4 M820C3 M340C4 M340C3

H820C4 H820C3 H340C4 H340C3

T820C4 T820C3 T340C4 T340C3

DA820C4L DA820C4 DA820C3L DA820C3 DA340C4L DA340C4

DC820C4L DC820C4 DC820C3L DC820C3 DC340C4L DC340C4

Others

E/DARM180CX(IX)L E/DARM180CX(IX) CevARM1DA CevARM1DC CevARM DP25 DVB4S SKTV1.0 SKT V180 V120

One piece of Stratix III & Stratix V FPGA

Two pieces of Stratix III & Stratix V FPGA, L means one piece of FPGA

FPGA Prototype boards-Starfire



1. Modularized prototype board can

be stackable to meet more

capacity.

2. General structure prototype board

of the industry.

3. Consist of two pieces Stratix IV

4. EP4SE820F43(compatible with

EP3SL340F43),supported

verification of design up to 16.4

million ASIC gates.

5. Expansion Interface/connector

apply with HSPI, 560 GPIO

connection between two FPGA.

6. DDR2 SO-Dimm, DDR3 SO-

DIMM all can be compatible with

DDR, SDRAM, Mobile DDR.

Starfire-DA

1. Consist of two pieces of 1.8

Million ASIC gates Capacity,

main chip with EP2S180F1020

2. Modularized board which can be

stackable to extend

3. Versatile daughter boards

available

4. ARM Coretile supported directly

on mother board

5. Excellent signal integrity

1. Lowcost FPGA prototype platfrom in

starfire’s family.

2. Using oen piece of Altera Stratix

III/IV series

EP3SL340H40/EP4SE530/820H40

as main process chip

3. Memory type contains:

DDR/DDR2/DDR3-sodimm Slot

4. Configuration type:

JTAG/FPP/USBdevice

5. USB-OTG PHY and debug device

6. All Altera HSTC serials

daughterboard can be adapted

seamless

Starfire-EARM Starfire-E




1. Modularized prototype board can be

stackable to meet more capacity.

2. General structure prototype board of

the industry.

3. Consist of two pieces Stratix IV

Ep4SE820F43(compatible with

EP3SL340F43),supported

verification of design up to 16.4

million ASIC gates.

4. Expansion Interface/connector apply

with HSPI, 560 GPIO connection

between two FPGA.

5. DDR2 SO-Dimm, DDR3 SO-DIMM

all can be compatible with DDR,

SDRAM, Mobile DDR.

Starfire-M Starfire-T Starfire-H

1. All-in-one for DTV/STB, PMP/MP4, also

extendable for other application,

especially fitted with High Speed digital

design

2. Using one piece of Altera

StratixIV(EP4SE820/530H40) serial

chip and Altera Stratix GX serial FPGA

chip

3. SATA II and PCI-E controller verified

with respective PHY

4. HDMI transmitter and receiver interface

5. DDRII devices, running at 666Mhz data

rate

6. 1000/100/10 M Ethernet PHY

7. Video DAC application

8. Audio DAC verification

9. JTAG/FPP debug module

1. All-in-one for DTV/STB, PMP/MP4,

also extendable for other application,

Key word is “High Definition”

2. Using one piece of Altera Stratix III/IV

serials EP3SL340/EP4SE530/820 as

main process chip

3. DisplayPort to HDMI interface

4. DDRII devices, running at 666MHz

data rate

5. DDR devices, running at 333Mhz data

rate

6. Video DAC/ADC interface

7. USB PHY/Device application

8. 1000/100/10M Ethernet PHY




VeriTiger series XILINX

F series S series E series DX series DH series Special tools

F240TC3 S330C1

E330C2 E330C1

DX760C2L DX760C2 DX760C1L DX760C1 DX550C1L DX550C1

DH2000TQC2L DH2000TQC2 DH2000TQC1L DH2000TQC1

STK STSV1.0

One piece of Vertex V & Vertex VI FPGA

One piece of Vertex VI FPGA, L means two pieces of FPGA

One piece of Vertex VII FPGA, L means two pieces of FPGA

FPGA Prototype boards-VeriTiger



VeriTiger-DH2000TQ 1. VeriTiger-DH2000TQ series has the

biggest logic capacity with high

performance, high reliability, high

flexibility. And it is the most innovated

Prototype Platform

2. Consist of two pieces Xilinx Virtex7-

XC7V2000T

3. Memory interface: DDR2-Sodimm

supported/DDR3-Sodimm supported

4. GTX application: PCI-E

X8/SATA/Three units of

SFP/SMA/SMB

5. Expansion interface: 12 units of HSPI

interface, including dedicated

GPIO732, Shared IO 546

6. All GPIO can be configuration as

LVDS signals

7. 546 GPIO connection between two

FPGAs

8. Configuration type: JTAG, Select

Map(8 bits), USB download

VeriTiger-DX VeriTiger-S330 1. Modularized prototype board

can be stackable to meet more

capacity

2. General structure prototype

board of the industry

3. Consist of two pieces

XC6VL760FFG1760(compatible

with

XC6VLX550TFFG1760),support

ed Verification of design up to

15.2 million ASIC gates

4. Expansion Interface/connector

apply with HPSI, 560 GPIO

connection between two FPGA

5. Full DDR2, DDR3 power supply,

and DDR2-Sodimm/ DDR3-

Sodimm Slots support

1. Low cost FPGA prototype platform

in VeriTiger’s family

2. Using one pieces of Xilinx series

XC5VLX330T as main process chip

3. Memory type contains: DDR/DDR2-

Slot interface/SDRAM chip

4. Nor FLASH and NANDFLASH chip

on board

5. 10/100/M Ethernet PHY application

6. USB-HOST/Device application

7. Audio Decoder interface

8. Based SHARP LCD interface

9. Configuration type: JTAG/CF/USB

Download

FPGA Prototype boards-VeriTiger


SOC Prototype and StarFire Series Platforms Customized FPGA Prototype boards

Customized Prototype Board Design ■ Altera and Xilinx FPGA Devices Oriented

■ High end SOC prototype board

8-30 layer PCB, 200MHz+, complex system

■ We can support the software flow of SOC embedded

processers powered by ARM, MIPS, Tensilica, CEVA, ZSP etc.

■ Focus on the applications of consumer and wireless SOCs: DTV, STB,

PMP/MP4, various MIDs, and any Audio and Video related products

■ HyperSilicon have certain capability of software engineering

■ Types and Common Schedule

• Daughter boards customizing design 1-5 weeks

• Modification design based on StarFire and VeriTiger 6-15 weeks

• Full customizing design of the boards 3-6 months

• System design based on customer`s ASIC/SOC after using

HyperSilicon`s FPGA based Prototype boards Depending on the project



BlueSpec “Hardware in One Step”

High-Level Development Environment for

Optimizing Algorithms and Architectures

3 Speen Street

Framingham, MA 01701

(781) 250-2200

www.bluespec.com





Bluespec, Inc.:

Founded in 2003

Patented technology from MIT

Private venture-backed company

Offices & sales:

Boston, Atlanta, Dallas, San Jose, Bangalore

25 employees

Distributors/Agents: Vertical Markets, Japan, Korea, Europe

Select customer examples:

14

Company Overview

Unique, patented core technology

Uses guarded atomic transactions

to implement a high-level parallel

programming language for mapping

algorithms to optimized

architectures.

Large

microprocessor

company

Large

search

company



BSV vs. C/C++/SystemC: Architectural Transparency

BSV Best architecture

for target

C/C++/SystemC*

One possible rendering of

the function in von

Neumann architecture

model

RTL Implementation

RTL Implementation

?

Function (math)

• Source and RTL have different architectures

• Designers prefer to avoid generated Verilog

• Tools limitations push designers away from Verilog

simulation environments (inability to provide an

effective source-level debug view from RTL

simulations)

* Assumes we’re not talking about SystemC RTL

• BSV is Architecturally Transparent to RTL

• Designers find generated Verilog readable & understandable

- Skeletal structure (architecture) is identical: all state

(registers/FIFOs/memories/…) and their respective names map

directly to RTL

- Behavior too: rule transactions and their respective names map

directly to RTL

• Tools enable effective source-level debug with RTL

simulations, and emulations!

Bluespec



Bluespec BSV can be used

alone or it can import Verilog &

C/C+

• Imported Verilog is passed

through to the Verilog output

• Imported C/C++ is executed in

the Bluesim simulator

BSC Compiles Bluespec BSV to

synthesizable Verilog or to a

Bluesim executable

Bluesim provides fast cycle-

accurate simulation for BSV and

C/C++ codes.

Emulation App brings low cost

emulation to 3rd party FPGA

boards

Development Workstation ties

all tools together in a common

User Interface

Synthesizabl

e

Verilog

RTL Simulators

Emulators

RTL Synthesis

Waveform

Viewers

Bluespec Development Workstation

BSC

Compiler

Bluesim

Simulator

Bluespec

Emulation App

FPGA Boards

Bluespec BSV

Verilog/C/C++ +

Bluespec

3rd Party

Simulators VCS, ModelSim, NC, CVC

Synthesizers DC, Cadence, Magma

Emulators Palladium, Veloce, EVE

WF Viewers GTKWave, nWave

FPGA Boards Dini 7002, 7406, Xilinx

ML605

Bluespec


SOC Prototype and StarFire Series Platforms IP & Alliance

The Alliance IP




SOC Prototype and StarFire Series Platforms IP & Alliance

Channel Coding and Decoding IP (Commsonic)

Decoder/Encoder of DVB-C,DVB-T/T2,DVB-S/S2,

Multi-QAM,QPSK,COFDM,ISDB-T

Leading 8/16bit 8051 Core IP(DCD)

World`s fastest DQ80251, High performance

and Small size DQ8051

OTP IP(Kilopass)

The leading OTP IP, cover TSMC SMIC GSMC

IBM etc. from 0.18um to 20nm

Verification IP and Platform Verification Consultancy,

Service, Expert Training(TVS)

AsureVIP products and development

MIPI VIP platform

Super speed USB Device VIP

APB3.0,AHB 3.0 and AXI-4 VIP

1G/10G Ethernet VIP

ONFI Flash 2.2 VIP



Video Processing and High Speed Digital Controller(DPControl)

H.264 encoding

Image processing pipeline

Image DMA controller

Image Scaler

Fisheye Unwarper

1/10Gigabit Ehtemet TCP/UDP Off-Loader

Audio Coding and decoding IP (SiliconOcean)

MP3, WMA, G.726, ADPCM, Bluetooth A2DP

High Speed SerDes PHY IP(IPGOAL)

Sigma-Delta AD/DA, DVI, LVDS, USB2.0/OTG

PHY, USB3.0 PHY, SATAII PHY, PCI-E PHY

Multi-format Video codec IP(Chips&Media)

H.264/Mpeg2/Mpeg4/AVS/RMVB/VC-1/Div/MJPEG

JPEG2000(IntoPIX)

The most powerful and flexble JPEG2000 solution

IP & Alliance



Video/Audio Codec solution (SOC Technologies)

MPEG2/H.264 Encodes and Decoders (SD/HD and

VHD-480i/p, 720i/p, 1080i/p, 2K, 4K)

SD and HD MPEG2-to-H.264 Transcoders MPEG and

Dolby AC-3 Audio Coders Audio Transcoders

Various interface Controller (Innovative-Logic)

USB3.0 Device Controller

Wireless USB3.0 Device Controller

UWB MAC Controller

STATII Device and Host Controller

PCMCIA Device and Host Controller

Ethernet MAC 10/100/1000M

FLASHH/SDRAM/DDR/DDRII Memory controller

LCD controller

IP & Alliance

北京亚科鸿禹电子有限公司 HyperSilicon Co.,Ltd. · Dolby AC-3 Audio Coders Audio...

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