Post on 23-Feb-2016
description
Kuno-Group B4 Yuuki Matsumoto
A report for Graduation research
Development of Trigger Board for MPPC
(for MuSIC experiment)
Contents1.Back Ground & Purpose2.Equipment3.Experiment4.To do (Plan)
1.Back ground &Purpose
Strong magnetic field
Use MPPC for measurement of Muon(8×108/sec) using scintillation counter.
Complex circuit is needed to readout MPPC signal.
SPIROC-A board can perform all part .
here
I develop SPIROC-A board for MPPC
2.Equipment
signalfrom MPPC
HV add and changelogic circuit from PC
send command from PC
EASIROC
Analog out hold
NIM out
SPIROC-A board
FPGAI use right board
The board,@MPPC 32ch can drive at the same time.@It has ADC.@We can program FPGAto use TDC.
@It has not have TDC yet.@Clock output < 334MHz@Clock jitter ±100〜 ±150ps@The board is a new test board , so we don’t know clearly how to use.
Slow Shaper
Slow Shaper
Fast Shaper
Low Gain Pre Amp
High Gain Pre Amp
Discri OR32
Hold Read
Hold Read
ADC1
ADC2
V_th
1.5pF
15pF
Read
EASIROC
25—175ns
25—175ns
15ns
3.Experiment1. I measured ADC spectra from Function Generator.2. I measured ADC spectra from MPPC.
@measured ADC spectra from Function Generatorpink : direct signal from Function Generator(80mV 25ns)blue : high gain after slow shapercyan : low gain after slow shaper
no hold hold
ADC spectra ( Function Generator gave 80mV 25ns pulse )
High gain
Low gain
phed = 975 ch
ADC peak ch and input charge
mV 50 50 50 50 50 60 70 80 90 100 110 120
ns 5 10 15 20 25 25 25 25 25 25 25 25
pC 5 10 15 20 25 30 35 40 45 50 55 60
peak 1337 1715 2098 2473 2821 3187 3458 3569 3607 3622 3630 3636
RMS 18.65 18.5 18.35 18.27 17.74 16.21 8.282 4.124 3.685 3.153 2.782 2.446
[pC]=[mV]×[ns]÷[50Ω]
0 10 20 30 40 50 60 700
500
1000
1500
2000
2500
3000
3500
4000
f(x) = 73.96 x + 977.533333333334
pC
peak
CH
Linear
shaper is down
Δch=73.96 ΔpC
@measured ADC spectra from MPPC
Dark current
Hold is OR32. In oscilloscope , there are many hold from other ch.It may make noises.
1 photon??
2 photon??
What??
Now , examining
4. To do
1 measure MPPC spectra using LED 2 measure resolution and delay of discriminator3 measure TDC spectra (extra TDC)4 write TDC program to FPGA in VHDL 5 measure TDC spectra (internal TDC)
counter(FPGA)
Discri
clock
STOP
Signal from outside
START
PC
< Internal TDC (plan) >
time resolution <1000/334 = 2.99nsmuon life time is 2μs
END